@@ -1850,6 +1850,29 @@ TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_256, "vV8iV8iUc*Uc*", "nV:256:", "a
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TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_128, " vV4iV4iUc*Uc*" , " nV:128:" , " avx512vp2intersect,avx512vl" )
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// AVX512 fp16 intrinsics
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+ TARGET_BUILTIN(__builtin_ia32_vcomish, " iV8xV8xIiIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_addph512, " V32xV32xV32xIi" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_subph512, " V32xV32xV32xIi" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_mulph512, " V32xV32xV32xIi" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_divph512, " V32xV32xV32xIi" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_maxph512, " V32xV32xV32xIi" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_minph512, " V32xV32xV32xIi" , " ncV:512:" , " avx512fp16" )
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+
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+ TARGET_BUILTIN(__builtin_ia32_minph256, " V16xV16xV16x" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_minph128, " V8xV8xV8x" , " ncV:128:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_maxph256, " V16xV16xV16x" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_maxph128, " V8xV8xV8x" , " ncV:128:" , " avx512fp16,avx512vl" )
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+
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+ TARGET_BUILTIN(__builtin_ia32_addsh_round_mask, " V8xV8xV8xV8xUcIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_divsh_round_mask, " V8xV8xV8xV8xUcIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_mulsh_round_mask, " V8xV8xV8xV8xUcIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_subsh_round_mask, " V8xV8xV8xV8xUcIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_maxsh_round_mask, " V8xV8xV8xV8xUcIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_minsh_round_mask, " V8xV8xV8xV8xUcIi" , " ncV:128:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_cmpph512_mask, " UiV32xV32xIiUiIi" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_cmpph256_mask, " UsV16xV16xIiUs" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_cmpph128_mask, " UcV8xV8xIiUc" , " ncV:128:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_cmpsh_mask, " UcV8xV8xIiUcIi" , " ncV:128:" , " avx512fp16" )
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TARGET_BUILTIN(__builtin_ia32_loadsh128_mask, " V8xV8x*V8xUc" , " nV:128:" , " avx512fp16" )
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TARGET_BUILTIN(__builtin_ia32_storesh128_mask, " vV8x*V8xUc" , " nV:128:" , " avx512fp16" )
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@@ -1886,12 +1909,24 @@ TARGET_BUILTIN(__builtin_ia32_reduce_and_d512, "iV16i", "ncV:512:", "avx512f")
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TARGET_BUILTIN(__builtin_ia32_reduce_and_q512, " OiV8Oi" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fadd_pd512, " ddV8d" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ps512, " ffV16f" , " ncV:512:" , " avx512f" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph512, " xxV32x" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph256, " xxV16x" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph128, " xxV8x" , " ncV:128:" , " avx512fp16,avx512vl" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fmax_pd512, " dV8d" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ps512, " fV16f" , " ncV:512:" , " avx512f" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph512, " xV32x" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph256, " xV16x" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph128, " xV8x" , " ncV:128:" , " avx512fp16,avx512vl" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fmin_pd512, " dV8d" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ps512, " fV16f" , " ncV:512:" , " avx512f" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph512, " xV32x" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph256, " xV16x" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph128, " xV8x" , " ncV:128:" , " avx512fp16,avx512vl" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fmul_pd512, " ddV8d" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ps512, " ffV16f" , " ncV:512:" , " avx512f" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph512, " xxV32x" , " ncV:512:" , " avx512fp16" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph256, " xxV16x" , " ncV:256:" , " avx512fp16,avx512vl" )
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+ TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph128, " xxV8x" , " ncV:128:" , " avx512fp16,avx512vl" )
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TARGET_BUILTIN(__builtin_ia32_reduce_mul_d512, " iV16i" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_mul_q512, " OiV8Oi" , " ncV:512:" , " avx512f" )
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TARGET_BUILTIN(__builtin_ia32_reduce_or_d512, " iV16i" , " ncV:512:" , " avx512f" )
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