Merge from 'main' to 'sycl-web' (#5)

  CONFLICT (content): Merge conflict in clang/include/clang/Driver/Options.td

Author: Pavel V Chupin

clang-tools-extra/clang-move/tool/ClangMove.cpp

@@ -30,7 +30,8 @@ namespace {
 std::error_code CreateNewFile(const llvm::Twine &path) {
   int fd = 0;
   if (std::error_code ec = llvm::sys::fs::openFileForWrite(
-          path, fd, llvm::sys::fs::CD_CreateAlways, llvm::sys::fs::OF_Text))
+          path, fd, llvm::sys::fs::CD_CreateAlways,
+          llvm::sys::fs::OF_TextWithCRLF))
     return ec;
 
   return llvm::sys::Process::SafelyCloseFileDescriptor(fd);

clang-tools-extra/modularize/ModuleAssistant.cpp

@@ -268,7 +268,7 @@ static bool writeModuleMap(llvm::StringRef ModuleMapPath,
 
   // Set up module map output file.
   std::error_code EC;
-  llvm::ToolOutputFile Out(FilePath, EC, llvm::sys::fs::OF_Text);
+  llvm::ToolOutputFile Out(FilePath, EC, llvm::sys::fs::OF_TextWithCRLF);
   if (EC) {
     llvm::errs() << Argv0 << ": error opening " << FilePath << ":"
                  << EC.message() << "\n";

clang-tools-extra/pp-trace/PPTrace.cpp

@@ -152,7 +152,7 @@ int main(int argc, const char **argv) {
                                  OptionsParser->getSourcePathList());
 
   std::error_code EC;
-  llvm::ToolOutputFile Out(OutputFileName, EC, llvm::sys::fs::OF_Text);
+  llvm::ToolOutputFile Out(OutputFileName, EC, llvm::sys::fs::OF_TextWithCRLF);
   if (EC)
     error(EC.message());
   PPTraceFrontendActionFactory Factory(Filters, Out.os());

clang/include/clang/AST/DeclObjC.h

@@ -852,9 +852,7 @@ class ObjCPropertyDecl : public NamedDecl {
   bool isClassProperty() const {
     return PropertyAttributes & ObjCPropertyAttribute::kind_class;
   }
-  bool isDirectProperty() const {
-    return PropertyAttributes & ObjCPropertyAttribute::kind_direct;
-  }
+  bool isDirectProperty() const;
 
   ObjCPropertyQueryKind getQueryKind() const {
     return isClassProperty() ? ObjCPropertyQueryKind::OBJC_PR_query_class :

clang/include/clang/Basic/LangOptions.def

@@ -309,6 +309,8 @@ LANGOPT(ObjCSubscriptingLegacyRuntime         , 1, 0, "Subscripting support in l
 BENIGN_LANGOPT(CompatibilityQualifiedIdBlockParamTypeChecking, 1, 0,
                "compatibility mode for type checking block parameters "
                "involving qualified id types")
+LANGOPT(ObjCDisableDirectMethodsForTesting, 1, 0,
+        "Disable recognition of objc_direct methods")
 LANGOPT(CFProtectionBranch , 1, 0, "Control-Flow Branch Protection enabled")
 LANGOPT(FakeAddressSpaceMap , 1, 0, "OpenCL fake address space map")
 ENUM_LANGOPT(AddressSpaceMapMangling , AddrSpaceMapMangling, 2, ASMM_Target, "OpenCL address space map mangling mode")

clang/include/clang/Basic/riscv_vector.td

@@ -200,24 +200,146 @@ class RVVBuiltin<string suffix, string prototype, string type_range,
 // Basic classes with automatic codegen.
 //===----------------------------------------------------------------------===//
 
-class RVVBinBuiltin<string suffix, string prototype, string type_range>
-    : RVVBuiltin<suffix, prototype, type_range> {
-  let IntrinsicTypes = [-1, 1];
-}
-
-multiclass RVVBinBuiltinSet<string intrinsic_name, string type_range,
-                            list<list<string>> suffixes_prototypes> {
-  let IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask" in {
+multiclass RVVBuiltinSet<string intrinsic_name, string type_range,
+                         list<list<string>> suffixes_prototypes,
+                         list<int> intrinsic_types> {
+  let IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask",
+      IntrinsicTypes = intrinsic_types in {
     foreach s_p = suffixes_prototypes in {
       let Name = NAME # "_" # s_p[0] in {
         defvar suffix = s_p[1];
         defvar prototype = s_p[2];
-        def : RVVBinBuiltin<suffix, prototype, type_range>;
+        def : RVVBuiltin<suffix, prototype, type_range>;
       }
     }
   }
 }
 
+// IntrinsicTypes is output, op0, op1 [-1, 0, 1]
+multiclass RVVOutOp0Op1BuiltinSet<string intrinsic_name, string type_range,
+                                  list<list<string>> suffixes_prototypes> {
+  defm NAME : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes,
+                            [-1, 0, 1]>;
+}
+
+// IntrinsicTypes is output, op1 [-1, 1]
+multiclass RVVOutOp1BuiltinSet<string intrinsic_name, string type_range,
+                               list<list<string>> suffixes_prototypes> {
+  defm "" : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1]>;
+}
+
+multiclass RVVOp0Op1BuiltinSet<string intrinsic_name, string type_range,
+                               list<list<string>> suffixes_prototypes> {
+  defm "" : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0, 1]>;
+}
+
+multiclass RVVOutOp1Op2BuiltinSet<string intrinsic_name, string type_range,
+                                  list<list<string>> suffixes_prototypes> {
+  defm "" : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1, 2]>;
+}
+
+multiclass RVVSignedBinBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "csil",
+                                [["vv", "v", "vvv"],
+                                 ["vx", "v", "vve"]]>;
+}
+
+multiclass RVVUnsignedBinBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "csil",
+                                [["vv", "Uv", "UvUvUv"],
+                                 ["vx", "Uv", "UvUvUe"]]>;
+}
+
+multiclass RVVIntBinBuiltinSet {
+  defm "" : RVVSignedBinBuiltinSet;
+  defm "" : RVVUnsignedBinBuiltinSet;
+}
+
+multiclass RVVSignedShiftBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "csil",
+                                [["vv", "v", "vvUv"],
+                                 ["vx", "v", "vvz"]]>;
+}
+
+multiclass RVVUnsignedShiftBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "csil",
+                                [["vv", "Uv", "UvUvUv"],
+                                 ["vx", "Uv", "UvUvz"]]>;
+}
+
+multiclass RVVShiftBuiltinSet {
+  defm "" : RVVSignedShiftBuiltinSet;
+  defm "" : RVVUnsignedShiftBuiltinSet;
+}
+
+let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
+  multiclass RVVSignedNShiftBuiltinSet {
+    defm "" : RVVOutOp0Op1BuiltinSet<NAME, "csil",
+                                     [["wv", "v", "vwUv"],
+                                      ["wx", "v", "vwz"]]>;
+  }
+  multiclass RVVUnsignedNShiftBuiltinSet {
+    defm "" : RVVOutOp0Op1BuiltinSet<NAME, "csil",
+                                     [["wv", "Uv", "UvUwUv"],
+                                      ["wx", "Uv", "UvUwz"]]>;
+  }
+}
+
+multiclass RVVIntTerBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "csil",
+                                [["vv", "v", "vvvv"],
+                                 ["vx", "v", "vvev"],
+                                 ["vv", "Uv", "UvUvUvUv"],
+                                 ["vx", "Uv", "UvUvUeUv"]]>;
+}
+
+multiclass RVVCarryinBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "csil",
+                                [["vvm", "v", "vvvm"],
+                                 ["vxm", "v", "vvem"],
+                                 ["vvm", "Uv", "UvUvUvm"],
+                                 ["vxm", "Uv", "UvUvUem"]]>;
+}
+
+multiclass RVVCarryOutInBuiltinSet<string intrinsic_name> {
+  defm "" : RVVOp0Op1BuiltinSet<intrinsic_name, "csil",
+                                [["vvm", "vm", "mvvm"],
+                                 ["vxm", "vm", "mvem"],
+                                 ["vvm", "Uvm", "mUvUvm"],
+                                 ["vxm", "Uvm", "mUvUem"]]>;
+}
+
+multiclass RVVSignedMaskOutBuiltinSet {
+  defm "" : RVVOp0Op1BuiltinSet<NAME, "csil",
+                                [["vv", "vm", "mvv"],
+                                 ["vx", "vm", "mve"]]>;
+}
+
+multiclass RVVUnsignedMaskOutBuiltinSet {
+  defm "" : RVVOp0Op1BuiltinSet<NAME, "csil",
+                                [["vv", "Uvm", "mUvUv"],
+                                 ["vx", "Uvm", "mUvUe"]]>;
+}
+
+multiclass RVVIntMaskOutBuiltinSet {
+  defm "" : RVVSignedMaskOutBuiltinSet;
+  defm "" : RVVUnsignedMaskOutBuiltinSet;
+}
+
+multiclass RVVFloatingBinBuiltinSet {
+  defm "" : RVVOutOp1BuiltinSet<NAME, "fd",
+                                [["vv", "v", "vvv"],
+                                 ["vf", "v", "vve"]]>;
+}
+
+multiclass RVVIntExt<string intrinsic_name, string suffix, string prototype,
+                     string type_range> {
+  let IRName = intrinsic_name, IRNameMask = intrinsic_name # "_mask",
+      MangledName = NAME, IntrinsicTypes = [-1, 0] in {
+    def "" : RVVBuiltin<suffix, prototype, type_range>;
+  }
+}
+
 defvar TypeList = ["c","s","i","l","f","d"];
 defvar EEWList = [["8", "(Log2EEW:3)"],
                   ["16", "(Log2EEW:4)"],
@@ -387,14 +509,152 @@ defm : RVVIndexedLoad<"vloxei">;
 
 // 12. Vector Integer Arithmetic Instructions
 // 12.1. Vector Single-Width Integer Add and Subtract
-defm vadd : RVVBinBuiltinSet<"vadd", "csil",
-                             [["vv", "v", "vvv"],
-                              ["vx", "v", "vve"],
-                              ["vv", "Uv", "UvUvUv"],
-                              ["vx", "Uv", "UvUvUe"]]>;
+defm vadd : RVVIntBinBuiltinSet;
+defm vsub : RVVIntBinBuiltinSet;
+defm vrsub : RVVOutOp1BuiltinSet<"vrsub", "csil",
+                                 [["vx", "v", "vve"],
+                                  ["vx", "Uv", "UvUvUe"]]>;
+
+// 12.2. Vector Widening Integer Add/Subtract
+// TODO
+
+// 12.3. Vector Integer Extension
+let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
+    defm vsext_vf2 : RVVIntExt<"vsext", "w", "wv", "csi">;
+    defm vzext_vf2 : RVVIntExt<"vzext", "Uw", "UwUv", "csi">;
+}
+let Log2LMUL = [-3, -2, -1, 0, 1] in {
+    defm vsext_vf4 : RVVIntExt<"vsext", "q", "qv", "cs">;
+    defm vzext_vf4 : RVVIntExt<"vzext", "Uq", "UqUv", "cs">;
+}
+let Log2LMUL = [-3, -2, -1, 0] in {
+    defm vsext_vf8 : RVVIntExt<"vsext", "o", "ov", "c">;
+    defm vzext_vf8 : RVVIntExt<"vzext", "Uo", "UoUv", "c">;
+}
+
+// 12.4. Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
+let HasMask = false in {
+  defm vadc : RVVCarryinBuiltinSet;
+  defm vmadc : RVVCarryOutInBuiltinSet<"vmadc_carry_in">;
+  defm vmadc : RVVIntMaskOutBuiltinSet;
+  defm vsbc : RVVCarryinBuiltinSet;
+  defm vmsbc : RVVCarryOutInBuiltinSet<"vmsbc_borrow_in">;
+  defm vmsbc : RVVIntMaskOutBuiltinSet;
+}
+
+// 12.5. Vector Bitwise Logical Instructions
+defm vand : RVVIntBinBuiltinSet;
+defm vxor : RVVIntBinBuiltinSet;
+defm vor : RVVIntBinBuiltinSet;
+
+// 12.6. Vector Single-Width Bit Shift Instructions
+defm vsll : RVVShiftBuiltinSet;
+defm vsrl : RVVUnsignedShiftBuiltinSet;
+defm vsra : RVVSignedShiftBuiltinSet;
+
+// 12.7. Vector Narrowing Integer Right Shift Instructions
+defm vnsrl : RVVUnsignedNShiftBuiltinSet;
+defm vnsra : RVVSignedNShiftBuiltinSet;
+
+// 12.8. Vector Integer Comparison Instructions
+defm vmseq : RVVIntMaskOutBuiltinSet;
+defm vmsne : RVVIntMaskOutBuiltinSet;
+defm vmsltu : RVVUnsignedMaskOutBuiltinSet;
+defm vmslt : RVVSignedMaskOutBuiltinSet;
+defm vmsleu : RVVUnsignedMaskOutBuiltinSet;
+defm vmsle : RVVSignedMaskOutBuiltinSet;
+defm vmsgtu : RVVOp0Op1BuiltinSet<"vmsgtu", "csil",
+                                  [["vx", "Uvm", "mUvUe"]]>;
+defm vmsgt : RVVOp0Op1BuiltinSet<"vmsgt", "csil",
+                                 [["vx", "vm", "mve"]]>;
+
+// 12.9. Vector Integer Min/Max Instructions
+defm vminu : RVVUnsignedBinBuiltinSet;
+defm vmin : RVVSignedBinBuiltinSet;
+defm vmaxu : RVVUnsignedBinBuiltinSet;
+defm vmax : RVVSignedBinBuiltinSet;
+
+// 12.10. Vector Single-Width Integer Multiply Instructions
+defm vmul : RVVIntBinBuiltinSet;
+defm vmulh : RVVSignedBinBuiltinSet;
+defm vmulhu : RVVUnsignedBinBuiltinSet;
+defm vmulhsu : RVVOutOp1BuiltinSet<"vmulhsu", "csil",
+                                   [["vv", "v", "vvUv"],
+                                    ["vx", "v", "vvUe"]]>;
+
+// 12.11. Vector Integer Divide Instructions
+defm vdivu : RVVUnsignedBinBuiltinSet;
+defm vdiv : RVVSignedBinBuiltinSet;
+defm vremu : RVVUnsignedBinBuiltinSet;
+defm vrem : RVVSignedBinBuiltinSet;
+
+// 12.12. Vector Widening Integer Multiply Instructions
+let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
+defm vwmul : RVVOutOp0Op1BuiltinSet<"vwmul", "csi",
+                                    [["vv", "w", "wvv"],
+                                     ["vx", "w", "wve"]]>;
+defm vwmulu : RVVOutOp0Op1BuiltinSet<"vwmulu", "csi",
+                                     [["vv", "Uw", "UwUvUv"],
+                                      ["vx", "Uw", "UwUvUe"]]>;
+defm vwmulsu : RVVOutOp0Op1BuiltinSet<"vwmulsu", "csi",
+                                      [["vv", "w", "wvUv"],
+                                       ["vx", "w", "wvUe"]]>;
+}
+
+// 12.13. Vector Single-Width Integer Multiply-Add Instructions
+let HasMaskedOffOperand = false in {
+  defm vmacc : RVVIntTerBuiltinSet;
+  defm vnmsac : RVVIntTerBuiltinSet;
+  defm vmadd : RVVIntTerBuiltinSet;
+  defm vnmsub : RVVIntTerBuiltinSet;
+}
+
+// 12.14. Vector Widening Integer Multiply-Add Instructions
+let HasMaskedOffOperand = false,
+    Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
+defm vwmaccu : RVVOutOp1Op2BuiltinSet<"vwmaccu", "csi",
+                                      [["vv", "Uw", "UwUwUvUv"],
+                                       ["vx", "Uw", "UwUwUeUv"]]>;
+defm vwmacc : RVVOutOp1Op2BuiltinSet<"vwmacc", "csi",
+                                     [["vv", "w", "wwvv"],
+                                      ["vx", "w", "wwev"]]>;
+defm vwmaccsu : RVVOutOp1Op2BuiltinSet<"vwmaccsu", "csi",
+                                       [["vv", "w", "wwvUv"],
+                                        ["vx", "w", "wweUv"]]>;
+defm vwmaccus : RVVOutOp1Op2BuiltinSet<"vwmaccus", "csi",
+                                       [["vx", "w", "wwUev"]]>;
+}
+
+// 12.15. Vector Integer Merge Instructions
+// TODO
+
+// 12.16. Vector Integer Move Instructions
+// TODO
+
+// 13. Vector Fixed-Point Arithmetic Instructions
+// 13.1. Vector Single-Width Saturating Add and Subtract
+defm vsaddu : RVVUnsignedBinBuiltinSet;
+defm vsadd : RVVSignedBinBuiltinSet;
+defm vssubu : RVVUnsignedBinBuiltinSet;
+defm vssub : RVVSignedBinBuiltinSet;
+
+// 13.2. Vector Single-Width Averaging Add and Subtract
+defm vaaddu : RVVUnsignedBinBuiltinSet;
+defm vaadd : RVVSignedBinBuiltinSet;
+defm vasubu : RVVUnsignedBinBuiltinSet;
+defm vasub : RVVSignedBinBuiltinSet;
+
+// 13.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
+defm vsmul : RVVSignedBinBuiltinSet;
+
+// 13.4. Vector Single-Width Scaling Shift Instructions
+defm vssrl : RVVUnsignedShiftBuiltinSet;
+defm vssra : RVVSignedShiftBuiltinSet;
+
+// 13.5. Vector Narrowing Fixed-Point Clip Instructions
+defm vnclipu : RVVUnsignedNShiftBuiltinSet;
+defm vnclip : RVVSignedNShiftBuiltinSet;
 
 // 14. Vector Floating-Point Instructions
 // 14.2. Vector Single-Width Floating-Point Add/Subtract Instructions
-defm vfadd : RVVBinBuiltinSet<"vfadd", "fd",
-                              [["vv", "v", "vvv"],
-                               ["vf", "v", "vve"]]>;
+defm vfadd : RVVFloatingBinBuiltinSet;

clang/include/clang/Driver/Options.td

@@ -2247,6 +2247,12 @@ def fno_objc_nonfragile_abi : Flag<["-"], "fno-objc-nonfragile-abi">, Group<f_Gr
 def fobjc_sender_dependent_dispatch : Flag<["-"], "fobjc-sender-dependent-dispatch">, Group<f_Group>;
 def foffload_static_lib_EQ : CommaJoined<["-"], "foffload-static-lib=">, Flags<[NoXarchOption, CoreOption]>, Group<offload_lib_Group>;
 def foffload_whole_static_lib_EQ : CommaJoined<["-"], "foffload-whole-static-lib=">, Flags<[NoXarchOption, CoreOption]>, Group<offload_lib_Group>;
+def fobjc_disable_direct_methods_for_testing :
+  Flag<["-"], "fobjc-disable-direct-methods-for-testing">,
+  Group<f_Group>, Flags<[CC1Option]>,
+  HelpText<"Ignore attribute objc_direct so that direct methods can be tested">,
+  MarshallingInfoFlag<LangOpts<"ObjCDisableDirectMethodsForTesting">>;
+
 def fomit_frame_pointer : Flag<["-"], "fomit-frame-pointer">, Group<f_Group>;
 def fopenmp : Flag<["-"], "fopenmp">, Group<f_Group>, Flags<[CC1Option, NoArgumentUnused, FlangOption, FC1Option]>,
   HelpText<"Parse OpenMP pragmas and generate parallel code.">;

clang/include/clang/Frontend/FrontendOptions.h

@@ -16,9 +16,9 @@
 #include "clang/Serialization/ModuleFileExtension.h"
 #include "llvm/ADT/StringRef.h"
 #include <cassert>
+#include <map>
 #include <memory>
 #include <string>
-#include <unordered_map>
 #include <vector>
 
 namespace llvm {
@@ -404,7 +404,7 @@ class FrontendOptions {
   std::string ActionName;
 
   /// Args to pass to the plugins
-  std::unordered_map<std::string,std::vector<std::string>> PluginArgs;
+  std::map<std::string, std::vector<std::string>> PluginArgs;
 
   /// The list of plugin actions to run in addition to the normal action.
   std::vector<std::string> AddPluginActions;