diff --git a/clang-tools-extra/clangd/DumpAST.cpp b/clang-tools-extra/clangd/DumpAST.cpp index 36d61aca70fa6..22bad6f915142 100644 --- a/clang-tools-extra/clangd/DumpAST.cpp +++ b/clang-tools-extra/clangd/DumpAST.cpp @@ -295,7 +295,7 @@ class DumpVisitor : public RecursiveASTVisitor { } std::string getDetail(const TemplateName &TN) { return toString([&](raw_ostream &OS) { - TN.print(OS, Ctx.getPrintingPolicy(), /*SuppressNNS=*/true); + TN.print(OS, Ctx.getPrintingPolicy(), TemplateName::Qualified::None); }); } std::string getDetail(const Attr *A) { diff --git a/clang-tools-extra/clangd/PathMapping.cpp b/clang-tools-extra/clangd/PathMapping.cpp index 0cd9d22b998ca..cc98025393841 100644 --- a/clang-tools-extra/clangd/PathMapping.cpp +++ b/clang-tools-extra/clangd/PathMapping.cpp @@ -40,7 +40,7 @@ llvm::Optional doPathMapping(llvm::StringRef S, llvm::StringRef Body = Uri->body(); if (Body.consume_front(From) && (Body.empty() || Body.front() == '/')) { std::string MappedBody = (To + Body).str(); - return URI(Uri->scheme(), Uri->authority(), MappedBody.c_str()) + return URI(Uri->scheme(), Uri->authority(), MappedBody) .toString(); } } diff --git a/clang-tools-extra/docs/clang-tidy/checks/abseil-no-internal-dependencies.rst b/clang-tools-extra/docs/clang-tidy/checks/abseil-no-internal-dependencies.rst index 75e72adf5f36b..1032cc3db5fae 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/abseil-no-internal-dependencies.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/abseil-no-internal-dependencies.rst @@ -5,7 +5,7 @@ abseil-no-internal-dependencies Warns if code using Abseil depends on internal details. If something is in a namespace that includes the word "internal", code is not allowed to depend upon -it beaucse it’s an implementation detail. They cannot friend it, include it, +it because it’s an implementation detail. They cannot friend it, include it, you mention it or refer to it in any way. Doing so violates Abseil's compatibility guidelines and may result in breakage. See https://abseil.io/about/compatibility for more information. diff --git a/clang-tools-extra/docs/clang-tidy/checks/abseil-time-subtraction.rst b/clang-tools-extra/docs/clang-tidy/checks/abseil-time-subtraction.rst index 196c07362ffc4..c717ed389216a 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/abseil-time-subtraction.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/abseil-time-subtraction.rst @@ -25,7 +25,7 @@ Examples: int x; absl::Time t; - // Original - absl::Duration result and first operand is a absl::Time. + // Original - absl::Duration result and first operand is an absl::Time. absl::Duration d = absl::Seconds(absl::ToUnixSeconds(t) - x); // Suggestion - Perform subtraction in the Time domain instead. diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-fold-init-type.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-fold-init-type.rst index 3b1bd7ff3a79a..8c6872d72f11a 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-fold-init-type.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-fold-init-type.rst @@ -11,7 +11,7 @@ the latter, with ``operator+`` by default. This can cause loss of precision through: - Truncation: The following code uses a floating point range and an int - initial value, so trucation will happen at every application of ``operator+`` + initial value, so truncation will happen at every application of ``operator+`` and the result will be `0`, which might not be what the user expected. .. code-block:: c++ diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-redundant-branch-condition.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-redundant-branch-condition.rst index c2746914e754a..a6fff9c29ab24 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-redundant-branch-condition.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-redundant-branch-condition.rst @@ -41,7 +41,7 @@ is an operand of a logical "and" (``&&``) or a logical "or" (``||``) operator: In the first case (logical "and") the suggested fix is to remove the redundant condition variable and keep the other side of the ``&&``. In the second case -(logical "or") the whole ``if`` is removed similarily to the simple case on the +(logical "or") the whole ``if`` is removed similarly to the simple case on the top. The condition of the outer ``if`` statement may also be a logical "and" (``&&``) diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-signal-handler.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-signal-handler.rst index fa05460ab93da..3ef05711ba510 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-signal-handler.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-signal-handler.rst @@ -20,7 +20,7 @@ and has an alias name ``cert-sig30-c``. .. option:: AsyncSafeFunctionSet - Selects wich set of functions is considered as asynchronous-safe + Selects which set of functions is considered as asynchronous-safe (and therefore allowed in signal handlers). Value ``minimal`` selects a minimal set that is defined in the CERT SIG30-C rule and includes functions ``abort()``, ``_Exit()``, ``quick_exit()`` and ``signal()``. Value ``POSIX`` diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-suspicious-memory-comparison.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-suspicious-memory-comparison.rst index a2d5c6d9a23cc..2ae67eac523c9 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-suspicious-memory-comparison.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-suspicious-memory-comparison.rst @@ -8,12 +8,12 @@ arguments. The following cases are covered: **Case 1: Non-standard-layout type** -Comparing the object representaions of non-standard-layout objects may not +Comparing the object representations of non-standard-layout objects may not properly compare the value representations. **Case 2: Types with no unique object representation** -Objects with the same value may not have the same object representaion. +Objects with the same value may not have the same object representation. This may be caused by padding or floating-point types. See also: diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-too-small-loop-variable.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-too-small-loop-variable.rst index 702541d80dca9..1381adc5493ca 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-too-small-loop-variable.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-too-small-loop-variable.rst @@ -33,7 +33,7 @@ a larger user input. Upper limit for the magnitude bits of the loop variable. If it's set the check filters out those catches in which the loop variable's type has more magnitude bits as the specified upper limit. The default value is 16. - For example, if the user sets this option to 31 (bits), then a 32-bit ``unsigend int`` + For example, if the user sets this option to 31 (bits), then a 32-bit ``unsigned int`` is ignored by the check, however a 32-bit ``int`` is not (A 32-bit ``signed int`` has 31 magnitude bits). diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-exception-at-new.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-exception-at-new.rst index 01f59af49f816..764ef7a476bde 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-exception-at-new.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-exception-at-new.rst @@ -21,5 +21,5 @@ is allowed to propagate out of the function (exception handler is checked for types ``std::bad_alloc``, ``std::exception``, and catch-all handler). The check assumes that any user-defined ``operator new`` is either ``noexcept`` or may throw an exception of type ``std::bad_alloc`` (or derived -from it). Other exception types or exceptions occuring in the objects's +from it). Other exception types or exceptions occurring in the objects's constructor are not taken into account. diff --git a/clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst b/clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst index ca789766a6e24..653ed20829553 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst @@ -11,7 +11,7 @@ Options .. option:: MemSetNames - Specify extra functions to flag that act similarily to ``memset``. + Specify extra functions to flag that act similarly to ``memset``. Specify names in a semicolon delimited list. Default is an empty string. The check will detect the following functions: @@ -19,7 +19,7 @@ Options .. option:: MemCpyNames - Specify extra functions to flag that act similarily to ``memcpy``. + Specify extra functions to flag that act similarly to ``memcpy``. Specify names in a semicolon delimited list. Default is an empty string. The check will detect the following functions: @@ -28,7 +28,7 @@ Options .. option:: MemCmpNames - Specify extra functions to flag that act similarily to ``memcmp``. + Specify extra functions to flag that act similarly to ``memcmp``. Specify names in a semicolon delimited list. Default is an empty string. The check will detect the following functions: diff --git a/clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-narrowing-conversions.rst b/clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-narrowing-conversions.rst index 3502fb9c3bda9..4085bce4fc298 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-narrowing-conversions.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-narrowing-conversions.rst @@ -44,7 +44,7 @@ Options .. option:: WarnWithinTemplateInstantiation When `true`, the check will warn on narrowing conversions within template - instantations. `false` by default. + instantiations. `false` by default. .. option:: WarnOnEquivalentBitWidth diff --git a/clang-tools-extra/docs/clang-tidy/checks/google-upgrade-googletest-case.rst b/clang-tools-extra/docs/clang-tidy/checks/google-upgrade-googletest-case.rst index 511569e85746f..8759283a9c839 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/google-upgrade-googletest-case.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/google-upgrade-googletest-case.rst @@ -49,5 +49,5 @@ becomes For better consistency of user code, the check renames both virtual and non-virtual member functions with matching names in derived types. The check -tries to provide a only warning when a fix cannot be made safely, as is the case +tries to provide only a warning when a fix cannot be made safely, as is the case with some template and macro uses. diff --git a/clang-tools-extra/docs/clang-tidy/checks/hicpp-no-assembler.rst b/clang-tools-extra/docs/clang-tidy/checks/hicpp-no-assembler.rst index 8295895ec8889..0c5d3a4a10b6b 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/hicpp-no-assembler.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/hicpp-no-assembler.rst @@ -5,6 +5,6 @@ hicpp-no-assembler Check for assembler statements. No fix is offered. -Inline assembler is forbidden by the `High Intergrity C++ Coding Standard +Inline assembler is forbidden by the `High Integrity C++ Coding Standard `_ as it restricts the portability of code. diff --git a/clang-tools-extra/docs/clang-tidy/checks/readability-redundant-member-init.rst b/clang-tools-extra/docs/clang-tidy/checks/readability-redundant-member-init.rst index 57d551266ac0d..b2f86c4429cc5 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/readability-redundant-member-init.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/readability-redundant-member-init.rst @@ -29,7 +29,7 @@ Options When `true`, the check will ignore unnecessary base class initializations within copy constructors, since some compilers issue warnings/errors when - base classes are not explicitly intialized in copy constructors. For example, + base classes are not explicitly initialized in copy constructors. For example, ``gcc`` with ``-Wextra`` or ``-Werror=extra`` issues warning or error ``base class 'Bar' should be explicitly initialized in the copy constructor`` if ``Bar()`` were removed in the following example: diff --git a/clang/docs/LanguageExtensions.rst b/clang/docs/LanguageExtensions.rst index 41648de0e0178..5a3c438055248 100644 --- a/clang/docs/LanguageExtensions.rst +++ b/clang/docs/LanguageExtensions.rst @@ -3597,7 +3597,7 @@ specification, a stack is supported so that the ``pragma float_control`` settings can be pushed or popped. When ``pragma float_control(precise, on)`` is enabled, the section of code -governed by the pragma uses precise floating-point semantics, effectively +governed by the pragma uses precise floating point semantics, effectively ``-ffast-math`` is disabled and ``-ffp-contract=on`` (fused multiply add) is enabled. @@ -3608,29 +3608,8 @@ when ``pragma float_control(precise, off)`` is enabled, the section of code governed by the pragma behaves as though the command-line option ``-ffp-exception-behavior=ignore`` is enabled. -When ``pragma float_control(source, on)`` is enabled, the section of code governed -by the pragma behaves as though the command-line option -``-ffp-eval-method=source`` is enabled. Note: The default -floating-point evaluation method is target-specific, typically ``source``. - -When ``pragma float_control(double, on)`` is enabled, the section of code governed -by the pragma behaves as though the command-line option -``-ffp-eval-method=double`` is enabled. - -When ``pragma float_control(extended, on)`` is enabled, the section of code governed -by the pragma behaves as though the command-line option -``-ffp-eval-method=extended`` is enabled. - -When ``pragma float_control(source, off)`` or -``pragma float_control(double, off)`` or -``pragma float_control(extended, off)`` is enabled, -the section of code governed -by the pragma behaves as though the command-line option -``-ffp-eval-method=source`` is enabled, returning floating-point evaluation -method to the default setting. - The full syntax this pragma supports is -``float_control(except|precise|source|double|extended, on|off [, push])`` and +``float_control(except|precise, on|off [, push])`` and ``float_control(push|pop)``. The ``push`` and ``pop`` forms, including using ``push`` as the optional third argument, can only occur at file scope. diff --git a/clang/docs/UsersManual.rst b/clang/docs/UsersManual.rst index f8a2f39f65224..f025028c1721d 100644 --- a/clang/docs/UsersManual.rst +++ b/clang/docs/UsersManual.rst @@ -1478,17 +1478,6 @@ Note that floating-point operations performed as part of constant initialization * ``maytrap`` The compiler avoids transformations that may raise exceptions that would not have been raised by the original code. Constant folding performed by the compiler is exempt from this option. * ``strict`` The compiler ensures that all transformations strictly preserve the floating point exception semantics of the original code. -.. option:: -ffp-eval-method= - - Specify the floating-point evaluation method. - - Valid values are: ``source``, ``double``, and ``extended``. - The default value is target-specific, typically ``source``. Details: - - * ``source`` The compiler uses the floating-point type declared in the source program as the evaluation method. - * ``double`` The compiler uses ``double`` as the floating-point evaluation method for all float expressions of type that is narrower than ``double``. - * ``extended`` The compiler uses ``long double`` as the floating-point evaluation method for all float expressions of type that is narrower than ``long double``. - .. option:: -f[no-]protect-parens: This option pertains to floating-point types, complex types with diff --git a/clang/include/clang/AST/TemplateName.h b/clang/include/clang/AST/TemplateName.h index 010b813dc5253..2befb5c1b45e0 100644 --- a/clang/include/clang/AST/TemplateName.h +++ b/clang/include/clang/AST/TemplateName.h @@ -309,16 +309,17 @@ class TemplateName { /// unexpanded parameter pack (for C++0x variadic templates). bool containsUnexpandedParameterPack() const; + enum class Qualified { None, AsWritten, Fully }; /// Print the template name. /// /// \param OS the output stream to which the template name will be /// printed. /// - /// \param SuppressNNS if true, don't print the - /// nested-name-specifier that precedes the template name (if it has - /// one). + /// \param Qual print the (Qualified::None) simple name, + /// (Qualified::AsWritten) any written (possibly partial) qualifier, or + /// (Qualified::Fully) the fully qualified name. void print(raw_ostream &OS, const PrintingPolicy &Policy, - bool SuppressNNS = false) const; + Qualified Qual = Qualified::AsWritten) const; /// Debugging aid that dumps the template name. void dump(raw_ostream &OS) const; diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h index 3741ea9989b6e..d7517f2e6f9fe 100644 --- a/clang/include/clang/AST/Type.h +++ b/clang/include/clang/AST/Type.h @@ -3534,14 +3534,10 @@ class DependentSizedMatrixType final : public MatrixType { Expr *ColumnExpr, SourceLocation loc); public: - QualType getElementType() const { return ElementType; } Expr *getRowExpr() const { return RowExpr; } Expr *getColumnExpr() const { return ColumnExpr; } SourceLocation getAttributeLoc() const { return loc; } - bool isSugared() const { return false; } - QualType desugar() const { return QualType(this, 0); } - static bool classof(const Type *T) { return T->getTypeClass() == DependentSizedMatrix; } diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td b/clang/include/clang/Basic/DiagnosticDriverKinds.td index bcf58b92151b7..06ab006ccfa52 100644 --- a/clang/include/clang/Basic/DiagnosticDriverKinds.td +++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td @@ -29,6 +29,9 @@ def err_drv_invalid_riscv_arch_name : Error< "invalid arch name '%0', %1">; def err_drv_invalid_riscv_ext_arch_name : Error< "invalid arch name '%0', %1 '%2'">; +def warn_drv_invalid_arch_name_with_suggestion : Warning< + "ignoring invalid /arch: argument '%0'; for %select{64|32}1-bit expected one of %2">, + InGroup; def warn_drv_avr_mcu_not_specified : Warning< "no target microcontroller specified on command line, cannot " "link standard libraries, please pass -mmcu=">, diff --git a/clang/include/clang/Basic/DiagnosticIDs.h b/clang/include/clang/Basic/DiagnosticIDs.h index 53a2dbee73936..90ce0fde5150a 100644 --- a/clang/include/clang/Basic/DiagnosticIDs.h +++ b/clang/include/clang/Basic/DiagnosticIDs.h @@ -28,7 +28,7 @@ namespace clang { // Size of each of the diagnostic categories. enum { DIAG_SIZE_COMMON = 300, - DIAG_SIZE_DRIVER = 250, + DIAG_SIZE_DRIVER = 260, DIAG_SIZE_FRONTEND = 150, DIAG_SIZE_SERIALIZATION = 120, DIAG_SIZE_LEX = 400, diff --git a/clang/include/clang/Basic/FPOptions.def b/clang/include/clang/Basic/FPOptions.def index 224c1827144f5..a93fa475cd5f6 100644 --- a/clang/include/clang/Basic/FPOptions.def +++ b/clang/include/clang/Basic/FPOptions.def @@ -23,5 +23,4 @@ OPTION(NoHonorInfs, bool, 1, NoHonorNaNs) OPTION(NoSignedZero, bool, 1, NoHonorInfs) OPTION(AllowReciprocal, bool, 1, NoSignedZero) OPTION(AllowApproxFunc, bool, 1, AllowReciprocal) -OPTION(FPEvalMethod, LangOptions::FPEvalMethodKind, 2, AllowApproxFunc) #undef OPTION diff --git a/clang/include/clang/Basic/LangOptions.def b/clang/include/clang/Basic/LangOptions.def index 4ca0d2d72cac6..80e5685d16667 100644 --- a/clang/include/clang/Basic/LangOptions.def +++ b/clang/include/clang/Basic/LangOptions.def @@ -310,7 +310,6 @@ BENIGN_ENUM_LANGOPT(DefaultFPContractMode, FPModeKind, 2, FPM_Off, "FP contracti COMPATIBLE_LANGOPT(ExpStrictFP, 1, false, "Enable experimental strict floating point") BENIGN_ENUM_LANGOPT(FPRoundingMode, RoundingMode, 3, RoundingMode::NearestTiesToEven, "FP Rounding Mode type") BENIGN_ENUM_LANGOPT(FPExceptionMode, FPExceptionModeKind, 2, FPE_Ignore, "FP Exception Behavior Mode type") -BENIGN_ENUM_LANGOPT(FPEvalMethod, FPEvalMethodKind, 2, FEM_TargetDefault, "FP type used for floating point arithmetic") LANGOPT(NoBitFieldTypeAlign , 1, 0, "bit-field type alignment") LANGOPT(HexagonQdsp6Compat , 1, 0, "hexagon-qdsp6 backward compatibility") LANGOPT(ObjCAutoRefCount , 1, 0, "Objective-C automated reference counting") diff --git a/clang/include/clang/Basic/LangOptions.h b/clang/include/clang/Basic/LangOptions.h index 4205054672624..0287abde66095 100644 --- a/clang/include/clang/Basic/LangOptions.h +++ b/clang/include/clang/Basic/LangOptions.h @@ -238,19 +238,6 @@ class LangOptions : public LangOptionsBase { /// Possible exception handling behavior. enum class ExceptionHandlingKind { None, SjLj, WinEH, DwarfCFI, Wasm }; - /// Possible float expression evaluation method choices. - enum FPEvalMethodKind { - /// Use the declared type for fp arithmetic. - FEM_Source, - /// Use the type double for fp arithmetic. - FEM_Double, - /// Use extended type for fp arithmetic. - FEM_Extended, - /// Use the default float eval method specified by Target: - // most targets are defined with evaluation method FEM_Source. - FEM_TargetDefault - }; - enum class LaxVectorConversionKind { /// Permit no implicit vector bitcasts. None, @@ -568,7 +555,6 @@ class FPOptions { setAllowFEnvAccess(true); else setAllowFEnvAccess(LangOptions::FPM_Off); - setFPEvalMethod(LO.getFPEvalMethod()); } bool allowFPContractWithinStatement() const { diff --git a/clang/include/clang/Basic/PragmaKinds.h b/clang/include/clang/Basic/PragmaKinds.h index 24b6858e8c237..82c0d5f0a551c 100644 --- a/clang/include/clang/Basic/PragmaKinds.h +++ b/clang/include/clang/Basic/PragmaKinds.h @@ -32,10 +32,7 @@ enum PragmaFloatControlKind { PFC_Except, // #pragma float_control(except [,on]) PFC_NoExcept, // #pragma float_control(except, off) PFC_Push, // #pragma float_control(push) - PFC_Pop, // #pragma float_control(pop) - PFC_Source, // #pragma float_control(source, {on|off} [,push]) - PFC_Double, // #pragma float_control(double, {on|off} [,push]) - PFC_Extended, // #pragma float_control(extended, {on|off} [,push]) + PFC_Pop // #pragma float_control(pop) }; } diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index fe6f67d40b532..c0e2b758d3eab 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -684,8 +684,7 @@ class TargetInfo : public virtual TransferrableTargetInfo, } /// Return the value for the C99 FLT_EVAL_METHOD macro. - // Note: implementation defined values may be negative. - virtual int getFPEvalMethod() const { return 0; } + virtual unsigned getFloatEvalMethod() const { return 0; } // getLargeArrayMinWidth/Align - Return the minimum array size that is // 'large' and its alignment. diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 349a10fbafd7a..211597c74a4e8 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -1484,11 +1484,6 @@ def : Flag<["-"], "fextended-identifiers">, Group; def : Flag<["-"], "fno-extended-identifiers">, Group, Flags<[Unsupported]>; def fhosted : Flag<["-"], "fhosted">, Group; def fdenormal_fp_math_EQ : Joined<["-"], "fdenormal-fp-math=">, Group, Flags<[CC1Option]>; -def ffp_eval_method_EQ : Joined<["-"], "ffp-eval-method=">, Group, Flags<[CC1Option]>, - HelpText<"Specifies the evaluation method to use for floating-point arithmetic.">, - Values<"source,double,extended">, NormalizedValuesScope<"LangOptions">, - NormalizedValues<["FEM_Source", "FEM_Double", "FEM_Extended"]>, - MarshallingInfoEnum, "FEM_TargetDefault">; def ffp_model_EQ : Joined<["-"], "ffp-model=">, Group, Flags<[NoXarchOption]>, HelpText<"Controls the semantics of floating-point calculations.">; def ffp_exception_behavior_EQ : Joined<["-"], "ffp-exception-behavior=">, Group, Flags<[CC1Option]>, @@ -3773,8 +3768,10 @@ def multi__module : Flag<["-"], "multi_module">; def multiply__defined__unused : Separate<["-"], "multiply_defined_unused">; def multiply__defined : Separate<["-"], "multiply_defined">; def mwarn_nonportable_cfstrings : Flag<["-"], "mwarn-nonportable-cfstrings">, Group; +def canonical_prefixes : Flag<["-"], "canonical-prefixes">, Flags<[HelpHidden, CoreOption]>, + HelpText<"Use absolute paths for invoking subcommands (default)">; def no_canonical_prefixes : Flag<["-"], "no-canonical-prefixes">, Flags<[HelpHidden, CoreOption]>, - HelpText<"Use relative instead of canonical paths">; + HelpText<"Use relative paths for invoking subcommands">; def no_cpp_precomp : Flag<["-"], "no-cpp-precomp">, Group; def no_integrated_cpp : Flag<["-", "--"], "no-integrated-cpp">, Flags<[NoXarchOption]>; def no_pedantic : Flag<["-", "--"], "no-pedantic">, Group; diff --git a/clang/include/clang/Frontend/CompilerInvocation.h b/clang/include/clang/Frontend/CompilerInvocation.h index 2245439d06326..922c84a3bee2c 100644 --- a/clang/include/clang/Frontend/CompilerInvocation.h +++ b/clang/include/clang/Frontend/CompilerInvocation.h @@ -50,6 +50,11 @@ class HeaderSearchOptions; class PreprocessorOptions; class TargetOptions; +// This lets us create the DiagnosticsEngine with a properly-filled-out +// DiagnosticOptions instance. +std::unique_ptr +CreateAndPopulateDiagOpts(ArrayRef Argv); + /// Fill out Opts based on the options given in Args. /// /// Args must have been created from the OptTable returned by diff --git a/clang/include/clang/Lex/HeaderSearch.h b/clang/include/clang/Lex/HeaderSearch.h index a35a394f719b0..7df1127f42735 100644 --- a/clang/include/clang/Lex/HeaderSearch.h +++ b/clang/include/clang/Lex/HeaderSearch.h @@ -51,7 +51,7 @@ class TargetInfo; /// The preprocessor keeps track of this information for each /// file that is \#included. struct HeaderFileInfo { - /// True if this is a \#import'd or \#pragma once file. + /// True if this is a \#import'd file. unsigned isImport : 1; /// True if this is a \#pragma once file. @@ -450,11 +450,10 @@ class HeaderSearch { return (SrcMgr::CharacteristicKind)getFileInfo(File).DirInfo; } - /// Mark the specified file as a "once only" file, e.g. due to + /// Mark the specified file as a "once only" file due to /// \#pragma once. void MarkFileIncludeOnce(const FileEntry *File) { HeaderFileInfo &FI = getFileInfo(File); - FI.isImport = true; FI.isPragmaOnce = true; } @@ -500,8 +499,7 @@ class HeaderSearch { /// This routine does not consider the effect of \#import bool isFileMultipleIncludeGuarded(const FileEntry *File); - /// Determine whether the given file is known to have ever been \#imported - /// (or if it has been \#included and we've encountered a \#pragma once). + /// Determine whether the given file is known to have ever been \#imported. bool hasFileBeenImported(const FileEntry *File) { const HeaderFileInfo *FI = getExistingFileInfo(File); return FI && FI->isImport; diff --git a/clang/include/clang/Lex/Preprocessor.h b/clang/include/clang/Lex/Preprocessor.h index a6c7d0bf0e5b8..1c7573ec87e14 100644 --- a/clang/include/clang/Lex/Preprocessor.h +++ b/clang/include/clang/Lex/Preprocessor.h @@ -179,17 +179,12 @@ class Preprocessor { IdentifierInfo *Ident__is_target_vendor; // __is_target_vendor IdentifierInfo *Ident__is_target_os; // __is_target_os IdentifierInfo *Ident__is_target_environment; // __is_target_environment - IdentifierInfo *Ident__FLT_EVAL_METHOD__ = nullptr; // __FLT_EVAL_METHOD__ // Weak, only valid (and set) while InMacroArgs is true. Token* ArgMacro; SourceLocation DATELoc, TIMELoc; - // Corresponding to __FLT_EVAL_METHOD__. Initialized from TargetInfo - // or the command line. Implementation-defined values can be negative. - int CurrentFPEvalMethod = 0; - // Next __COUNTER__ value, starts at 0. unsigned CounterValue = 0; @@ -2008,8 +2003,6 @@ class Preprocessor { } unsigned getCounterValue() const { return CounterValue; } void setCounterValue(unsigned V) { CounterValue = V; } - int getCurrentFPEvalMethod() const { return CurrentFPEvalMethod; } - void setCurrentFPEvalMethod(int V) { CurrentFPEvalMethod = V; } /// Retrieves the module that we're currently building, if any. Module *getCurrentModule(); diff --git a/clang/include/clang/Lex/PreprocessorOptions.h b/clang/include/clang/Lex/PreprocessorOptions.h index eea0c1a2986e2..a7aabc3e1df2a 100644 --- a/clang/include/clang/Lex/PreprocessorOptions.h +++ b/clang/include/clang/Lex/PreprocessorOptions.h @@ -146,9 +146,6 @@ class PreprocessorOptions { /// When enabled, the preprocessor will construct editor placeholder tokens. bool LexEditorPlaceholders = true; - /// When enabled, the preprocessor will expand special builtin macros. - bool LexExpandSpecialBuiltins = true; - /// True if the SourceManager should report the original file name for /// contents of files that were remapped to other files. Defaults to true. bool RemappedFilesKeepOriginalName = true; @@ -249,7 +246,6 @@ class PreprocessorOptions { ImplicitPCHInclude.clear(); SingleFileParseMode = false; LexEditorPlaceholders = true; - LexExpandSpecialBuiltins = true; RetainRemappedFileBuffers = true; PrecompiledPreambleBytes.first = 0; PrecompiledPreambleBytes.second = false; diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index b922474928454..edbeb7da81465 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -1678,15 +1678,19 @@ class Sema final { /// statements. class FPFeaturesStateRAII { public: - FPFeaturesStateRAII(Sema &S); - ~FPFeaturesStateRAII(); + FPFeaturesStateRAII(Sema &S) : S(S), OldFPFeaturesState(S.CurFPFeatures) { + OldOverrides = S.FpPragmaStack.CurrentValue; + } + ~FPFeaturesStateRAII() { + S.CurFPFeatures = OldFPFeaturesState; + S.FpPragmaStack.CurrentValue = OldOverrides; + } FPOptionsOverride getOverrides() { return OldOverrides; } private: Sema& S; FPOptions OldFPFeaturesState; FPOptionsOverride OldOverrides; - int OldEvalMethod; }; void addImplicitTypedef(StringRef Name, QualType T); diff --git a/clang/lib/AST/NestedNameSpecifier.cpp b/clang/lib/AST/NestedNameSpecifier.cpp index 21afdd1570f4b..8f19d80cbdc58 100644 --- a/clang/lib/AST/NestedNameSpecifier.cpp +++ b/clang/lib/AST/NestedNameSpecifier.cpp @@ -311,7 +311,8 @@ void NestedNameSpecifier::print(raw_ostream &OS, const PrintingPolicy &Policy, = dyn_cast(T)) { // Print the template name without its corresponding // nested-name-specifier. - SpecType->getTemplateName().print(OS, InnerPolicy, true); + SpecType->getTemplateName().print(OS, InnerPolicy, + TemplateName::Qualified::None); // Print the template argument list. printTemplateArgumentList(OS, SpecType->template_arguments(), diff --git a/clang/lib/AST/TemplateBase.cpp b/clang/lib/AST/TemplateBase.cpp index f44230d1bd03d..619ce42f9dd1d 100644 --- a/clang/lib/AST/TemplateBase.cpp +++ b/clang/lib/AST/TemplateBase.cpp @@ -452,7 +452,7 @@ void TemplateArgument::print(const PrintingPolicy &Policy, raw_ostream &Out, break; case Template: - getAsTemplate().print(Out, Policy); + getAsTemplate().print(Out, Policy, TemplateName::Qualified::Fully); break; case TemplateExpansion: diff --git a/clang/lib/AST/TemplateName.cpp b/clang/lib/AST/TemplateName.cpp index 22cfa9acbe1b2..c8bd74f0b5bb4 100644 --- a/clang/lib/AST/TemplateName.cpp +++ b/clang/lib/AST/TemplateName.cpp @@ -220,19 +220,28 @@ bool TemplateName::containsUnexpandedParameterPack() const { return getDependence() & TemplateNameDependence::UnexpandedPack; } -void -TemplateName::print(raw_ostream &OS, const PrintingPolicy &Policy, - bool SuppressNNS) const { +void TemplateName::print(raw_ostream &OS, const PrintingPolicy &Policy, + Qualified Qual) const { if (TemplateDecl *Template = Storage.dyn_cast()) - OS << *Template; + if (Qual == Qualified::Fully && + getDependence() != TemplateNameDependenceScope::DependentInstantiation) + Template->printQualifiedName(OS, Policy); + else + OS << *Template; else if (QualifiedTemplateName *QTN = getAsQualifiedTemplateName()) { - if (!SuppressNNS) + if (Qual == Qualified::Fully && + getDependence() != + TemplateNameDependenceScope::DependentInstantiation) { + QTN->getTemplateDecl()->printQualifiedName(OS, Policy); + return; + } + if (Qual == Qualified::AsWritten) QTN->getQualifier()->print(OS, Policy); if (QTN->hasTemplateKeyword()) OS << "template "; OS << *QTN->getDecl(); } else if (DependentTemplateName *DTN = getAsDependentTemplateName()) { - if (!SuppressNNS && DTN->getQualifier()) + if (Qual == Qualified::AsWritten && DTN->getQualifier()) DTN->getQualifier()->print(OS, Policy); OS << "template "; @@ -242,7 +251,7 @@ TemplateName::print(raw_ostream &OS, const PrintingPolicy &Policy, OS << "operator " << getOperatorSpelling(DTN->getOperator()); } else if (SubstTemplateTemplateParmStorage *subst = getAsSubstTemplateTemplateParm()) { - subst->getReplacement().print(OS, Policy, SuppressNNS); + subst->getReplacement().print(OS, Policy, Qual); } else if (SubstTemplateTemplateParmPackStorage *SubstPack = getAsSubstTemplateTemplateParmPack()) OS << *SubstPack->getParameterPack(); diff --git a/clang/lib/Basic/FileManager.cpp b/clang/lib/Basic/FileManager.cpp index 74cd2f295be60..c4eae6acd7b04 100644 --- a/clang/lib/Basic/FileManager.cpp +++ b/clang/lib/Basic/FileManager.cpp @@ -276,6 +276,18 @@ FileManager::getFileRef(StringRef Filename, bool openFile, bool CacheFailure) { } else { // Name mismatch. We need a redirect. First grab the actual entry we want // to return. + // + // This redirection logic intentionally leaks the external name of a + // redirected file that uses 'use-external-name' in \a + // vfs::RedirectionFileSystem. This allows clang to report the external + // name to users (in diagnostics) and to tools that don't have access to + // the VFS (in debug info and dependency '.d' files). + // + // FIXME: This is pretty complicated. It's also inconsistent with how + // "real" filesystems behave and confuses parts of clang expect to see the + // name-as-accessed on the \a FileEntryRef. Maybe the returned \a + // FileEntryRef::getName() could return the accessed name unmodified, but + // make the external name available via a separate API. auto &Redirection = *SeenFileEntries .insert({Status.getName(), FileEntryRef::MapValue(UFE, DirInfo)}) diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index e9dcc9e84dd7c..8004bc0f62f01 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -737,7 +737,7 @@ class AIXTargetInfo : public OSTargetInfo { } // AIX sets FLT_EVAL_METHOD to be 1. - int getFPEvalMethod() const override { return 1; } + unsigned getFloatEvalMethod() const override { return 1; } bool hasInt128Type() const override { return false; } bool defaultsToAIXPowerAlignment() const override { return true; } diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index c8afb71e7dfd1..8f16f3d9b475c 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -264,6 +264,9 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, } if (getTriple().isOSAIX()) { Builder.defineMacro("__THW_PPC__"); + // Define __PPC and __powerpc for AIX XL C/C++ compatibility + Builder.defineMacro("__PPC"); + Builder.defineMacro("__powerpc"); } // Target properties. diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h index 19b5b6d3063ed..b94eb880f90f7 100644 --- a/clang/lib/Basic/Targets/X86.h +++ b/clang/lib/Basic/Targets/X86.h @@ -166,7 +166,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo { return LongDoubleFormat == &llvm::APFloat::IEEEquad() ? "g" : "e"; } - int getFPEvalMethod() const override { + unsigned getFloatEvalMethod() const override { // X87 evaluates with 80 bits "long double" precision. return SSELevel == NoSSE ? 2 : 0; } @@ -469,12 +469,12 @@ class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) : NetBSDTargetInfo(Triple, Opts) {} - int getFPEvalMethod() const override { + unsigned getFloatEvalMethod() const override { unsigned Major, Minor, Micro; getTriple().getOSVersion(Major, Minor, Micro); // New NetBSD uses the default rounding mode. if (Major >= 7 || (Major == 6 && Minor == 99 && Micro >= 26) || Major == 0) - return X86_32TargetInfo::getFPEvalMethod(); + return X86_32TargetInfo::getFloatEvalMethod(); // NetBSD before 6.99.26 defaults to "double" rounding. return 1; } diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 6d1f6dccc41a8..bb8ef082fa72b 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -3068,17 +3068,37 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, // ZExt bool to int type. return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); } - case Builtin::BI__builtin_isnan: { CodeGenFunction::CGFPOptionsRAII FPOptsRAII(*this, E); Value *V = EmitScalarExpr(E->getArg(0)); + llvm::Type *Ty = V->getType(); + const llvm::fltSemantics &Semantics = Ty->getFltSemantics(); + if (!Builder.getIsFPConstrained() || + Builder.getDefaultConstrainedExcept() == fp::ebIgnore || + !Ty->isIEEE()) { + V = Builder.CreateFCmpUNO(V, V, "cmp"); + return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); + } if (Value *Result = getTargetHooks().testFPKind(V, BuiltinID, Builder, CGM)) return RValue::get(Result); - Function *F = CGM.getIntrinsic(Intrinsic::isnan, V->getType()); - Value *Call = Builder.CreateCall(F, V); - return RValue::get(Builder.CreateZExt(Call, ConvertType(E->getType()))); + // NaN has all exp bits set and a non zero significand. Therefore: + // isnan(V) == ((exp mask - (abs(V) & exp mask)) < 0) + unsigned bitsize = Ty->getScalarSizeInBits(); + llvm::IntegerType *IntTy = Builder.getIntNTy(bitsize); + Value *IntV = Builder.CreateBitCast(V, IntTy); + APInt AndMask = APInt::getSignedMaxValue(bitsize); + Value *AbsV = + Builder.CreateAnd(IntV, llvm::ConstantInt::get(IntTy, AndMask)); + APInt ExpMask = APFloat::getInf(Semantics).bitcastToAPInt(); + Value *Sub = + Builder.CreateSub(llvm::ConstantInt::get(IntTy, ExpMask), AbsV); + // V = sign bit (Sub) <=> V = (Sub < 0) + V = Builder.CreateLShr(Sub, llvm::ConstantInt::get(IntTy, bitsize - 1)); + if (bitsize > 32) + V = Builder.CreateTrunc(V, ConvertType(E->getType())); + return RValue::get(V); } case Builtin::BI__builtin_matrix_transpose: { @@ -18516,8 +18536,7 @@ RValue CodeGenFunction::EmitIntelFPGAMemBuiltin(const CallExpr *E) { llvm::Value *Ann = EmitAnnotationCall(F, PtrVal, AnnotStr, SourceLocation()); - cast(Ann)->addAttribute(llvm::AttributeList::FunctionIndex, - llvm::Attribute::ReadNone); + cast(Ann)->addFnAttr(llvm::Attribute::ReadNone); return RValue::get(Ann); } diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index afe452f155a35..e628cdbc242cc 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -5353,8 +5353,7 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo, if (getLangOpts().SYCLIsDevice && CI->doesNotReturn()) { if (auto *F = CI->getCalledFunction()) F->removeFnAttr(llvm::Attribute::NoReturn); - CI->removeAttribute(llvm::AttributeList::FunctionIndex, - llvm::Attribute::NoReturn); + CI->removeFnAttr(llvm::Attribute::NoReturn); SyclSkipNoReturn = true; } diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp b/clang/lib/CodeGen/CGDebugInfo.cpp index e18d702033993..2739aec1260d6 100644 --- a/clang/lib/CodeGen/CGDebugInfo.cpp +++ b/clang/lib/CodeGen/CGDebugInfo.cpp @@ -1233,7 +1233,8 @@ llvm::DIType *CGDebugInfo::CreateType(const TemplateSpecializationType *Ty, SmallString<128> NS; llvm::raw_svector_ostream OS(NS); - Ty->getTemplateName().print(OS, getPrintingPolicy(), /*qualified*/ false); + Ty->getTemplateName().print(OS, getPrintingPolicy(), + TemplateName::Qualified::None); printTemplateArgumentList(OS, Ty->template_arguments(), getPrintingPolicy()); SourceLocation Loc = AliasDecl->getLocation(); diff --git a/clang/lib/CodeGen/CodeGenFunction.cpp b/clang/lib/CodeGen/CodeGenFunction.cpp index 4356717272365..1e289596fa08e 100644 --- a/clang/lib/CodeGen/CodeGenFunction.cpp +++ b/clang/lib/CodeGen/CodeGenFunction.cpp @@ -2616,6 +2616,10 @@ Address CodeGenFunction::EmitFieldAnnotations(const FieldDecl *D, assert(D->hasAttr() && "no annotate attribute"); llvm::Value *V = Addr.getPointer(); llvm::Type *VTy = V->getType(); + auto *PTy = dyn_cast(VTy); + unsigned AS = PTy ? PTy->getAddressSpace() : 0; + llvm::PointerType *IntrinTy = + llvm::PointerType::getWithSamePointeeType(CGM.Int8PtrTy, AS); // llvm.ptr.annotation intrinsic accepts a pointer to integer of any width - // don't perform bitcasts if value is integer @@ -2628,11 +2632,11 @@ Address CodeGenFunction::EmitFieldAnnotations(const FieldDecl *D, return Address(V, Addr.getAlignment()); } - llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::ptr_annotation, - CGM.Int8PtrTy); + llvm::Function *F = + CGM.getIntrinsic(llvm::Intrinsic::ptr_annotation, IntrinTy); for (const auto *I : D->specific_attrs()) { - V = Builder.CreateBitCast(V, CGM.Int8PtrTy); + V = Builder.CreateBitCast(V, IntrinTy); V = EmitAnnotationCall(F, V, I->getAnnotation(), D->getLocation(), I); V = Builder.CreateBitCast(V, VTy); } diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index df5cfc3180c39..6db1bac448993 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -1325,7 +1325,8 @@ Compilation *Driver::BuildCompilation(ArrayRef ArgList) { // Silence driver warnings if requested Diags.setIgnoreAllWarnings(Args.hasArg(options::OPT_w)); - // -no-canonical-prefixes is used very early in main. + // -canonical-prefixes, -no-canonical-prefixes are used very early in main. + Args.ClaimAllArgs(options::OPT_canonical_prefixes); Args.ClaimAllArgs(options::OPT_no_canonical_prefixes); // f(no-)integated-cc1 is also used very early in main. @@ -4315,7 +4316,7 @@ class OffloadingActionBuilder final { for (StringRef Val : A->getValues()) { if (Val == "all") { - for (auto &K : devicelib_link_info.keys()) + for (const auto &K : devicelib_link_info.keys()) devicelib_link_info[K] = true && !NoDeviceLibs; break; } diff --git a/clang/lib/Driver/ToolChains/AVR.cpp b/clang/lib/Driver/ToolChains/AVR.cpp index 5a12406a51cc6..896afcc3474a4 100644 --- a/clang/lib/Driver/ToolChains/AVR.cpp +++ b/clang/lib/Driver/ToolChains/AVR.cpp @@ -315,7 +315,7 @@ AVRToolChain::AVRToolChain(const Driver &D, const llvm::Triple &Triple, if (!Args.hasArg(options::OPT_nostdlib) && !Args.hasArg(options::OPT_nodefaultlibs) && !Args.hasArg(options::OPT_c /* does not apply when not linking */)) { - std::string CPU = getCPUName(Args, Triple); + std::string CPU = getCPUName(D, Args, Triple); if (CPU.empty()) { // We cannot link any standard libraries without an MCU specified. @@ -389,8 +389,10 @@ void AVR::Linker::ConstructJob(Compilation &C, const JobAction &JA, const InputInfo &Output, const InputInfoList &Inputs, const ArgList &Args, const char *LinkingOutput) const { + const Driver &D = getToolChain().getDriver(); + // Compute information about the target AVR. - std::string CPU = getCPUName(Args, getToolChain().getTriple()); + std::string CPU = getCPUName(D, Args, getToolChain().getTriple()); llvm::Optional FamilyName = GetMCUFamilyName(CPU); llvm::Optional SectionAddressData = GetMCUSectionAddressData(CPU); @@ -414,9 +416,7 @@ void AVR::Linker::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back(Args.MakeArgString(DataSectionArg)); } else { // We do not have an entry for this CPU in the address mapping table yet. - getToolChain().getDriver().Diag( - diag::warn_drv_avr_linker_section_addresses_not_implemented) - << CPU; + D.Diag(diag::warn_drv_avr_linker_section_addresses_not_implemented) << CPU; } // If the family name is known, we can link with the device-specific libgcc. diff --git a/clang/lib/Driver/ToolChains/Arch/Mips.cpp b/clang/lib/Driver/ToolChains/Arch/Mips.cpp index 5a509dbb2bd31..c374d745da384 100644 --- a/clang/lib/Driver/ToolChains/Arch/Mips.cpp +++ b/clang/lib/Driver/ToolChains/Arch/Mips.cpp @@ -441,7 +441,8 @@ bool mips::isUCLibc(const ArgList &Args) { return A && A->getOption().matches(options::OPT_muclibc); } -bool mips::isNaN2008(const ArgList &Args, const llvm::Triple &Triple) { +bool mips::isNaN2008(const Driver &D, const ArgList &Args, + const llvm::Triple &Triple) { if (Arg *NaNArg = Args.getLastArg(options::OPT_mnan_EQ)) return llvm::StringSwitch(NaNArg->getValue()) .Case("2008", true) @@ -449,7 +450,7 @@ bool mips::isNaN2008(const ArgList &Args, const llvm::Triple &Triple) { .Default(false); // NaN2008 is the default for MIPS32r6/MIPS64r6. - return llvm::StringSwitch(getCPUName(Args, Triple)) + return llvm::StringSwitch(getCPUName(D, Args, Triple)) .Cases("mips32r6", "mips64r6", true) .Default(false); } diff --git a/clang/lib/Driver/ToolChains/Arch/Mips.h b/clang/lib/Driver/ToolChains/Arch/Mips.h index 074012f40fe58..f4c11a7e31882 100644 --- a/clang/lib/Driver/ToolChains/Arch/Mips.h +++ b/clang/lib/Driver/ToolChains/Arch/Mips.h @@ -44,7 +44,8 @@ std::string getMipsABILibSuffix(const llvm::opt::ArgList &Args, const llvm::Triple &Triple); bool hasMipsAbiArg(const llvm::opt::ArgList &Args, const char *Value); bool isUCLibc(const llvm::opt::ArgList &Args); -bool isNaN2008(const llvm::opt::ArgList &Args, const llvm::Triple &Triple); +bool isNaN2008(const Driver &D, const llvm::opt::ArgList &Args, + const llvm::Triple &Triple); bool isFP64ADefault(const llvm::Triple &Triple, StringRef CPUName); bool isFPXXDefault(const llvm::Triple &Triple, StringRef CPUName, StringRef ABIName, mips::FloatABI FloatABI); diff --git a/clang/lib/Driver/ToolChains/Arch/X86.cpp b/clang/lib/Driver/ToolChains/Arch/X86.cpp index 12749c7ec871c..bfa008f964e19 100644 --- a/clang/lib/Driver/ToolChains/Arch/X86.cpp +++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp @@ -11,6 +11,8 @@ #include "clang/Driver/Driver.h" #include "clang/Driver/DriverDiagnostic.h" #include "clang/Driver/Options.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringMap.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Option/ArgList.h" #include "llvm/Support/Host.h" @@ -20,7 +22,7 @@ using namespace clang::driver::tools; using namespace clang; using namespace llvm::opt; -std::string x86::getX86TargetCPU(const ArgList &Args, +std::string x86::getX86TargetCPU(const Driver &D, const ArgList &Args, const llvm::Triple &Triple) { if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_march_EQ)) { StringRef CPU = A->getValue(); @@ -37,29 +39,34 @@ std::string x86::getX86TargetCPU(const ArgList &Args, return std::string(CPU); } - if (const Arg *A = Args.getLastArgNoClaim(options::OPT__SLASH_arch)) { + if (const Arg *A = Args.getLastArg(options::OPT__SLASH_arch)) { // Mapping built by looking at lib/Basic's X86TargetInfo::initFeatureMap(). - StringRef Arch = A->getValue(); - StringRef CPU; - if (Triple.getArch() == llvm::Triple::x86) { // 32-bit-only /arch: flags. - CPU = llvm::StringSwitch(Arch) - .Case("IA32", "i386") - .Case("SSE", "pentium3") - .Case("SSE2", "pentium4") - .Default(""); + // The keys are case-sensitive; this matches link.exe. + // 32-bit and 64-bit /arch: flags. + llvm::StringMap ArchMap({ + {"AVX", "sandybridge"}, + {"AVX2", "haswell"}, + {"AVX512F", "knl"}, + {"AVX512", "skylake-avx512"}, + }); + if (Triple.getArch() == llvm::Triple::x86) { + // 32-bit-only /arch: flags. + ArchMap.insert({ + {"IA32", "i386"}, + {"SSE", "pentium3"}, + {"SSE2", "pentium4"}, + }); } - if (CPU.empty()) { // 32-bit and 64-bit /arch: flags. - CPU = llvm::StringSwitch(Arch) - .Case("AVX", "sandybridge") - .Case("AVX2", "haswell") - .Case("AVX512F", "knl") - .Case("AVX512", "skylake-avx512") - .Default(""); - } - if (!CPU.empty()) { - A->claim(); - return std::string(CPU); + StringRef CPU = ArchMap.lookup(A->getValue()); + if (CPU.empty()) { + std::vector ValidArchs{ArchMap.keys().begin(), + ArchMap.keys().end()}; + sort(ValidArchs); + D.Diag(diag::warn_drv_invalid_arch_name_with_suggestion) + << A->getValue() << (Triple.getArch() == llvm::Triple::x86) + << join(ValidArchs, ", "); } + return std::string(CPU); } // Select the default CPU if none was given (or detection failed). diff --git a/clang/lib/Driver/ToolChains/Arch/X86.h b/clang/lib/Driver/ToolChains/Arch/X86.h index 14f0a26c8be4d..36a2ab52899d7 100644 --- a/clang/lib/Driver/ToolChains/Arch/X86.h +++ b/clang/lib/Driver/ToolChains/Arch/X86.h @@ -21,7 +21,7 @@ namespace driver { namespace tools { namespace x86 { -std::string getX86TargetCPU(const llvm::opt::ArgList &Args, +std::string getX86TargetCPU(const Driver &D, const llvm::opt::ArgList &Args, const llvm::Triple &Triple); void getX86TargetFeatures(const Driver &D, const llvm::Triple &Triple, diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index c3719e52e536a..ad94efe32a520 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -1676,8 +1676,8 @@ void AddAAPCSVolatileBitfieldArgs(const ArgList &Args, ArgStringList &CmdArgs) { } namespace { -void RenderARMABI(const llvm::Triple &Triple, const ArgList &Args, - ArgStringList &CmdArgs) { +void RenderARMABI(const Driver &D, const llvm::Triple &Triple, + const ArgList &Args, ArgStringList &CmdArgs) { // Select the ABI to use. // FIXME: Support -meabi. // FIXME: Parts of this are duplicated in the backend, unify this somehow. @@ -1685,7 +1685,7 @@ void RenderARMABI(const llvm::Triple &Triple, const ArgList &Args, if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) { ABIName = A->getValue(); } else { - std::string CPU = getCPUName(Args, Triple, /*FromAs*/ false); + std::string CPU = getCPUName(D, Args, Triple, /*FromAs*/ false); ABIName = llvm::ARM::computeDefaultTargetABI(Triple, CPU).data(); } @@ -1696,7 +1696,7 @@ void RenderARMABI(const llvm::Triple &Triple, const ArgList &Args, void Clang::AddARMTargetArgs(const llvm::Triple &Triple, const ArgList &Args, ArgStringList &CmdArgs, bool KernelOrKext) const { - RenderARMABI(Triple, Args, CmdArgs); + RenderARMABI(getToolChain().getDriver(), Triple, Args, CmdArgs); // Determine floating point ABI from the options & target defaults. arm::FloatABI ABI = arm::getARMFloatABI(getToolChain(), Args); @@ -2720,8 +2720,6 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D, StringRef FPModel = ""; // -ffp-exception-behavior options: strict, maytrap, ignore StringRef FPExceptionBehavior = ""; - // -ffp-eval-method options: double, extended, source - StringRef FPEvalMethod = ""; const llvm::DenormalMode DefaultDenormalFPMath = TC.getDefaultDenormalModeForType(Args, JA); const llvm::DenormalMode DefaultDenormalFP32Math = @@ -2913,18 +2911,6 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D, break; } - // Validate and pass through -ffp-eval-method option. - case options::OPT_ffp_eval_method_EQ: { - StringRef Val = A->getValue(); - if (Val.equals("double") || Val.equals("extended") || - Val.equals("source")) - FPEvalMethod = Val; - else - D.Diag(diag::err_drv_unsupported_option_argument) - << A->getOption().getName() << Val; - break; - } - case options::OPT_ffinite_math_only: HonorINFs = false; HonorNaNs = false; @@ -3069,9 +3055,6 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D, CmdArgs.push_back(Args.MakeArgString("-ffp-exception-behavior=" + FPExceptionBehavior)); - if (!FPEvalMethod.empty()) - CmdArgs.push_back(Args.MakeArgString("-ffp-eval-method=" + FPEvalMethod)); - ParseMRecip(D, Args, CmdArgs); // -ffast-math enables the __FAST_MATH__ preprocessor macro, but check for the @@ -5044,7 +5027,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, case llvm::Triple::arm: case llvm::Triple::armeb: case llvm::Triple::thumbeb: - RenderARMABI(Triple, Args, CmdArgs); + RenderARMABI(D, Triple, Args, CmdArgs); break; case llvm::Triple::aarch64: case llvm::Triple::aarch64_32: @@ -5581,7 +5564,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, const ArgList &HostArgs = C.getArgsForToolChain(nullptr, StringRef(), Action::OFK_None); std::string HostCPU = - getCPUName(HostArgs, *TC.getAuxTriple(), /*FromAs*/ false); + getCPUName(D, HostArgs, *TC.getAuxTriple(), /*FromAs*/ false); if (!HostCPU.empty()) { CmdArgs.push_back("-aux-target-cpu"); CmdArgs.push_back(Args.MakeArgString(HostCPU)); @@ -5623,7 +5606,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, } // Add the target cpu - std::string CPU = getCPUName(Args, Triple, /*FromAs*/ false); + std::string CPU = getCPUName(D, Args, Triple, /*FromAs*/ false); if (!CPU.empty()) { CmdArgs.push_back("-target-cpu"); CmdArgs.push_back(Args.MakeArgString(CPU)); @@ -7980,7 +7963,7 @@ void ClangAs::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back(Clang::getBaseInputName(Args, Input)); // Add the target cpu - std::string CPU = getCPUName(Args, Triple, /*FromAs*/ true); + std::string CPU = getCPUName(D, Args, Triple, /*FromAs*/ true); if (!CPU.empty()) { CmdArgs.push_back("-target-cpu"); CmdArgs.push_back(Args.MakeArgString(CPU)); diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index 915e47ad187e6..490aaa44ce352 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -363,8 +363,8 @@ static StringRef getWebAssemblyTargetCPU(const ArgList &Args) { return "generic"; } -std::string tools::getCPUName(const ArgList &Args, const llvm::Triple &T, - bool FromAs) { +std::string tools::getCPUName(const Driver &D, const ArgList &Args, + const llvm::Triple &T, bool FromAs) { Arg *A; switch (T.getArch()) { @@ -450,7 +450,7 @@ std::string tools::getCPUName(const ArgList &Args, const llvm::Triple &T, case llvm::Triple::x86: case llvm::Triple::x86_64: - return x86::getX86TargetCPU(Args, T); + return x86::getX86TargetCPU(D, Args, T); case llvm::Triple::hexagon: return "hexagon" + @@ -518,7 +518,7 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const ArgList &Args, // the plugin. // Handle flags for selecting CPU variants. - std::string CPU = getCPUName(Args, ToolChain.getTriple()); + std::string CPU = getCPUName(D, Args, ToolChain.getTriple()); if (!CPU.empty()) CmdArgs.push_back(Args.MakeArgString(Twine("-plugin-opt=mcpu=") + CPU)); @@ -1717,22 +1717,26 @@ void tools::addOpenMPDeviceRTL(const Driver &D, : options::OPT_libomptarget_nvptx_bc_path_EQ; StringRef ArchPrefix = Triple.isAMDGCN() ? "amdgcn" : "nvptx"; + std::string LibOmpTargetName = "libomptarget-" + BitcodeSuffix.str() + ".bc"; + // First check whether user specifies bc library if (const Arg *A = DriverArgs.getLastArg(LibomptargetBCPathOpt)) { - std::string LibOmpTargetName(A->getValue()); - if (llvm::sys::fs::exists(LibOmpTargetName)) { + SmallString<128> LibOmpTargetFile(A->getValue()); + if (llvm::sys::fs::exists(LibOmpTargetFile) && + llvm::sys::fs::is_directory(LibOmpTargetFile)) { + llvm::sys::path::append(LibOmpTargetFile, LibOmpTargetName); + } + + if (llvm::sys::fs::exists(LibOmpTargetFile)) { CC1Args.push_back("-mlink-builtin-bitcode"); - CC1Args.push_back(DriverArgs.MakeArgString(LibOmpTargetName)); + CC1Args.push_back(DriverArgs.MakeArgString(LibOmpTargetFile)); } else { D.Diag(diag::err_drv_omp_offload_target_bcruntime_not_found) - << LibOmpTargetName; + << LibOmpTargetFile; } } else { bool FoundBCLibrary = false; - std::string LibOmpTargetName = - "libomptarget-" + BitcodeSuffix.str() + ".bc"; - for (StringRef LibraryPath : LibraryPaths) { SmallString<128> LibOmpTargetFile(LibraryPath); llvm::sys::path::append(LibOmpTargetFile, LibOmpTargetName); diff --git a/clang/lib/Driver/ToolChains/CommonArgs.h b/clang/lib/Driver/ToolChains/CommonArgs.h index c94c15864661e..8e48f3e7a5c32 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.h +++ b/clang/lib/Driver/ToolChains/CommonArgs.h @@ -107,8 +107,8 @@ void AddTargetFeature(const llvm::opt::ArgList &Args, llvm::opt::OptSpecifier OnOpt, llvm::opt::OptSpecifier OffOpt, StringRef FeatureName); -std::string getCPUName(const llvm::opt::ArgList &Args, const llvm::Triple &T, - bool FromAs = false); +std::string getCPUName(const Driver &D, const llvm::opt::ArgList &Args, + const llvm::Triple &T, bool FromAs = false); /// Iterate \p Args and convert -mxxx to +xxx and -mno-xxx to -xxx and /// append it to \p Features. diff --git a/clang/lib/Driver/ToolChains/FreeBSD.cpp b/clang/lib/Driver/ToolChains/FreeBSD.cpp index 5dcf74dabf4fc..2753876d28d45 100644 --- a/clang/lib/Driver/ToolChains/FreeBSD.cpp +++ b/clang/lib/Driver/ToolChains/FreeBSD.cpp @@ -99,7 +99,7 @@ void freebsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA, case llvm::Triple::sparc: case llvm::Triple::sparcel: case llvm::Triple::sparcv9: { - std::string CPU = getCPUName(Args, getToolChain().getTriple()); + std::string CPU = getCPUName(D, Args, getToolChain().getTriple()); CmdArgs.push_back( sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); AddAssemblerKPIC(getToolChain(), Args, CmdArgs); diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp index 47adfdadac6dd..09dc0da1e8946 100644 --- a/clang/lib/Driver/ToolChains/Gnu.cpp +++ b/clang/lib/Driver/ToolChains/Gnu.cpp @@ -489,7 +489,7 @@ void tools::gnutools::Linker::ConstructJob(Compilation &C, const JobAction &JA, // Most Android ARM64 targets should enable the linker fix for erratum // 843419. Only non-Cortex-A53 devices are allowed to skip this flag. if (Arch == llvm::Triple::aarch64 && isAndroid) { - std::string CPU = getCPUName(Args, Triple); + std::string CPU = getCPUName(D, Args, Triple); if (CPU.empty() || CPU == "generic" || CPU == "cortex-a53") CmdArgs.push_back("--fix-cortex-a53-843419"); } @@ -802,32 +802,32 @@ void tools::gnutools::Assembler::ConstructJob(Compilation &C, CmdArgs.push_back("-a32"); CmdArgs.push_back("-mppc"); CmdArgs.push_back("-mbig-endian"); - CmdArgs.push_back( - ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple()))); + CmdArgs.push_back(ppc::getPPCAsmModeForCPU( + getCPUName(D, Args, getToolChain().getTriple()))); break; } case llvm::Triple::ppcle: { CmdArgs.push_back("-a32"); CmdArgs.push_back("-mppc"); CmdArgs.push_back("-mlittle-endian"); - CmdArgs.push_back( - ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple()))); + CmdArgs.push_back(ppc::getPPCAsmModeForCPU( + getCPUName(D, Args, getToolChain().getTriple()))); break; } case llvm::Triple::ppc64: { CmdArgs.push_back("-a64"); CmdArgs.push_back("-mppc64"); CmdArgs.push_back("-mbig-endian"); - CmdArgs.push_back( - ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple()))); + CmdArgs.push_back(ppc::getPPCAsmModeForCPU( + getCPUName(D, Args, getToolChain().getTriple()))); break; } case llvm::Triple::ppc64le: { CmdArgs.push_back("-a64"); CmdArgs.push_back("-mppc64"); CmdArgs.push_back("-mlittle-endian"); - CmdArgs.push_back( - ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple()))); + CmdArgs.push_back(ppc::getPPCAsmModeForCPU( + getCPUName(D, Args, getToolChain().getTriple()))); break; } case llvm::Triple::riscv32: @@ -843,7 +843,7 @@ void tools::gnutools::Assembler::ConstructJob(Compilation &C, case llvm::Triple::sparc: case llvm::Triple::sparcel: { CmdArgs.push_back("-32"); - std::string CPU = getCPUName(Args, getToolChain().getTriple()); + std::string CPU = getCPUName(D, Args, getToolChain().getTriple()); CmdArgs.push_back( sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); AddAssemblerKPIC(getToolChain(), Args, CmdArgs); @@ -851,7 +851,7 @@ void tools::gnutools::Assembler::ConstructJob(Compilation &C, } case llvm::Triple::sparcv9: { CmdArgs.push_back("-64"); - std::string CPU = getCPUName(Args, getToolChain().getTriple()); + std::string CPU = getCPUName(D, Args, getToolChain().getTriple()); CmdArgs.push_back( sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); AddAssemblerKPIC(getToolChain(), Args, CmdArgs); @@ -1541,7 +1541,7 @@ bool clang::driver::findMIPSMultilibs(const Driver &D, addMultilibFlag(CPUName == "mips64r6", "march=mips64r6", Flags); addMultilibFlag(isMicroMips(Args), "mmicromips", Flags); addMultilibFlag(tools::mips::isUCLibc(Args), "muclibc", Flags); - addMultilibFlag(tools::mips::isNaN2008(Args, TargetTriple), "mnan=2008", + addMultilibFlag(tools::mips::isNaN2008(D, Args, TargetTriple), "mnan=2008", Flags); addMultilibFlag(ABIName == "n32", "mabi=n32", Flags); addMultilibFlag(ABIName == "n64", "mabi=n64", Flags); diff --git a/clang/lib/Driver/ToolChains/Linux.cpp b/clang/lib/Driver/ToolChains/Linux.cpp index 39e1c27acaf8c..9a71c2edf6ccd 100644 --- a/clang/lib/Driver/ToolChains/Linux.cpp +++ b/clang/lib/Driver/ToolChains/Linux.cpp @@ -458,7 +458,7 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const { case llvm::Triple::mipsel: case llvm::Triple::mips64: case llvm::Triple::mips64el: { - bool IsNaN2008 = tools::mips::isNaN2008(Args, Triple); + bool IsNaN2008 = tools::mips::isNaN2008(getDriver(), Args, Triple); LibDir = "lib" + tools::mips::getMipsABILibSuffix(Args, Triple); diff --git a/clang/lib/Driver/ToolChains/NetBSD.cpp b/clang/lib/Driver/ToolChains/NetBSD.cpp index 570c1bcabd696..0cadd2b7666c9 100644 --- a/clang/lib/Driver/ToolChains/NetBSD.cpp +++ b/clang/lib/Driver/ToolChains/NetBSD.cpp @@ -29,6 +29,8 @@ void netbsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA, const InputInfoList &Inputs, const ArgList &Args, const char *LinkingOutput) const { + const Driver &D = getToolChain().getDriver(); + claimNoWarnArgs(Args); ArgStringList CmdArgs; @@ -76,16 +78,18 @@ void netbsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA, case llvm::Triple::sparc: case llvm::Triple::sparcel: { CmdArgs.push_back("-32"); - std::string CPU = getCPUName(Args, getToolChain().getTriple()); - CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); + std::string CPU = getCPUName(D, Args, getToolChain().getTriple()); + CmdArgs.push_back( + sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); AddAssemblerKPIC(getToolChain(), Args, CmdArgs); break; } case llvm::Triple::sparcv9: { CmdArgs.push_back("-64"); - std::string CPU = getCPUName(Args, getToolChain().getTriple()); - CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); + std::string CPU = getCPUName(D, Args, getToolChain().getTriple()); + CmdArgs.push_back( + sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); AddAssemblerKPIC(getToolChain(), Args, CmdArgs); break; } diff --git a/clang/lib/Driver/ToolChains/OpenBSD.cpp b/clang/lib/Driver/ToolChains/OpenBSD.cpp index e162165b25613..1443d842347bd 100644 --- a/clang/lib/Driver/ToolChains/OpenBSD.cpp +++ b/clang/lib/Driver/ToolChains/OpenBSD.cpp @@ -45,8 +45,10 @@ void openbsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA, case llvm::Triple::sparcv9: { CmdArgs.push_back("-64"); - std::string CPU = getCPUName(Args, getToolChain().getTriple()); - CmdArgs.push_back(sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); + std::string CPU = getCPUName(getToolChain().getDriver(), Args, + getToolChain().getTriple()); + CmdArgs.push_back( + sparc::getSparcAsmModeForCPU(CPU, getToolChain().getTriple())); AddAssemblerKPIC(getToolChain(), Args, CmdArgs); break; } diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp index 10942a1ed33ee..6b5cd03f09164 100644 --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -2262,6 +2262,19 @@ void CompilerInvocation::GenerateDiagnosticArgs( } } +std::unique_ptr +clang::CreateAndPopulateDiagOpts(ArrayRef Argv) { + auto DiagOpts = std::make_unique(); + unsigned MissingArgIndex, MissingArgCount; + InputArgList Args = getDriverOptTable().ParseArgs( + Argv.slice(1), MissingArgIndex, MissingArgCount); + // We ignore MissingArgCount and the return value of ParseDiagnosticArgs. + // Any errors that would be diagnosed here will also be diagnosed later, + // when the DiagnosticsEngine actually exists. + (void)ParseDiagnosticArgs(*DiagOpts, Args); + return DiagOpts; +} + bool clang::ParseDiagnosticArgs(DiagnosticOptions &Opts, ArgList &Args, DiagnosticsEngine *Diags, bool DefaultDiagColor) { @@ -4314,13 +4327,8 @@ static bool ParsePreprocessorArgs(PreprocessorOptions &Opts, ArgList &Args, // Always avoid lexing editor placeholders when we're just running the // preprocessor as we never want to emit the // "editor placeholder in source file" error in PP only mode. - // Certain predefined macros which depend upon semantic processing, - // for example __FLT_EVAL_METHOD__, are not expanded in PP mode, they - // appear in the preprocessed output as an unexpanded macro name. - if (isStrictlyPreprocessorAction(Action)) { + if (isStrictlyPreprocessorAction(Action)) Opts.LexEditorPlaceholders = false; - Opts.LexExpandSpecialBuiltins = false; - } return Diags.getNumErrors() == NumErrorsBefore; } diff --git a/clang/lib/Frontend/InitPreprocessor.cpp b/clang/lib/Frontend/InitPreprocessor.cpp index 68f7249e6b916..b853aa8671950 100644 --- a/clang/lib/Frontend/InitPreprocessor.cpp +++ b/clang/lib/Frontend/InitPreprocessor.cpp @@ -1098,8 +1098,7 @@ static void InitializePredefinedMacros(const TargetInfo &TI, } // Macros to control C99 numerics and - // Note: __FLT_EVAL_METHOD__ is not defined here since it is a special - // builtin macro, its value may fluctuate during compilation. + Builder.defineMacro("__FLT_EVAL_METHOD__", Twine(TI.getFloatEvalMethod())); Builder.defineMacro("__FLT_RADIX__", "2"); Builder.defineMacro("__DECIMAL_DIG__", "__LDBL_DECIMAL_DIG__"); diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h index 34ec79d6acbc6..4803277472ee8 100644 --- a/clang/lib/Headers/intrin.h +++ b/clang/lib/Headers/intrin.h @@ -97,8 +97,9 @@ unsigned long __readcr8(void); unsigned int __readdr(unsigned int); #ifdef __i386__ unsigned char __readfsbyte(unsigned long); -unsigned __int64 __readfsqword(unsigned long); unsigned short __readfsword(unsigned long); +unsigned long __readfsdword(unsigned long); +unsigned __int64 __readfsqword(unsigned long); #endif unsigned __int64 __readmsr(unsigned long); unsigned __int64 __readpmc(unsigned long); diff --git a/clang/lib/Headers/opencl-c-base.h b/clang/lib/Headers/opencl-c-base.h index ff8b776d03bb8..f3605c659d952 100644 --- a/clang/lib/Headers/opencl-c-base.h +++ b/clang/lib/Headers/opencl-c-base.h @@ -30,7 +30,7 @@ #endif // (defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ >= 200) // Define feature macros for OpenCL C 2.0 -#if (defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ == 200) +#if (__OPENCL_CPP_VERSION__ == 100 || __OPENCL_C_VERSION__ == 200) #define __opencl_c_pipes 1 #define __opencl_c_generic_address_space 1 #define __opencl_c_work_group_collective_functions 1 @@ -45,12 +45,12 @@ #endif // Define header-only feature macros for OpenCL C 3.0. -#if (__OPENCL_C_VERSION__ == 300) +#if (__OPENCL_CPP_VERSION__ == 202100 || __OPENCL_C_VERSION__ == 300) // For the SPIR target all features are supported. #if defined(__SPIR__) #define __opencl_c_atomic_scope_all_devices 1 #endif // defined(__SPIR__) -#endif // (__OPENCL_C_VERSION__ == 300) +#endif // (__OPENCL_CPP_VERSION__ == 202100 || __OPENCL_C_VERSION__ == 300) // built-in scalar data types: diff --git a/clang/lib/Headers/opencl-c.h b/clang/lib/Headers/opencl-c.h index 501126bf13ecd..bb3ca6aae20a2 100644 --- a/clang/lib/Headers/opencl-c.h +++ b/clang/lib/Headers/opencl-c.h @@ -12070,33 +12070,28 @@ void __ovld vstore_half16_rtn(double16 data, size_t offset, __private half *p); * The address computed as (p + (offset * 4)) * must be aligned to sizeof (half) * 4 bytes. */ -float __ovld vloada_half(size_t offset, const __constant half *p); float2 __ovld vloada_half2(size_t offset, const __constant half *p); float3 __ovld vloada_half3(size_t offset, const __constant half *p); float4 __ovld vloada_half4(size_t offset, const __constant half *p); float8 __ovld vloada_half8(size_t offset, const __constant half *p); float16 __ovld vloada_half16(size_t offset, const __constant half *p); #if defined(__opencl_c_generic_address_space) -float __ovld vloada_half(size_t offset, const half *p); float2 __ovld vloada_half2(size_t offset, const half *p); float3 __ovld vloada_half3(size_t offset, const half *p); float4 __ovld vloada_half4(size_t offset, const half *p); float8 __ovld vloada_half8(size_t offset, const half *p); float16 __ovld vloada_half16(size_t offset, const half *p); #else -float __ovld vloada_half(size_t offset, const __global half *p); float2 __ovld vloada_half2(size_t offset, const __global half *p); float3 __ovld vloada_half3(size_t offset, const __global half *p); float4 __ovld vloada_half4(size_t offset, const __global half *p); float8 __ovld vloada_half8(size_t offset, const __global half *p); float16 __ovld vloada_half16(size_t offset, const __global half *p); -float __ovld vloada_half(size_t offset, const __local half *p); float2 __ovld vloada_half2(size_t offset, const __local half *p); float3 __ovld vloada_half3(size_t offset, const __local half *p); float4 __ovld vloada_half4(size_t offset, const __local half *p); float8 __ovld vloada_half8(size_t offset, const __local half *p); float16 __ovld vloada_half16(size_t offset, const __local half *p); -float __ovld vloada_half(size_t offset, const __private half *p); float2 __ovld vloada_half2(size_t offset, const __private half *p); float3 __ovld vloada_half3(size_t offset, const __private half *p); float4 __ovld vloada_half4(size_t offset, const __private half *p); @@ -12121,35 +12116,30 @@ float16 __ovld vloada_half16(size_t offset, const __private half *p); * round to nearest even. */ #if defined(__opencl_c_generic_address_space) -void __ovld vstorea_half(float data, size_t offset, half *p); void __ovld vstorea_half2(float2 data, size_t offset, half *p); void __ovld vstorea_half3(float3 data, size_t offset, half *p); void __ovld vstorea_half4(float4 data, size_t offset, half *p); void __ovld vstorea_half8(float8 data, size_t offset, half *p); void __ovld vstorea_half16(float16 data, size_t offset, half *p); -void __ovld vstorea_half_rte(float data, size_t offset, half *p); void __ovld vstorea_half2_rte(float2 data, size_t offset, half *p); void __ovld vstorea_half3_rte(float3 data, size_t offset, half *p); void __ovld vstorea_half4_rte(float4 data, size_t offset, half *p); void __ovld vstorea_half8_rte(float8 data, size_t offset, half *p); void __ovld vstorea_half16_rte(float16 data, size_t offset, half *p); -void __ovld vstorea_half_rtz(float data, size_t offset, half *p); void __ovld vstorea_half2_rtz(float2 data, size_t offset, half *p); void __ovld vstorea_half3_rtz(float3 data, size_t offset, half *p); void __ovld vstorea_half4_rtz(float4 data, size_t offset, half *p); void __ovld vstorea_half8_rtz(float8 data, size_t offset, half *p); void __ovld vstorea_half16_rtz(float16 data, size_t offset, half *p); -void __ovld vstorea_half_rtp(float data, size_t offset, half *p); void __ovld vstorea_half2_rtp(float2 data, size_t offset, half *p); void __ovld vstorea_half3_rtp(float3 data, size_t offset, half *p); void __ovld vstorea_half4_rtp(float4 data, size_t offset, half *p); void __ovld vstorea_half8_rtp(float8 data, size_t offset, half *p); void __ovld vstorea_half16_rtp(float16 data, size_t offset, half *p); -void __ovld vstorea_half_rtn(float data, size_t offset, half *p); void __ovld vstorea_half2_rtn(float2 data, size_t offset, half *p); void __ovld vstorea_half3_rtn(float3 data, size_t offset, half *p); void __ovld vstorea_half4_rtn(float4 data, size_t offset, half *p); @@ -12157,35 +12147,30 @@ void __ovld vstorea_half8_rtn(float8 data, size_t offset, half *p); void __ovld vstorea_half16_rtn(float16 data, size_t offset, half *p); #ifdef cl_khr_fp64 -void __ovld vstorea_half(double data, size_t offset, half *p); void __ovld vstorea_half2(double2 data, size_t offset, half *p); void __ovld vstorea_half3(double3 data, size_t offset, half *p); void __ovld vstorea_half4(double4 data, size_t offset, half *p); void __ovld vstorea_half8(double8 data, size_t offset, half *p); void __ovld vstorea_half16(double16 data, size_t offset, half *p); -void __ovld vstorea_half_rte(double data, size_t offset, half *p); void __ovld vstorea_half2_rte(double2 data, size_t offset, half *p); void __ovld vstorea_half3_rte(double3 data, size_t offset, half *p); void __ovld vstorea_half4_rte(double4 data, size_t offset, half *p); void __ovld vstorea_half8_rte(double8 data, size_t offset, half *p); void __ovld vstorea_half16_rte(double16 data, size_t offset, half *p); -void __ovld vstorea_half_rtz(double data, size_t offset, half *p); void __ovld vstorea_half2_rtz(double2 data, size_t offset, half *p); void __ovld vstorea_half3_rtz(double3 data, size_t offset, half *p); void __ovld vstorea_half4_rtz(double4 data, size_t offset, half *p); void __ovld vstorea_half8_rtz(double8 data, size_t offset, half *p); void __ovld vstorea_half16_rtz(double16 data, size_t offset, half *p); -void __ovld vstorea_half_rtp(double data, size_t offset, half *p); void __ovld vstorea_half2_rtp(double2 data, size_t offset, half *p); void __ovld vstorea_half3_rtp(double3 data, size_t offset, half *p); void __ovld vstorea_half4_rtp(double4 data, size_t offset, half *p); void __ovld vstorea_half8_rtp(double8 data, size_t offset, half *p); void __ovld vstorea_half16_rtp(double16 data, size_t offset, half *p); -void __ovld vstorea_half_rtn(double data, size_t offset, half *p); void __ovld vstorea_half2_rtn(double2 data, size_t offset, half *p); void __ovld vstorea_half3_rtn(double3 data, size_t offset, half *p); void __ovld vstorea_half4_rtn(double4 data, size_t offset, half *p); @@ -12194,105 +12179,90 @@ void __ovld vstorea_half16_rtn(double16 data, size_t offset, half *p); #endif //cl_khr_fp64 #else -void __ovld vstorea_half(float data, size_t offset, __global half *p); void __ovld vstorea_half2(float2 data, size_t offset, __global half *p); void __ovld vstorea_half3(float3 data, size_t offset, __global half *p); void __ovld vstorea_half4(float4 data, size_t offset, __global half *p); void __ovld vstorea_half8(float8 data, size_t offset, __global half *p); void __ovld vstorea_half16(float16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rte(float data, size_t offset, __global half *p); void __ovld vstorea_half2_rte(float2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rte(float3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rte(float4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rte(float8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rte(float16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rtz(float data, size_t offset, __global half *p); void __ovld vstorea_half2_rtz(float2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rtz(float3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rtz(float4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rtz(float8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rtz(float16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rtp(float data, size_t offset, __global half *p); void __ovld vstorea_half2_rtp(float2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rtp(float3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rtp(float4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rtp(float8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rtp(float16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rtn(float data, size_t offset, __global half *p); void __ovld vstorea_half2_rtn(float2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rtn(float3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rtn(float4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rtn(float8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rtn(float16 data, size_t offset, __global half *p); -void __ovld vstorea_half(float data, size_t offset, __local half *p); void __ovld vstorea_half2(float2 data, size_t offset, __local half *p); void __ovld vstorea_half3(float3 data, size_t offset, __local half *p); void __ovld vstorea_half4(float4 data, size_t offset, __local half *p); void __ovld vstorea_half8(float8 data, size_t offset, __local half *p); void __ovld vstorea_half16(float16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rte(float data, size_t offset, __local half *p); void __ovld vstorea_half2_rte(float2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rte(float3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rte(float4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rte(float8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rte(float16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rtz(float data, size_t offset, __local half *p); void __ovld vstorea_half2_rtz(float2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rtz(float3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rtz(float4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rtz(float8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rtz(float16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rtp(float data, size_t offset, __local half *p); void __ovld vstorea_half2_rtp(float2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rtp(float3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rtp(float4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rtp(float8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rtp(float16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rtn(float data, size_t offset, __local half *p); void __ovld vstorea_half2_rtn(float2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rtn(float3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rtn(float4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rtn(float8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rtn(float16 data, size_t offset, __local half *p); -void __ovld vstorea_half(float data, size_t offset, __private half *p); void __ovld vstorea_half2(float2 data, size_t offset, __private half *p); void __ovld vstorea_half3(float3 data, size_t offset, __private half *p); void __ovld vstorea_half4(float4 data, size_t offset, __private half *p); void __ovld vstorea_half8(float8 data, size_t offset, __private half *p); void __ovld vstorea_half16(float16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rte(float data, size_t offset, __private half *p); void __ovld vstorea_half2_rte(float2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rte(float3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rte(float4 data, size_t offset, __private half *p); void __ovld vstorea_half8_rte(float8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rte(float16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rtz(float data, size_t offset, __private half *p); void __ovld vstorea_half2_rtz(float2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rtz(float3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rtz(float4 data, size_t offset, __private half *p); void __ovld vstorea_half8_rtz(float8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rtz(float16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rtp(float data, size_t offset, __private half *p); void __ovld vstorea_half2_rtp(float2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rtp(float3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rtp(float4 data, size_t offset, __private half *p); void __ovld vstorea_half8_rtp(float8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rtp(float16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rtn(float data, size_t offset, __private half *p); void __ovld vstorea_half2_rtn(float2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rtn(float3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rtn(float4 data, size_t offset, __private half *p); @@ -12300,105 +12270,90 @@ void __ovld vstorea_half8_rtn(float8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rtn(float16 data, size_t offset, __private half *p); #ifdef cl_khr_fp64 -void __ovld vstorea_half(double data, size_t offset, __global half *p); void __ovld vstorea_half2(double2 data, size_t offset, __global half *p); void __ovld vstorea_half3(double3 data, size_t offset, __global half *p); void __ovld vstorea_half4(double4 data, size_t offset, __global half *p); void __ovld vstorea_half8(double8 data, size_t offset, __global half *p); void __ovld vstorea_half16(double16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rte(double data, size_t offset, __global half *p); void __ovld vstorea_half2_rte(double2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rte(double3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rte(double4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rte(double8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rte(double16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rtz(double data, size_t offset, __global half *p); void __ovld vstorea_half2_rtz(double2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rtz(double3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rtz(double4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rtz(double8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rtz(double16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rtp(double data, size_t offset, __global half *p); void __ovld vstorea_half2_rtp(double2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rtp(double3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rtp(double4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rtp(double8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rtp(double16 data, size_t offset, __global half *p); -void __ovld vstorea_half_rtn(double data, size_t offset, __global half *p); void __ovld vstorea_half2_rtn(double2 data, size_t offset, __global half *p); void __ovld vstorea_half3_rtn(double3 data, size_t offset, __global half *p); void __ovld vstorea_half4_rtn(double4 data, size_t offset, __global half *p); void __ovld vstorea_half8_rtn(double8 data, size_t offset, __global half *p); void __ovld vstorea_half16_rtn(double16 data, size_t offset, __global half *p); -void __ovld vstorea_half(double data, size_t offset, __local half *p); void __ovld vstorea_half2(double2 data, size_t offset, __local half *p); void __ovld vstorea_half3(double3 data, size_t offset, __local half *p); void __ovld vstorea_half4(double4 data, size_t offset, __local half *p); void __ovld vstorea_half8(double8 data, size_t offset, __local half *p); void __ovld vstorea_half16(double16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rte(double data, size_t offset, __local half *p); void __ovld vstorea_half2_rte(double2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rte(double3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rte(double4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rte(double8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rte(double16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rtz(double data, size_t offset, __local half *p); void __ovld vstorea_half2_rtz(double2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rtz(double3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rtz(double4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rtz(double8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rtz(double16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rtp(double data, size_t offset, __local half *p); void __ovld vstorea_half2_rtp(double2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rtp(double3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rtp(double4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rtp(double8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rtp(double16 data, size_t offset, __local half *p); -void __ovld vstorea_half_rtn(double data, size_t offset, __local half *p); void __ovld vstorea_half2_rtn(double2 data, size_t offset, __local half *p); void __ovld vstorea_half3_rtn(double3 data, size_t offset, __local half *p); void __ovld vstorea_half4_rtn(double4 data, size_t offset, __local half *p); void __ovld vstorea_half8_rtn(double8 data, size_t offset, __local half *p); void __ovld vstorea_half16_rtn(double16 data, size_t offset, __local half *p); -void __ovld vstorea_half(double data, size_t offset, __private half *p); void __ovld vstorea_half2(double2 data, size_t offset, __private half *p); void __ovld vstorea_half3(double3 data, size_t offset, __private half *p); void __ovld vstorea_half4(double4 data, size_t offset, __private half *p); void __ovld vstorea_half8(double8 data, size_t offset, __private half *p); void __ovld vstorea_half16(double16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rte(double data, size_t offset, __private half *p); void __ovld vstorea_half2_rte(double2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rte(double3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rte(double4 data, size_t offset, __private half *p); void __ovld vstorea_half8_rte(double8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rte(double16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rtz(double data, size_t offset, __private half *p); void __ovld vstorea_half2_rtz(double2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rtz(double3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rtz(double4 data, size_t offset, __private half *p); void __ovld vstorea_half8_rtz(double8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rtz(double16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rtp(double data, size_t offset, __private half *p); void __ovld vstorea_half2_rtp(double2 data, size_t offset, __private half *p); void __ovld vstorea_half3_rtp(double3 data, size_t offset, __private half *p); void __ovld vstorea_half4_rtp(double4 data, size_t offset, __private half *p); void __ovld vstorea_half8_rtp(double8 data, size_t offset, __private half *p); void __ovld vstorea_half16_rtp(double16 data, size_t offset, __private half *p); -void __ovld vstorea_half_rtn(double data, size_t offset, __private half *p); void __ovld vstorea_half2_rtn(double2 data,size_t offset, __private half *p); void __ovld vstorea_half3_rtn(double3 data,size_t offset, __private half *p); void __ovld vstorea_half4_rtn(double4 data,size_t offset, __private half *p); diff --git a/clang/lib/Interpreter/Interpreter.cpp b/clang/lib/Interpreter/Interpreter.cpp index 937504f34739f..3e8d3884049ba 100644 --- a/clang/lib/Interpreter/Interpreter.cpp +++ b/clang/lib/Interpreter/Interpreter.cpp @@ -147,15 +147,10 @@ IncrementalCompilerBuilder::create(std::vector &ClangArgv) { // Buffer diagnostics from argument parsing so that we can output them using a // well formed diagnostic object. IntrusiveRefCntPtr DiagID(new DiagnosticIDs()); - IntrusiveRefCntPtr DiagOpts = new DiagnosticOptions(); + IntrusiveRefCntPtr DiagOpts = + CreateAndPopulateDiagOpts(ClangArgv); TextDiagnosticBuffer *DiagsBuffer = new TextDiagnosticBuffer; DiagnosticsEngine Diags(DiagID, &*DiagOpts, DiagsBuffer); - unsigned MissingArgIndex, MissingArgCount; - const llvm::opt::OptTable &Opts = driver::getDriverOptTable(); - llvm::opt::InputArgList ParsedArgs = - Opts.ParseArgs(ArrayRef(ClangArgv).slice(1), - MissingArgIndex, MissingArgCount); - ParseDiagnosticArgs(*DiagOpts, ParsedArgs, &Diags); driver::Driver Driver(/*MainBinaryName=*/ClangArgv[0], llvm::sys::getProcessTriple(), Diags); diff --git a/clang/lib/Lex/HeaderSearch.cpp b/clang/lib/Lex/HeaderSearch.cpp index d5adbcf62cbc5..8bf61a2ba5972 100644 --- a/clang/lib/Lex/HeaderSearch.cpp +++ b/clang/lib/Lex/HeaderSearch.cpp @@ -91,7 +91,7 @@ void HeaderSearch::PrintStats() { << FileInfo.size() << " files tracked.\n"; unsigned NumOnceOnlyFiles = 0, MaxNumIncludes = 0, NumSingleIncludedFiles = 0; for (unsigned i = 0, e = FileInfo.size(); i != e; ++i) { - NumOnceOnlyFiles += FileInfo[i].isImport; + NumOnceOnlyFiles += (FileInfo[i].isPragmaOnce || FileInfo[i].isImport); if (MaxNumIncludes < FileInfo[i].NumIncludes) MaxNumIncludes = FileInfo[i].NumIncludes; NumSingleIncludedFiles += FileInfo[i].NumIncludes == 1; @@ -1325,7 +1325,7 @@ bool HeaderSearch::ShouldEnterIncludeFile(Preprocessor &PP, } else { // Otherwise, if this is a #include of a file that was previously #import'd // or if this is the second #include of a #pragma once file, ignore it. - if (FileInfo.isImport && !TryEnterImported()) + if ((FileInfo.isPragmaOnce || FileInfo.isImport) && !TryEnterImported()) return false; } diff --git a/clang/lib/Lex/PPMacroExpansion.cpp b/clang/lib/Lex/PPMacroExpansion.cpp index b909ff12cc226..7c31965f65927 100644 --- a/clang/lib/Lex/PPMacroExpansion.cpp +++ b/clang/lib/Lex/PPMacroExpansion.cpp @@ -345,11 +345,6 @@ void Preprocessor::RegisterBuiltinMacros() { Ident__TIME__ = RegisterBuiltinMacro(*this, "__TIME__"); Ident__COUNTER__ = RegisterBuiltinMacro(*this, "__COUNTER__"); Ident_Pragma = RegisterBuiltinMacro(*this, "_Pragma"); - if (PPOpts->LexExpandSpecialBuiltins) - // Suppress macro expansion if compiler stops before semantic analysis, - // the macro identifier will appear in the preprocessed output. - Ident__FLT_EVAL_METHOD__ = - RegisterBuiltinMacro(*this, "__FLT_EVAL_METHOD__"); // C++ Standing Document Extensions. if (getLangOpts().CPlusPlus) @@ -1605,10 +1600,6 @@ void Preprocessor::ExpandBuiltinMacro(Token &Tok) { // Surround the string with " and strip the trailing newline. OS << '"' << StringRef(Result).drop_back() << '"'; Tok.setKind(tok::string_literal); - } else if (II == Ident__FLT_EVAL_METHOD__) { - // __FLT_EVAL_METHOD__ expands to a simple numeric value. - OS << getCurrentFPEvalMethod(); - Tok.setKind(tok::numeric_constant); } else if (II == Ident__COUNTER__) { // __COUNTER__ expands to a simple numeric value. OS << CounterValue++; @@ -1708,7 +1699,8 @@ void Preprocessor::ExpandBuiltinMacro(Token &Tok) { return false; }); - } else if (II == Ident__has_cpp_attribute || II == Ident__has_c_attribute) { + } else if (II == Ident__has_cpp_attribute || + II == Ident__has_c_attribute) { bool IsCXX = II == Ident__has_cpp_attribute; EvaluateFeatureLikeBuiltinMacro( OS, Tok, II, *this, [&](Token &Tok, bool &HasLexedNextToken) -> int { @@ -1735,7 +1727,8 @@ void Preprocessor::ExpandBuiltinMacro(Token &Tok) { getLangOpts()) : 0; }); - } else if (II == Ident__has_include || II == Ident__has_include_next) { + } else if (II == Ident__has_include || + II == Ident__has_include_next) { // The argument to these two builtins should be a parenthesized // file name string literal using angle brackets (<>) or // double-quotes (""). diff --git a/clang/lib/Parse/ParsePragma.cpp b/clang/lib/Parse/ParsePragma.cpp index 55999a3301c2c..c33605ef90251 100644 --- a/clang/lib/Parse/ParsePragma.cpp +++ b/clang/lib/Parse/ParsePragma.cpp @@ -2676,27 +2676,21 @@ void PragmaFloatControlHandler::HandlePragma(Preprocessor &PP, // Read the identifier. PP.Lex(Tok); - PragmaFloatControlKind Kind; - if (Tok.is(tok::kw_double)) { - Kind = PFC_Double; - } else { - if (Tok.isNot(tok::identifier)) { - PP.Diag(Tok.getLocation(), diag::err_pragma_float_control_malformed); - return; - } + if (Tok.isNot(tok::identifier)) { + PP.Diag(Tok.getLocation(), diag::err_pragma_float_control_malformed); + return; + } - // Verify that this is one of the float control options. - IdentifierInfo *II = Tok.getIdentifierInfo(); - Kind = llvm::StringSwitch(II->getName()) - .Case("precise", PFC_Precise) - .Case("except", PFC_Except) - .Case("push", PFC_Push) - .Case("pop", PFC_Pop) - .Case("source", PFC_Source) - .Case("extended", PFC_Extended) - .Default(PFC_Unknown); - } - PP.Lex(Tok); // the first pragma token + // Verify that this is one of the float control options. + IdentifierInfo *II = Tok.getIdentifierInfo(); + PragmaFloatControlKind Kind = + llvm::StringSwitch(II->getName()) + .Case("precise", PFC_Precise) + .Case("except", PFC_Except) + .Case("push", PFC_Push) + .Case("pop", PFC_Pop) + .Default(PFC_Unknown); + PP.Lex(Tok); // the identifier if (Kind == PFC_Unknown) { PP.Diag(Tok.getLocation(), diag::err_pragma_float_control_malformed); return; @@ -2725,21 +2719,10 @@ void PragmaFloatControlHandler::HandlePragma(Preprocessor &PP, // Kind is set correctly ; else if (PushOnOff == "off") { - switch (Kind) { - default: - break; - case PFC_Precise: + if (Kind == PFC_Precise) Kind = PFC_NoPrecise; - break; - case PFC_Except: + if (Kind == PFC_Except) Kind = PFC_NoExcept; - break; - case PFC_Double: - case PFC_Extended: - // Reset eval mode to 'source' - Kind = PFC_Source; - break; - } } else if (PushOnOff == "push") { Action = Sema::PSK_Push_Set; } else { diff --git a/clang/lib/Sema/OpenCLBuiltins.td b/clang/lib/Sema/OpenCLBuiltins.td index 9c546996a290c..5f37bb4550a03 100644 --- a/clang/lib/Sema/OpenCLBuiltins.td +++ b/clang/lib/Sema/OpenCLBuiltins.td @@ -838,7 +838,6 @@ defm : VloadVstore<[ConstantAS], 0>; multiclass VloadVstoreHalf addrspaces, bit defStores> { foreach AS = addrspaces in { def : Builtin<"vload_half", [Float, Size, PointerType, AS>]>; - def : Builtin<"vloada_half", [Float, Size, PointerType, AS>]>; foreach VSize = [2, 3, 4, 8, 16] in { foreach name = ["vload_half" # VSize] in { def : Builtin, Size, PointerType, AS>]>; @@ -846,7 +845,7 @@ multiclass VloadVstoreHalf addrspaces, bit defStores> { } if defStores then { foreach rnd = ["", "_rte", "_rtz", "_rtp", "_rtn"] in { - foreach name = ["vstore_half" # rnd, "vstorea_half" # rnd] in { + foreach name = ["vstore_half" # rnd] in { def : Builtin]>; def : Builtin]>; } diff --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp index 9905862e854a1..dda8a0654e890 100644 --- a/clang/lib/Sema/Sema.cpp +++ b/clang/lib/Sema/Sema.cpp @@ -235,12 +235,6 @@ Sema::Sema(Preprocessor &pp, ASTContext &ctxt, ASTConsumer &consumer, SemaPPCallbackHandler = Callbacks.get(); PP.addPPCallbacks(std::move(Callbacks)); SemaPPCallbackHandler->set(*this); - if (getLangOpts().getFPEvalMethod() == LangOptions::FEM_TargetDefault) - // Use setting from TargetInfo. - PP.setCurrentFPEvalMethod(ctxt.getTargetInfo().getFPEvalMethod()); - else - // Set initial value of __FLT_EVAL_METHOD__ from the command line. - PP.setCurrentFPEvalMethod(getLangOpts().getFPEvalMethod()); } // Anchor Sema's type info to this TU. @@ -2612,14 +2606,3 @@ const llvm::MapVector & Sema::getMismatchingDeleteExpressions() const { return DeleteExprs; } - -Sema::FPFeaturesStateRAII::FPFeaturesStateRAII(Sema &S) - : S(S), OldFPFeaturesState(S.CurFPFeatures), - OldOverrides(S.FpPragmaStack.CurrentValue), - OldEvalMethod(S.PP.getCurrentFPEvalMethod()) {} - -Sema::FPFeaturesStateRAII::~FPFeaturesStateRAII() { - S.CurFPFeatures = OldFPFeaturesState; - S.FpPragmaStack.CurrentValue = OldOverrides; - S.PP.setCurrentFPEvalMethod(OldEvalMethod); -} diff --git a/clang/lib/Sema/SemaAttr.cpp b/clang/lib/Sema/SemaAttr.cpp index c19b44989b5f2..40d8beab76057 100644 --- a/clang/lib/Sema/SemaAttr.cpp +++ b/clang/lib/Sema/SemaAttr.cpp @@ -484,21 +484,6 @@ void Sema::ActOnPragmaFloatControl(SourceLocation Loc, switch (Value) { default: llvm_unreachable("invalid pragma float_control kind"); - case PFC_Source: - PP.setCurrentFPEvalMethod(LangOptions::FEM_Source); - NewFPFeatures.setFPEvalMethodOverride(LangOptions::FEM_Source); - FpPragmaStack.Act(Loc, Action, StringRef(), NewFPFeatures); - break; - case PFC_Double: - PP.setCurrentFPEvalMethod(LangOptions::FEM_Double); - NewFPFeatures.setFPEvalMethodOverride(LangOptions::FEM_Double); - FpPragmaStack.Act(Loc, Action, StringRef(), NewFPFeatures); - break; - case PFC_Extended: - PP.setCurrentFPEvalMethod(LangOptions::FEM_Extended); - NewFPFeatures.setFPEvalMethodOverride(LangOptions::FEM_Extended); - FpPragmaStack.Act(Loc, Action, StringRef(), NewFPFeatures); - break; case PFC_Precise: NewFPFeatures.setFPPreciseEnabled(true); FpPragmaStack.Act(Loc, Action, StringRef(), NewFPFeatures); diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp index aed663bd23ca1..b74b71d2bfdc2 100644 --- a/clang/lib/Sema/SemaExpr.cpp +++ b/clang/lib/Sema/SemaExpr.cpp @@ -820,37 +820,6 @@ ExprResult Sema::UsualUnaryConversions(Expr *E) { QualType Ty = E->getType(); assert(!Ty.isNull() && "UsualUnaryConversions - missing type"); - LangOptions::FPEvalMethodKind EvalMethod = CurFPFeatures.getFPEvalMethod(); - if (EvalMethod != LangOptions::FEM_Source && Ty->isFloatingType()) { - switch (EvalMethod) { - default: - llvm_unreachable("Unrecognized float evaluation method"); - break; - case LangOptions::FEM_TargetDefault: - // Float evaluation method not defined, use FEM_Source. - break; - case LangOptions::FEM_Double: - if (Context.getFloatingTypeOrder(Context.DoubleTy, Ty) > 0) - // Widen the expression to double. - return Ty->isComplexType() - ? ImpCastExprToType(E, - Context.getComplexType(Context.DoubleTy), - CK_FloatingComplexCast) - : ImpCastExprToType(E, Context.DoubleTy, CK_FloatingCast); - break; - case LangOptions::FEM_Extended: - if (Context.getFloatingTypeOrder(Context.LongDoubleTy, Ty) > 0) - // Widen the expression to long double. - return Ty->isComplexType() - ? ImpCastExprToType( - E, Context.getComplexType(Context.LongDoubleTy), - CK_FloatingComplexCast) - : ImpCastExprToType(E, Context.LongDoubleTy, - CK_FloatingCast); - break; - } - } - // Half FP have to be promoted to float unless it is natively supported if (Ty->isHalfType() && !getLangOpts().NativeHalfType) return ImpCastExprToType(Res.get(), Context.FloatTy, CK_FloatingCast); diff --git a/clang/lib/Serialization/ASTReader.cpp b/clang/lib/Serialization/ASTReader.cpp index 0f23a3a1116f4..5c88722c8572e 100644 --- a/clang/lib/Serialization/ASTReader.cpp +++ b/clang/lib/Serialization/ASTReader.cpp @@ -8419,6 +8419,8 @@ void ASTReader::ReadLateParsedTemplates( LPTMap.insert(std::make_pair(FD, std::move(LT))); } } + + LateParsedTemplates.clear(); } void ASTReader::LoadSelector(Selector Sel) { diff --git a/clang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp b/clang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp index 8091a467d056c..9c825428f2ea7 100644 --- a/clang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp +++ b/clang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp @@ -91,12 +91,8 @@ int main(int argc, const char **argv) { llvm::transform(Args, Argv.begin(), [](const std::string &Arg) { return Arg.c_str(); }); - IntrusiveRefCntPtr DiagOpts = new DiagnosticOptions(); - unsigned MissingArgIndex, MissingArgCount; - auto Opts = driver::getDriverOptTable(); - auto ParsedArgs = Opts.ParseArgs(llvm::makeArrayRef(Argv).slice(1), - MissingArgIndex, MissingArgCount); - ParseDiagnosticArgs(*DiagOpts, ParsedArgs); + IntrusiveRefCntPtr DiagOpts = + CreateAndPopulateDiagOpts(Argv); // Don't output diagnostics, because common scenarios such as // cross-compiling fail with diagnostics. This is not fatal, but diff --git a/clang/lib/Tooling/Tooling.cpp b/clang/lib/Tooling/Tooling.cpp index 5242134097dac..2a051c4e2b29f 100644 --- a/clang/lib/Tooling/Tooling.cpp +++ b/clang/lib/Tooling/Tooling.cpp @@ -343,11 +343,8 @@ bool ToolInvocation::run() { for (const std::string &Str : CommandLine) Argv.push_back(Str.c_str()); const char *const BinaryName = Argv[0]; - IntrusiveRefCntPtr DiagOpts = new DiagnosticOptions(); - unsigned MissingArgIndex, MissingArgCount; - llvm::opt::InputArgList ParsedArgs = driver::getDriverOptTable().ParseArgs( - ArrayRef(Argv).slice(1), MissingArgIndex, MissingArgCount); - ParseDiagnosticArgs(*DiagOpts, ParsedArgs); + IntrusiveRefCntPtr DiagOpts = + CreateAndPopulateDiagOpts(Argv); TextDiagnosticPrinter DiagnosticPrinter( llvm::errs(), &*DiagOpts); DiagnosticsEngine Diagnostics( diff --git a/clang/test/CXX/drs/dr10xx.cpp b/clang/test/CXX/drs/dr10xx.cpp index 7f5fd8c7ec277..f629280c3d981 100644 --- a/clang/test/CXX/drs/dr10xx.cpp +++ b/clang/test/CXX/drs/dr10xx.cpp @@ -17,8 +17,8 @@ namespace dr1004 { // dr1004: 5 template struct B1 {}; template class> struct B2 {}; template void f(); // expected-note {{[with X = dr1004::A]}} - template class X> void f(); // expected-note {{[with X = A]}} - template class X> void g(); // expected-note {{[with X = A]}} + template class X> void f(); // expected-note {{[with X = dr1004::A]}} + template class X> void g(); // expected-note {{[with X = dr1004::A]}} template void g(); // expected-note {{[with X = dr1004::A]}} struct C : A { B1 b1a; diff --git a/clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.type/p9-0x.cpp b/clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.type/p9-0x.cpp index fccac8f1e5a4e..8f135b72546ff 100644 --- a/clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.type/p9-0x.cpp +++ b/clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.type/p9-0x.cpp @@ -93,7 +93,7 @@ namespace DeduceNonTypeTemplateArgsInArray { } namespace DeduceWithDefaultArgs { - template class Container> void f(Container); // expected-note {{deduced type 'X<[...], (default) int>' of 1st parameter does not match adjusted type 'X<[...], double>' of argument [with Container = X]}} + template class Container> void f(Container); // expected-note {{deduced type 'X<[...], (default) int>' of 1st parameter does not match adjusted type 'X<[...], double>' of argument [with Container = DeduceWithDefaultArgs::X]}} template struct X {}; void g() { // OK, use default argument for the second template parameter. diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c b/clang/test/CodeGen/X86/ms-x86-intrinsics.c index 6f745ff00f54e..0eca455bb5c32 100644 --- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c +++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c @@ -1,10 +1,12 @@ -// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \ +// RUN: %clang_cc1 -Werror -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \ // RUN: -triple i686--windows -Oz -emit-llvm %s -o - \ // RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-I386 -// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \ +// RUN: %clang_cc1 -Werror -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \ // RUN: -triple x86_64--windows -Oz -emit-llvm %s -o - \ // RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-X64 +#include + #if defined(__i386__) char test__readfsbyte(unsigned long Offset) { return __readfsbyte(++Offset); diff --git a/clang/test/CodeGen/X86/strictfp_builtins.c b/clang/test/CodeGen/X86/strictfp_builtins.c index 4c66b2413161c..c3c94164e04f9 100644 --- a/clang/test/CodeGen/X86/strictfp_builtins.c +++ b/clang/test/CodeGen/X86/strictfp_builtins.c @@ -17,7 +17,7 @@ int printf(const char *, ...); // CHECK-NEXT: store i32 [[X:%.*]], i32* [[X_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** [[STR_ADDR]], align 8 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* [[TMP0]], i32 [[TMP1]]) #[[ATTR3:[0-9]+]] +// CHECK-NEXT: [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* [[TMP0]], i32 [[TMP1]]) [[ATTR4:#.*]] // CHECK-NEXT: ret void // void p(char *str, int x) { @@ -29,13 +29,13 @@ void p(char *str, int x) { // CHECK-LABEL: @test_long_double_isinf( // CHECK-NEXT: entry: // CHECK-NEXT: [[LD_ADDR:%.*]] = alloca x86_fp80, align 16 -// CHECK-NEXT: store x86_fp80 [[LD:%.*]], x86_fp80* [[LD_ADDR]], align 16 +// CHECK-NEXT: store x86_fp80 [[D:%.*]], x86_fp80* [[LD_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load x86_fp80, x86_fp80* [[LD_ADDR]], align 16 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_fp80 [[TMP0]] to i80 -// CHECK-NEXT: [[TMP2:%.*]] = shl i80 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp eq i80 [[TMP2]], -18446744073709551616 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR3]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast x86_fp80 [[TMP0]] to i80 +// CHECK-NEXT: [[SHL1:%.*]] = shl i80 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq i80 [[SHL1]], -18446744073709551616 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.[[#STRID:1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_long_double_isinf(long double ld) { @@ -47,13 +47,13 @@ void test_long_double_isinf(long double ld) { // CHECK-LABEL: @test_long_double_isfinite( // CHECK-NEXT: entry: // CHECK-NEXT: [[LD_ADDR:%.*]] = alloca x86_fp80, align 16 -// CHECK-NEXT: store x86_fp80 [[LD:%.*]], x86_fp80* [[LD_ADDR]], align 16 +// CHECK-NEXT: store x86_fp80 [[D:%.*]], x86_fp80* [[LD_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load x86_fp80, x86_fp80* [[LD_ADDR]], align 16 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_fp80 [[TMP0]] to i80 -// CHECK-NEXT: [[TMP2:%.*]] = shl i80 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp ult i80 [[TMP2]], -18446744073709551616 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR3]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast x86_fp80 [[TMP0]] to i80 +// CHECK-NEXT: [[SHL1:%.*]] = shl i80 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp ult i80 [[SHL1]], -18446744073709551616 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_long_double_isfinite(long double ld) { @@ -65,11 +65,14 @@ void test_long_double_isfinite(long double ld) { // CHECK-LABEL: @test_long_double_isnan( // CHECK-NEXT: entry: // CHECK-NEXT: [[LD_ADDR:%.*]] = alloca x86_fp80, align 16 -// CHECK-NEXT: store x86_fp80 [[LD:%.*]], x86_fp80* [[LD_ADDR]], align 16 +// CHECK-NEXT: store x86_fp80 [[D:%.*]], x86_fp80* [[LD_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load x86_fp80, x86_fp80* [[LD_ADDR]], align 16 -// CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.isnan.f80(x86_fp80 [[TMP0]]) #[[ATTR3]] -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i32 [[TMP2]]) #[[ATTR3]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast x86_fp80 [[TMP0]] to i80 +// CHECK-NEXT: [[ABS:%.*]] = and i80 [[BITCAST]], 604462909807314587353087 +// CHECK-NEXT: [[TMP1:%.*]] = sub i80 604453686435277732577280, [[ABS]] +// CHECK-NEXT: [[ISNAN:%.*]] = lshr i80 [[TMP1]], 79 +// CHECK-NEXT: [[RES:%.*]] = trunc i80 [[ISNAN]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_long_double_isnan(long double ld) { diff --git a/clang/test/CodeGen/aarch64-strictfp-builtins.c b/clang/test/CodeGen/aarch64-strictfp-builtins.c index 9dc6e25048cb8..3b2a4e547f4a6 100644 --- a/clang/test/CodeGen/aarch64-strictfp-builtins.c +++ b/clang/test/CodeGen/aarch64-strictfp-builtins.c @@ -1,4 +1,3 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -fexperimental-strict-floating-point -o - -triple arm64-none-linux-gnu | FileCheck %s // Test that the constrained intrinsics are picking up the exception @@ -16,7 +15,7 @@ int printf(const char *, ...); // CHECK-NEXT: store i32 [[X:%.*]], i32* [[X_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** [[STR_ADDR]], align 8 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* [[TMP0]], i32 [[TMP1]]) #[[ATTR3:[0-9]+]] +// CHECK-NEXT: [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* [[TMP0]], i32 [[TMP1]]) [[ATTR4:#.*]] // CHECK-NEXT: ret void // void p(char *str, int x) { @@ -28,13 +27,13 @@ void p(char *str, int x) { // CHECK-LABEL: @test_long_double_isinf( // CHECK-NEXT: entry: // CHECK-NEXT: [[LD_ADDR:%.*]] = alloca fp128, align 16 -// CHECK-NEXT: store fp128 [[LD:%.*]], fp128* [[LD_ADDR]], align 16 +// CHECK-NEXT: store fp128 [[D:%.*]], fp128* [[LD_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load fp128, fp128* [[LD_ADDR]], align 16 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast fp128 [[TMP0]] to i128 -// CHECK-NEXT: [[TMP2:%.*]] = shl i128 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp eq i128 [[TMP2]], -10384593717069655257060992658440192 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR3]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast fp128 [[TMP0]] to i128 +// CHECK-NEXT: [[SHL1:%.*]] = shl i128 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[SHL1]], -10384593717069655257060992658440192 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.[[#STRID:1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_long_double_isinf(long double ld) { @@ -46,13 +45,13 @@ void test_long_double_isinf(long double ld) { // CHECK-LABEL: @test_long_double_isfinite( // CHECK-NEXT: entry: // CHECK-NEXT: [[LD_ADDR:%.*]] = alloca fp128, align 16 -// CHECK-NEXT: store fp128 [[LD:%.*]], fp128* [[LD_ADDR]], align 16 +// CHECK-NEXT: store fp128 [[D:%.*]], fp128* [[LD_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load fp128, fp128* [[LD_ADDR]], align 16 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast fp128 [[TMP0]] to i128 -// CHECK-NEXT: [[TMP2:%.*]] = shl i128 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp ult i128 [[TMP2]], -10384593717069655257060992658440192 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR3]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast fp128 [[TMP0]] to i128 +// CHECK-NEXT: [[SHL1:%.*]] = shl i128 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp ult i128 [[SHL1]], -10384593717069655257060992658440192 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_long_double_isfinite(long double ld) { @@ -64,11 +63,14 @@ void test_long_double_isfinite(long double ld) { // CHECK-LABEL: @test_long_double_isnan( // CHECK-NEXT: entry: // CHECK-NEXT: [[LD_ADDR:%.*]] = alloca fp128, align 16 -// CHECK-NEXT: store fp128 [[LD:%.*]], fp128* [[LD_ADDR]], align 16 +// CHECK-NEXT: store fp128 [[D:%.*]], fp128* [[LD_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load fp128, fp128* [[LD_ADDR]], align 16 -// CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.isnan.f128(fp128 [[TMP0]]) #[[ATTR3]] -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i64 0, i64 0), i32 [[TMP2]]) #[[ATTR3]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast fp128 [[TMP0]] to i128 +// CHECK-NEXT: [[ABS:%.*]] = and i128 [[BITCAST]], 170141183460469231731687303715884105727 +// CHECK-NEXT: [[TMP1:%.*]] = sub i128 170135991163610696904058773219554885632, [[ABS]] +// CHECK-NEXT: [[ISNAN:%.*]] = lshr i128 [[TMP1]], 127 +// CHECK-NEXT: [[RES:%.*]] = trunc i128 [[ISNAN]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) // CHECK-NEXT: ret void // void test_long_double_isnan(long double ld) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c index d1fff7220ccf5..906a1984f6cbd 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1211 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svabd_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svabd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svabd_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svabd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svabd_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svabd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svabd_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svabd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svabd_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svabd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svabd_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svabd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svabd_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svabd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svabd_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svabd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svabd_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svabd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svabd_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svabd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svabd_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svabd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svabd_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svabd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svabd_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svabd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svabd_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svabd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svabd_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svabd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svabd_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svabd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svabd_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svabd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svabd_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svabd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svabd_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svabd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svabd_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svabd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svabd_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svabd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svabd_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svabd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svabd_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svabd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svabd_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svabd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svabd_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svabd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svabd_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svabd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svabd_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svabd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svabd_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svabd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svabd_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svabd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svabd_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svabd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svabd_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svabd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svabd_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svabd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svabd_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svabd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svabd_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svabd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svabd_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svabd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svabd_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svabd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svabd_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svabd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svabd_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svabd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svabd_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svabd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svabd_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svabd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svabd_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svabd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svabd_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svabd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svabd_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svabd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svabd_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svabd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svabd_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svabd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svabd_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svabd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svabd_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svabd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svabd_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svabd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svabd_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svabd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svabd_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svabd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svabd_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svabd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svabd_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svabd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svabd_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svabd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svabd_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svabd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svabd_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svabd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svabd_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_x,)(pg, op1, op2); } +// +// CHECK-LABEL: @test_svabd_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svabd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svabd_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svabd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svabd_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svabd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svabd_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svabd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svabd_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svabd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svabd_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svabd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svabd_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svabd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svabd_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svabd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svabd_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svabd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svabd_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svabd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svabd_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svabd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svabd_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c index 12ff88c3f4520..ba7b124452c7c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svacge_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svacge_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svacge_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svacge_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacge_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svacge_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacge_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svacge_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c index 6592ff28e9ac7..670e36aea4e3c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svacgt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svacgt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svacgt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svacgt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacgt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svacgt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacgt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svacgt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c index f39e73d31c666..7471fcc4c418b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svacle_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacle_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacle_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svacle_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacle_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacle_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svacle_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacle_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacle_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svacle_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacle_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacle_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svacle_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacle_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacle_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svacle_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c index f4b212e5f2aa3..7f52f59e052ce 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svaclt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svaclt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svaclt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svaclt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svaclt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svaclt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svaclt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svaclt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svaclt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svaclt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svaclt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svaclt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svaclt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svaclt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svaclt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svaclt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c index 5c5458686d3df..de0d19cf9c504 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svadd_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svadd_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svadd_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svadd_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svadd_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svadd_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svadd_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svadd_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svadd_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svadd_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svadd_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svadd_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svadd_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svadd_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svadd_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svadd_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svadd_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svadd_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svadd_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svadd_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svadd_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svadd_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svadd_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svadd_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svadd_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svadd_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svadd_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svadd_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svadd_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svadd_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svadd_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svadd_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svadd_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svadd_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svadd_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svadd_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svadd_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svadd_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svadd_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svadd_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svadd_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svadd_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svadd_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svadd_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svadd_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svadd_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svadd_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svadd_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svadd_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svadd_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svadd_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svadd_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svadd_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svadd_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svadd_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svadd_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svadd_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svadd_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svadd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svadd_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svadd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svadd_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svadd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svadd_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svadd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svadd_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svadd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svadd_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svadd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svadd_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svadd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svadd_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svadd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svadd_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svadd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svadd_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c index 36af1dece3730..c688b3c05e080 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,470 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svand_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svand_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svand_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svand_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svand_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svand_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svand_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svand_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svand_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svand_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svand_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svand_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svand_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svand_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svand_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svand_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svand_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svand_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svand_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svand_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svand_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svand_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svand_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svand_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svand_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svand_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svand_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svand_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svand_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svand_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svand_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svand_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svand_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svand_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svand_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svand_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svand_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svand_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svand_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svand_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svand_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svand_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svand_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svand_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svand_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svand_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svand_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svand_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svand_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svand_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svand_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svand_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svand_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svand_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svand_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svand_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svand_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svand_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svand_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svand_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svand_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svand_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svand_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svand_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svand_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svand_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svand_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svand_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svand_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svand_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svand_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svand_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svand_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svand_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svand_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svand_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svand_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svand_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svand_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svand_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svand_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svand_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svand_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svand_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svand_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svand_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svand_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svand_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svand_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svand_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svand_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svand_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svand_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svand_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svand_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svand_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svand_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svand_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svand_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_svand_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c index 20b12b6f6fabf..0043ac40fb690 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,403 +14,762 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svasr_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svasr_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svasr_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svasr_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svasr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svasr_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svasr_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svasr_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svasr_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svasr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svasr_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svasr_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svasr_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svasr_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svasr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svasr_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_zu10__SVBool_tu11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svasr_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_mu10__SVBool_tu11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svasr_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_xu10__SVBool_tu11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svasr_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_zu10__SVBool_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svasr_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svasr_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_zu10__SVBool_tu11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svasr_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svasr_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_zu10__SVBool_tu11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svasr_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svasr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_mu10__SVBool_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svasr_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_mu10__SVBool_tu11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svasr_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_mu10__SVBool_tu11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svasr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_xu10__SVBool_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svasr_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_xu10__SVBool_tu11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svasr_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_xu10__SVBool_tu11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svasr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svasr_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svasr_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svasr_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c index 62258237bc5ef..deab191390c00 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,31 +13,60 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_bfdot_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_bfdot_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfdot_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfdot_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot, _f32, , )(x, y, z); } +// CHECK-LABEL: @test_bfdot_lane_0_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_bfdot_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfdot_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfdot_lane_0_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot.lane( %x, %y, %z, i64 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot_lane, _f32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_bfdot_lane_3_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_bfdot_lane_3_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfdot_lane_3_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfdot_lane_3_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot.lane( %x, %y, %z, i64 3) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot_lane, _f32, , )(x, y, z, 3); } +// CHECK-LABEL: @test_bfdot_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_bfdot_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_bfdot_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { - // CHECK-LABEL: test_bfdot_n_f32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c index 8669de8ea3224..c5733eb812e7f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,31 +13,60 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svbfmlalb_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z18test_svbfmlalb_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svbfmlalb_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_svbfmlalb_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb, _f32, , )(x, y, z); } +// CHECK-LABEL: @test_bfmlalb_lane_0_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalb_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalb_lane_0_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb.lane( %x, %y, %z, i64 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb_lane, _f32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_bfmlalb_lane_7_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalb_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalb_lane_7_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb.lane( %x, %y, %z, i64 7) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb_lane, _f32, , )(x, y, z, 7); } +// CHECK-LABEL: @test_bfmlalb_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_bfmlalb_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_bfmlalb_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { - // CHECK-LABEL: test_bfmlalb_n_f32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c index 006ff6bc3200b..6fdd3206fee6b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,31 +13,60 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svbfmlalt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z18test_svbfmlalt_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svbfmlalt_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_svbfmlalt_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt, _f32, , )(x, y, z); } +// CHECK-LABEL: @test_bfmlalt_lane_0_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalt_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalt_lane_0_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt.lane( %x, %y, %z, i64 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt_lane, _f32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_bfmlalt_lane_7_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalt_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalt_lane_7_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt.lane( %x, %y, %z, i64 7) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt_lane, _f32, , )(x, y, z, 7); } +// CHECK-LABEL: @test_bfmlalt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_bfmlalt_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_bfmlalt_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { - // CHECK-LABEL: test_bfmlalt_n_f32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c index fb11e485ca87a..f6be16d6a55b3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,470 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svbic_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svbic_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svbic_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svbic_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svbic_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svbic_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svbic_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svbic_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svbic_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svbic_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svbic_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svbic_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svbic_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svbic_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svbic_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svbic_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svbic_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svbic_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svbic_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svbic_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svbic_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svbic_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svbic_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svbic_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svbic_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svbic_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svbic_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svbic_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svbic_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svbic_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svbic_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svbic_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svbic_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svbic_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svbic_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svbic_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svbic_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svbic_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svbic_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svbic_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svbic_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svbic_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svbic_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svbic_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svbic_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svbic_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svbic_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svbic_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svbic_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svbic_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svbic_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svbic_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svbic_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svbic_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svbic_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svbic_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svbic_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svbic_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svbic_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svbic_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svbic_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svbic_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svbic_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svbic_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svbic_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svbic_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svbic_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svbic_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svbic_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svbic_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svbic_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svbic_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svbic_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svbic_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svbic_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svbic_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svbic_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svbic_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svbic_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svbic_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svbic_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svbic_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svbic_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svbic_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svbic_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svbic_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svbic_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svbic_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svbic_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svbic_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svbic_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svbic_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svbic_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svbic_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svbic_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svbic_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svbic_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svbic_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svbic_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_svbic_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c index 3c267b3c49c3b..db1b8e7f642f1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,284 +14,538 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpeq_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpeq_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpeq_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpeq_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpeq_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpeq_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpeq_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpeq_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpeq_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpeq_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpeq_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpeq_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpeq_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpeq_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpeq_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpeq_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpeq_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpeq_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpeq_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpeq_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpeq_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpeq_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpeq_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpeq_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c index 895e49c69af22..85f5b8d90afd1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpge_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpge_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpge_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpge_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpge_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpge_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpge_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpge_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpge_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpge_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpge_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpge_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpge_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpge_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpge_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpge_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpge_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpge_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpge_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpge_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpge_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpge_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpge_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c index 9d11062448b26..2991f5a563448 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpgt_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpgt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpgt_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpgt_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpgt_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpgt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpgt_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpgt_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpgt_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpgt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpgt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpgt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpgt_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpgt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpgt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c index c3f6408b1126f..5c4bbb4cbee2f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmple_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmple_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmple_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmple_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmple_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmple_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmple_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmple_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmple_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmple_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmple_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmple_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmple_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmple_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmple_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmple_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmple_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmple_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmple_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmple_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmple_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmple_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmple_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmple_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmple_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c index 9bd99e1766089..b503e6877d026 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmplt_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmplt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmplt_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmplt_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmplt_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmplt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmplt_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmplt_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmplt_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmplt_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmplt_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmplt_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmplt_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmplt_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmplt_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmplt_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmplt_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmplt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmplt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmplt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmplt_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmplt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmplt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c index 878864760f2b1..568473aea43d1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,284 +14,538 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpne_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpne_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpne_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpne_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpne_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpne_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpne_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpne_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpne_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpne_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpne_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpne_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpne_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpne_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpne_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpne_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpne_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpne_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpne_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpne_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpne_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpne_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpne_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpne_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpne_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpne_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpne_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpne_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpne_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpne_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpne_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpne_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpne_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c index 7531de36f1495..10fce1bbeaaf1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,65 +14,122 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpuo_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpuo_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpuo_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpuo_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpuo_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpuo_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpuo_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpuo_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpuo_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpuo_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpuo_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpuo_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpuo_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c index b7e02df4c1520..0b7c75a84bc44 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,415 +14,786 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdiv_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdiv_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdiv_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdiv_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdiv_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdiv_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdiv_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdiv_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdiv_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdiv_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdiv_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdiv_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdiv_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdiv_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdiv_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdiv_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdiv_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdiv_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdiv_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdiv_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdiv_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdiv_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdiv_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdiv_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdiv_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svdiv_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdiv_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svdiv_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdiv_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svdiv_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdiv_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svdiv_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdiv_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdiv_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdiv_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdiv_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdiv_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdiv_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdiv_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdiv_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdiv_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdiv_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdiv_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdiv_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdiv_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdiv_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdiv_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdiv_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdiv_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdiv_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdiv_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdiv_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdiv_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdiv_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdiv_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdiv_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdiv_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdiv_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdiv_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdiv_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdiv_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdiv_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdiv_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdiv_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdiv_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdiv_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdiv_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svdiv_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdiv_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svdiv_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdiv_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svdiv_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdiv_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdiv_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdiv_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdiv_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdiv_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdiv_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdiv_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdiv_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdiv_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdiv_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdiv_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdiv_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdiv_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c index 7bf735a49a046..64757d0a1dd10 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,415 +14,786 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdivr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdivr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdivr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdivr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdivr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdivr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdivr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdivr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdivr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdivr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdivr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdivr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdivr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdivr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdivr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdivr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdivr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdivr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdivr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdivr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdivr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdivr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdivr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdivr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdivr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svdivr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdivr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svdivr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdivr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svdivr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdivr_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svdivr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdivr_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdivr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdivr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdivr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdivr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdivr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdivr_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdivr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdivr_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdivr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdivr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdivr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdivr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdivr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdivr_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdivr_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdivr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdivr_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdivr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdivr_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdivr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdivr_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdivr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdivr_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdivr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdivr_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdivr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdivr_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdivr_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdivr_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdivr_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svdivr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdivr_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svdivr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdivr_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svdivr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdivr_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdivr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdivr_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdivr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdivr_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdivr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdivr_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdivr_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdivr_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdivr_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c index 8a3322df1b357..e23b97a0d5cc9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,118 +14,220 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdot_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svdot_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_s32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svdot_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_s64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdot_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svdot_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv4i32( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_u32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdot_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svdot_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv2i64( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_u64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_s32u11__SVInt32_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdot_n_s32(svint32_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svdot_n_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_s32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_s64u11__SVInt64_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdot_n_s64(svint64_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svdot_n_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_s64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_u32u12__SVUint32_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdot_n_u32(svuint32_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svdot_n_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv4i32( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_u32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_u64u12__SVUint64_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdot_n_u64(svuint64_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svdot_n_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv2i64( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_u64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_lane_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svdot_lane_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svdot_lane_s32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svdot_lane_s32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svdot_lane_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svdot_lane_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svdot_lane_s64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s64_1u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdot_lane_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svdot_lane_s64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 1); } +// CHECK-LABEL: @test_svdot_lane_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdot_lane_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svdot_lane_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_u32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svdot_lane_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdot_lane_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svdot_lane_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_u64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c index 65e6b93bdb4aa..13180f97495d3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c @@ -1,10 +1,11 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +15,86 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdup_n_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbfloat16_t test_svdup_n_bf16(bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16'}} return SVE_ACLE_FUNC(svdup, _n, _bf16, )(op); } +// CHECK-LABEL: @test_svdup_n_bf16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, %[[PG]], bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_z'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_z, )(pg, op); } +// CHECK-LABEL: @test_svdup_n_bf16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBFloat16_tu10__SVBool_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( %inactive, %[[PG]], bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_m'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_m, )(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_bf16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, %[[PG]], bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op); } +// CHECK-LABEL: @test_svdup_lane_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBFloat16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_bf16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}} return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c index f632be7b85982..912109fdb5314 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,515 +14,969 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdup_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svdup_n_s8a( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8(int8_t op) { - // CHECK-LABEL: test_svdup_n_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8,)(op); } +// CHECK-LABEL: @test_svdup_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_s16s( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svdup_n_s16(int16_t op) { - // CHECK-LABEL: test_svdup_n_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16,)(op); } +// CHECK-LABEL: @test_svdup_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_s32i( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdup_n_s32(int32_t op) { - // CHECK-LABEL: test_svdup_n_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32,)(op); } +// CHECK-LABEL: @test_svdup_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_s64l( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdup_n_s64(int64_t op) { - // CHECK-LABEL: test_svdup_n_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64,)(op); } +// CHECK-LABEL: @test_svdup_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svdup_n_u8h( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8(uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8,)(op); } +// CHECK-LABEL: @test_svdup_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_u16t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svdup_n_u16(uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16,)(op); } +// CHECK-LABEL: @test_svdup_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_u32j( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdup_n_u32(uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32,)(op); } +// CHECK-LABEL: @test_svdup_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_u64m( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdup_n_u64(uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64,)(op); } +// CHECK-LABEL: @test_svdup_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_f16Dh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svdup_n_f16(float16_t op) { - // CHECK-LABEL: test_svdup_n_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16,)(op); } +// CHECK-LABEL: @test_svdup_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_f32f( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svdup_n_f32(float32_t op) { - // CHECK-LABEL: test_svdup_n_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32,)(op); } +// CHECK-LABEL: @test_svdup_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_f64d( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svdup_n_f64(float64_t op) { - // CHECK-LABEL: test_svdup_n_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64,)(op); } +// CHECK-LABEL: @test_svdup_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_zu10__SVBool_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8_z(svbool_t pg, int8_t op) { - // CHECK-LABEL: test_svdup_n_s8_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_zu10__SVBool_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_n_s16_z(svbool_t pg, int16_t op) { - // CHECK-LABEL: test_svdup_n_s16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_zu10__SVBool_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_n_s32_z(svbool_t pg, int32_t op) { - // CHECK-LABEL: test_svdup_n_s32_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_zu10__SVBool_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_n_s64_z(svbool_t pg, int64_t op) { - // CHECK-LABEL: test_svdup_n_s64_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_zu10__SVBool_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8_z(svbool_t pg, uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_zu10__SVBool_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_n_u16_z(svbool_t pg, uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_zu10__SVBool_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_n_u32_z(svbool_t pg, uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_zu10__SVBool_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_n_u64_z(svbool_t pg, uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_zu10__SVBool_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_n_f16_z(svbool_t pg, float16_t op) { - // CHECK-LABEL: test_svdup_n_f16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, %[[PG]], half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_zu10__SVBool_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_n_f32_z(svbool_t pg, float32_t op) { - // CHECK-LABEL: test_svdup_n_f32_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, %[[PG]], float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_zu10__SVBool_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_n_f64_z(svbool_t pg, float64_t op) { - // CHECK-LABEL: test_svdup_n_f64_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, %[[PG]], double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_mu10__SVInt8_tu10__SVBool_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8_m(svint8_t inactive, svbool_t pg, int8_t op) { - // CHECK-LABEL: test_svdup_n_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( %inactive, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_mu11__SVInt16_tu10__SVBool_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_n_s16_m(svint16_t inactive, svbool_t pg, int16_t op) { - // CHECK-LABEL: test_svdup_n_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( %inactive, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_mu11__SVInt32_tu10__SVBool_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_n_s32_m(svint32_t inactive, svbool_t pg, int32_t op) { - // CHECK-LABEL: test_svdup_n_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( %inactive, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_mu11__SVInt64_tu10__SVBool_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_n_s64_m(svint64_t inactive, svbool_t pg, int64_t op) { - // CHECK-LABEL: test_svdup_n_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( %inactive, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_mu11__SVUint8_tu10__SVBool_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8_m(svuint8_t inactive, svbool_t pg, uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( %inactive, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_mu12__SVUint16_tu10__SVBool_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_n_u16_m(svuint16_t inactive, svbool_t pg, uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( %inactive, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_mu12__SVUint32_tu10__SVBool_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_n_u32_m(svuint32_t inactive, svbool_t pg, uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( %inactive, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_mu12__SVUint64_tu10__SVBool_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_n_u64_m(svuint64_t inactive, svbool_t pg, uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( %inactive, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_mu13__SVFloat16_tu10__SVBool_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_n_f16_m(svfloat16_t inactive, svbool_t pg, float16_t op) { - // CHECK-LABEL: test_svdup_n_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( %inactive, %[[PG]], half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_mu13__SVFloat32_tu10__SVBool_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_n_f32_m(svfloat32_t inactive, svbool_t pg, float32_t op) { - // CHECK-LABEL: test_svdup_n_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( %inactive, %[[PG]], float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_mu13__SVFloat64_tu10__SVBool_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_n_f64_m(svfloat64_t inactive, svbool_t pg, float64_t op) { - // CHECK-LABEL: test_svdup_n_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( %inactive, %[[PG]], double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_xu10__SVBool_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8_x(svbool_t pg, int8_t op) { - // CHECK-LABEL: test_svdup_n_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_xu10__SVBool_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_n_s16_x(svbool_t pg, int16_t op) { - // CHECK-LABEL: test_svdup_n_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_xu10__SVBool_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_n_s32_x(svbool_t pg, int32_t op) { - // CHECK-LABEL: test_svdup_n_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_xu10__SVBool_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_n_s64_x(svbool_t pg, int64_t op) { - // CHECK-LABEL: test_svdup_n_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_xu10__SVBool_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8_x(svbool_t pg, uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_xu10__SVBool_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_n_u16_x(svbool_t pg, uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_xu10__SVBool_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_n_u32_x(svbool_t pg, uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_xu10__SVBool_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_n_u64_x(svbool_t pg, uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_xu10__SVBool_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_n_f16_x(svbool_t pg, float16_t op) { - // CHECK-LABEL: test_svdup_n_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, %[[PG]], half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_xu10__SVBool_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_n_f32_x(svbool_t pg, float32_t op) { - // CHECK-LABEL: test_svdup_n_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, %[[PG]], float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_xu10__SVBool_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_n_f64_x(svbool_t pg, float64_t op) { - // CHECK-LABEL: test_svdup_n_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, %[[PG]], double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_lane_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svdup_lane_s8(svint8_t data, uint8_t index) { - // CHECK-LABEL: test_svdup_lane_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s8,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_lane_s16(svint16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_s16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s16,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_lane_s32(svint32_t data, uint32_t index) { - // CHECK-LABEL: test_svdup_lane_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s32,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_lane_s64(svint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdup_lane_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s64,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svdup_lane_u8(svuint8_t data, uint8_t index) { - // CHECK-LABEL: test_svdup_lane_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u8,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_lane_u16(svuint16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_u16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u16,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_lane_u32(svuint32_t data, uint32_t index) { - // CHECK-LABEL: test_svdup_lane_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u32,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_lane_u64(svuint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdup_lane_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u64,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_lane_f16(svfloat16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_f16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f16,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_lane_f32(svfloat32_t data, uint32_t index) { - // CHECK-LABEL: test_svdup_lane_f32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f32,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_lane_f64(svfloat64_t data, uint64_t index) { - // CHECK-LABEL: test_svdup_lane_f64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f64,,)(data, index); } +// CHECK-LABEL: @test_svdup_n_b8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svdup_n_b8b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svdup_n_b8(bool op) { - // CHECK-LABEL: test_svdup_n_b8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 %op) - // CHECK: ret %[[DUP]] return SVE_ACLE_FUNC(svdup,_n,_b8,)(op); } +// CHECK-LABEL: @test_svdup_n_b16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svdup_n_b16(bool op) { - // CHECK-LABEL: test_svdup_n_b16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 %op) - // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[DUP]]) - // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b16,)(op); } +// CHECK-LABEL: @test_svdup_n_b32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svdup_n_b32(bool op) { - // CHECK-LABEL: test_svdup_n_b32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 %op) - // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[DUP]]) - // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b32,)(op); } +// CHECK-LABEL: @test_svdup_n_b64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svdup_n_b64(bool op) { - // CHECK-LABEL: test_svdup_n_b64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 %op) - // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[DUP]]) - // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b64,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c index 680986c6ae0ba..51130bf10e966 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,317 +14,744 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdupq_lane_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdupq_lane_s8u10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdupq_lane_s8(svint8_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s8,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s16u11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svdupq_lane_s16(svint16_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s16,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s32u11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdupq_lane_s32(svint32_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s32,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s64u11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdupq_lane_s64(svint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s64,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdupq_lane_u8u11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdupq_lane_u8(svuint8_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u8,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u16u12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svdupq_lane_u16(svuint16_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u16,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u32u12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdupq_lane_u32(svuint32_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u32,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdupq_lane_u64(svuint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u64,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f16u13__SVFloat16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svdupq_lane_f16(svfloat16_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f16,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f32u13__SVFloat32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svdupq_lane_f32(svfloat32_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f32,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f64u13__SVFloat64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svdupq_lane_f64(svfloat64_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f64,,)(data, index); } +// CHECK-LABEL: @test_svdupq_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CHECK-NEXT: ret [[TMP17]] +// +// CPP-CHECK-LABEL: @_Z16test_svdupq_n_s8aaaaaaaaaaaaaaaa( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP17]] +// svint8_t test_svdupq_n_s8(int8_t x0, int8_t x1, int8_t x2, int8_t x3, int8_t x4, int8_t x5, int8_t x6, int8_t x7, int8_t x8, int8_t x9, int8_t x10, int8_t x11, int8_t x12, int8_t x13, int8_t x14, int8_t x15) { - // CHECK-LABEL: test_svdupq_n_s8 - // CHECK: insertelement <16 x i8> undef, i8 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %x15, i32 15 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } +// CHECK-LABEL: @test_svdupq_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s16ssssssss( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svint16_t test_svdupq_n_s16(int16_t x0, int16_t x1, int16_t x2, int16_t x3, int16_t x4, int16_t x5, int16_t x6, int16_t x7) { - // CHECK-LABEL: test_svdupq_n_s16 - // CHECK: insertelement <8 x i16> undef, i16 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %x7, i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CHECK-NEXT: ret [[TMP5]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s32iiii( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP5]] +// svint32_t test_svdupq_n_s32(int32_t x0, int32_t x1, int32_t x2, int32_t x3) { - // CHECK-LABEL: test_svdupq_n_s32 - // CHECK: insertelement <4 x i32> undef, i32 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %x3, i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s64ll( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svdupq_n_s64(int64_t x0, int64_t x1) { - // CHECK-LABEL: test_svdupq_n_s64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %x0, i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %x1, i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s64,)(x0, x1); } +// CHECK-LABEL: @test_svdupq_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CHECK-NEXT: ret [[TMP17]] +// +// CPP-CHECK-LABEL: @_Z16test_svdupq_n_u8hhhhhhhhhhhhhhhh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP17]] +// svuint8_t test_svdupq_n_u8(uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4, uint8_t x5, uint8_t x6, uint8_t x7, uint8_t x8, uint8_t x9, uint8_t x10, uint8_t x11, uint8_t x12, uint8_t x13, uint8_t x14, uint8_t x15) { - // CHECK-LABEL: test_svdupq_n_u8 - // CHECK: insertelement <16 x i8> undef, i8 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %x15, i32 15 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } +// CHECK-LABEL: @test_svdupq_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u16tttttttt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svuint16_t test_svdupq_n_u16(uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3, uint16_t x4, uint16_t x5, uint16_t x6, uint16_t x7) { - // CHECK-LABEL: test_svdupq_n_u16 - // CHECK: insertelement <8 x i16> undef, i16 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %x7, i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CHECK-NEXT: ret [[TMP5]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u32jjjj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP5]] +// svuint32_t test_svdupq_n_u32(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3) { - // CHECK-LABEL: test_svdupq_n_u32 - // CHECK: insertelement <4 x i32> undef, i32 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %x3, i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u64mm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svdupq_n_u64(uint64_t x0, uint64_t x1) { - // CHECK-LABEL: test_svdupq_n_u64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %x0, i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %x1, i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u64,)(x0, x1); } +// CHECK-LABEL: @test_svdupq_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f16DhDhDhDhDhDhDhDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svfloat16_t test_svdupq_n_f16(float16_t x0, float16_t x1, float16_t x2, float16_t x3, float16_t x4, float16_t x5, float16_t x6, float16_t x7) { - // CHECK-LABEL: test_svdupq_n_f16 - // CHECK: insertelement <8 x half> undef, half %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x half> %[[X:.*]], half %x7, i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) +// CHECK-NEXT: ret [[TMP5]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f32ffff( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP5]] +// svfloat32_t test_svdupq_n_f32(float32_t x0, float32_t x1, float32_t x2, float32_t x3) { - // CHECK-LABEL: test_svdupq_n_f32 - // CHECK: insertelement <4 x float> undef, float %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x float> %[[X:.*]], float %x3, i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f64dd( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svdupq_n_f64(float64_t x0, float64_t x1) { - // CHECK-LABEL: test_svdupq_n_f64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x double> undef, double %x0, i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x double> %[[SVEC]], double %x1, i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f64,)(x0, x1); } +// CHECK-LABEL: @test_svdupq_n_b8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[X4:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[X8:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[X9:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL10:%.*]] = zext i1 [[X10:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL11:%.*]] = zext i1 [[X11:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL12:%.*]] = zext i1 [[X12:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) +// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], [[TMP19]]) +// CHECK-NEXT: ret [[TMP20]] +// +// CPP-CHECK-LABEL: @_Z16test_svdupq_n_b8bbbbbbbbbbbbbbbb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[X4:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[X8:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[X9:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL10:%.*]] = zext i1 [[X10:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL11:%.*]] = zext i1 [[X11:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL12:%.*]] = zext i1 [[X12:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) +// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], [[TMP19]]) +// CPP-CHECK-NEXT: ret [[TMP20]] +// svbool_t test_svdupq_n_b8(bool x0, bool x1, bool x2, bool x3, bool x4, bool x5, bool x6, bool x7, bool x8, bool x9, bool x10, bool x11, bool x12, bool x13, bool x14, bool x15) { - // CHECK-LABEL: test_svdupq_n_b8 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i8 - // CHECK-DAG: %[[X15:.*]] = zext i1 %x15 to i8 - // CHECK: insertelement <16 x i8> undef, i8 %[[X0]], i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %[[X15]], i32 15 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: ret %[[CMP]] return SVE_ACLE_FUNC(svdupq,_n,_b8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } +// CHECK-LABEL: @test_svdupq_n_b16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i16 +// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i16 +// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i16 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i16 +// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[X4:%.*]] to i16 +// CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 +// CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 +// CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) +// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], [[TMP19]]) +// CHECK-NEXT: [[TMP21:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP20]]) +// CHECK-NEXT: ret [[TMP21]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b16bbbbbbbb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[X4:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) +// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], [[TMP19]]) +// CPP-CHECK-NEXT: [[TMP21:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP20]]) +// CPP-CHECK-NEXT: ret [[TMP21]] +// svbool_t test_svdupq_n_b16(bool x0, bool x1, bool x2, bool x3, bool x4, bool x5, bool x6, bool x7) { - // CHECK-LABEL: test_svdupq_n_b16 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i16 - // CHECK-DAG: %[[X7:.*]] = zext i1 %x7 to i16 - // CHECK: insertelement <8 x i16> undef, i16 %[[X0]], i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %[[X7]], i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[CMP]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_b32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i32 +// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 +// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) +// CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], [[TMP11]]) +// CHECK-NEXT: [[TMP13:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP12]]) +// CHECK-NEXT: ret [[TMP13]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b32bbbb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) +// CPP-CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], [[TMP11]]) +// CPP-CHECK-NEXT: [[TMP13:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP12]]) +// CPP-CHECK-NEXT: ret [[TMP13]] +// svbool_t test_svdupq_n_b32(bool x0, bool x1, bool x2, bool x3) { - // CHECK-LABEL: test_svdupq_n_b32 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i32 - // CHECK-DAG: %[[X3:.*]] = zext i1 %x3 to i32 - // CHECK: insertelement <4 x i32> undef, i32 %[[X0]], i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %[[X3]], i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[CMP]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_b64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 +// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) +// CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], [[TMP7]]) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP8]]) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b64bb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) +// CPP-CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], [[TMP7]]) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP8]]) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svbool_t test_svdupq_n_b64(bool x0, bool x1) { - // CHECK-LABEL: test_svdupq_n_b64 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i64 - // CHECK-DAG: %[[X1:.*]] = zext i1 %x1 to i64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %[[X0]], i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %[[X1]], i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[CMP]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b64,)(x0, x1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c index 37c5a93ca4e04..777f7d306e376 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,469 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_sveor_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_sveor_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_sveor_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_sveor_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_sveor_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_sveor_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_sveor_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_sveor_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_sveor_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_sveor_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_sveor_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_sveor_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_sveor_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_sveor_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_sveor_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_sveor_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_sveor_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_sveor_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_sveor_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_sveor_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_sveor_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_sveor_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_sveor_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_sveor_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_sveor_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_sveor_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_sveor_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_sveor_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_sveor_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_sveor_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_sveor_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_sveor_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_sveor_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_sveor_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_sveor_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_sveor_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_sveor_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_sveor_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_sveor_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_sveor_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_sveor_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_sveor_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_sveor_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_sveor_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_sveor_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_sveor_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_sveor_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_sveor_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_sveor_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_sveor_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_sveor_n_s8_z - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_sveor_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_sveor_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_sveor_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_sveor_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_sveor_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_sveor_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_sveor_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_sveor_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_sveor_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_sveor_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_sveor_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_sveor_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_sveor_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_sveor_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_sveor_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_sveor_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_sveor_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_sveor_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_sveor_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_sveor_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_sveor_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_sveor_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_sveor_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_sveor_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_sveor_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_sveor_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_sveor_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_sveor_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_sveor_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_sveor_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_sveor_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_sveor_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_sveor_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_sveor_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_sveor_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_sveor_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_sveor_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_sveor_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_sveor_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_sveor_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_sveor_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_sveor_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_sveor_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_sveor_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_sveor_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_sveor_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_sveor_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_sveor_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_sveor_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c index 9fd6c0d283038..34b5c4faccc9b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,472 +14,891 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svlsl_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svlsl_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsl_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsl_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsl_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svlsl_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svlsl_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsl_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svlsl_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsl_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsl_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsl_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsl_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svlsl_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svlsl_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svlsl_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c index 4357f1a87cd3f..9558c623de2b1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,282 +14,532 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svlsr_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsr_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsr_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svlsr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsr_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsr_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsr_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsr_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_mu10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_wide_n_u8_m(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_mu10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_wide_n_u16_m(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_mu10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_wide_n_u32_m(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_zu10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svlsr_wide_n_u8_z(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_zu10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svlsr_wide_n_u16_z(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_zu10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svlsr_wide_n_u32_z(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_xu10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_wide_n_u8_x(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_xu10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_wide_n_u16_x(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_xu10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_wide_n_u32_x(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c index 49bd973c93d92..ee96c5407e30b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,637 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmad_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmad_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmad_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmad_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmad_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmad_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmad_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmad_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmad_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmad_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmad_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmad_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmad_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmad_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmad_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmad_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmad_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmad_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmad_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmad_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmad_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmad_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmad_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmad_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmad_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmad_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmad_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmad_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmad_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmad_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmad_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmad_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmad_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmad_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmad_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmad_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmad_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmad_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmad_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmad_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmad_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmad_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmad_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmad_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmad_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmad_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmad_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmad_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmad_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmad_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmad_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmad_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmad_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmad_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmad_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmad_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmad_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmad_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmad_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmad_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmad_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmad_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmad_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmad_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmad_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmad_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmad_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmad_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmad_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmad_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmad_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmad_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmad_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmad_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmad_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmad_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmad_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmad_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmad_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmad_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmad_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmad_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmad_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmad_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmad_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmad_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmad_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmad_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmad_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmad_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmad_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmad_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmad_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmad_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmad_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmad_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmad_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmad_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmad_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmad_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmad_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmad_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmad_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmad_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmad_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmad_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmad_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmad_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmad_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmad_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmad_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmad_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmad_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmad_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmad_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c index 246a025fa81ce..c42232960eaaf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,638 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmax_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmax_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmax_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmax_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmax_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmax_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmax_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmax_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmax_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmax_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmax_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmax_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmax_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmax_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmax_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmax_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmax_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmax_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmax_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmax_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmax_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmax_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmax_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmax_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmax_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmax_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmax_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmax_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmax_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmax_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmax_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmax_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmax_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmax_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmax_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmax_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmax_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmax_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmax_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmax_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmax_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmax_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmax_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmax_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmax_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmax_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmax_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmax_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmax_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmax_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmax_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmax_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmax_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmax_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmax_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmax_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmax_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmax_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmax_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmax_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmax_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmax_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmax_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmax_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmax_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmax_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmax_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmax_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmax_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmax_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmax_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmax_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmax_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmax_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmax_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmax_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmax_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmax_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmax_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmax_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmax_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmax_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmax_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmax_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmax_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmax_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmax_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmax_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmax_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmax_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmax_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmax_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmax_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmax_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmax_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmax_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmax_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmax_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmax_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmax_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmax_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmax_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmax_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmax_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmax_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmax_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmax_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmax_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmax_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmax_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmax_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmax_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmax_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmax_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmax_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmax_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmax_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmax_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmax_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmax_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmax_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmax_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmax_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmax_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmax_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmax_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmax_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmax_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmax_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmax_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmax_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmax_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmax_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c index 881ebec77034d..209ac1c7fd337 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,178 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmaxnm_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmaxnm_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmaxnm_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmaxnm_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmaxnm_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmaxnm_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmaxnm_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmaxnm_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmaxnm_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmaxnm_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c index 0e124707c97a5..22dd79c604af1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,638 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmin_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmin_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmin_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmin_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmin_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmin_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmin_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmin_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmin_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmin_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmin_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmin_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmin_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmin_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmin_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmin_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmin_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmin_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmin_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmin_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmin_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmin_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmin_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmin_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmin_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmin_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmin_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmin_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmin_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmin_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmin_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmin_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmin_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmin_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmin_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmin_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmin_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmin_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmin_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmin_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmin_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmin_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmin_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmin_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmin_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmin_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmin_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmin_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmin_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmin_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmin_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmin_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmin_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmin_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmin_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmin_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmin_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmin_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmin_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmin_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmin_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmin_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmin_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmin_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmin_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmin_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmin_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmin_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmin_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmin_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmin_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmin_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmin_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmin_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmin_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmin_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmin_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmin_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmin_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmin_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmin_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmin_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmin_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmin_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmin_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmin_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmin_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmin_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmin_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmin_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmin_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmin_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmin_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmin_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmin_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmin_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmin_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmin_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmin_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmin_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmin_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmin_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmin_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmin_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmin_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmin_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmin_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmin_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmin_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmin_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmin_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmin_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmin_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmin_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmin_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmin_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmin_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmin_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmin_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmin_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmin_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmin_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmin_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmin_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmin_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmin_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmin_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmin_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmin_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmin_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmin_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmin_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmin_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c index 6dbd5e89823dc..a8e245f0e112e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,178 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svminnm_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svminnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svminnm_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svminnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svminnm_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svminnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svminnm_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svminnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svminnm_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svminnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svminnm_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svminnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svminnm_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svminnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svminnm_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svminnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svminnm_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svminnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svminnm_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svminnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svminnm_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svminnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svminnm_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svminnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svminnm_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svminnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svminnm_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svminnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svminnm_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svminnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svminnm_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svminnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svminnm_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svminnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svminnm_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svminnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svminnm_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c index cbf591b75ecc2..fe707ec19267c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,685 +14,1300 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmla_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmla_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmla_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmla_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmla_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmla_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmla_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmla_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmla_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmla_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmla_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmla_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmla_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmla_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmla_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmla_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmla_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmla_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmla_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmla_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmla_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmla_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmla_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmla_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmla_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmla_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmla_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmla_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmla_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmla_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmla_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmla_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmla_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmla_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmla_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmla_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmla_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmla_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmla_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmla_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmla_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmla_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmla_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmla_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmla_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmla_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmla_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmla_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmla_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmla_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmla_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmla_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmla_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmla_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmla_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmla_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmla_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmla_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmla_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmla_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmla_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmla_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmla_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmla_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmla_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmla_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmla_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmla_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmla_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmla_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmla_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmla_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmla_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmla_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmla_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmla_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmla_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmla_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmla_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmla_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmla_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmla_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmla_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmla_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmla_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmla_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmla_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmla_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmla_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmla_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmla_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmla_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmla_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmla_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmla_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmla_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmla_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmla_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmla_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmla_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmla_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmla_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmla_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmla_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmla_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmla_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f16,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmla_lane_f16_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmla_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_lane_f16_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( %op1, %op2, %op3, i32 7) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f16,,)(op1, op2, op3, 7); } +// CHECK-LABEL: @test_svmla_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmla_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f32,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmla_lane_f32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmla_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_lane_f32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svmla_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmla_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f64,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmla_lane_f64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmla_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_lane_f64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c index 033b062dad712..ffb0b9b9e5224 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,685 +14,1300 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmls_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmls_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmls_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmls_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmls_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmls_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmls_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmls_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmls_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmls_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmls_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmls_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmls_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmls_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmls_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmls_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmls_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmls_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmls_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmls_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmls_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmls_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmls_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmls_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmls_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmls_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmls_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmls_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmls_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmls_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmls_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmls_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmls_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmls_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmls_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmls_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmls_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmls_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmls_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmls_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmls_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmls_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmls_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmls_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmls_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmls_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmls_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmls_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmls_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmls_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmls_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmls_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmls_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmls_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmls_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmls_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmls_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmls_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmls_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmls_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmls_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmls_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmls_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmls_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmls_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmls_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmls_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmls_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmls_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmls_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmls_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmls_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmls_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmls_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmls_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmls_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmls_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmls_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmls_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmls_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmls_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmls_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmls_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmls_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmls_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmls_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmls_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmls_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmls_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmls_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmls_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmls_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmls_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmls_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmls_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmls_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmls_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmls_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmls_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmls_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmls_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmls_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmls_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmls_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmls_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmls_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmls_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f16,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmls_lane_f16_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmls_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_lane_f16_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( %op1, %op2, %op3, i32 7) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f16,,)(op1, op2, op3, 7); } +// CHECK-LABEL: @test_svmls_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmls_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f32,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmls_lane_f32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmls_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_lane_f32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svmls_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmls_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f64,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmls_lane_f64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmls_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_lane_f64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c index 24c9deb86a507..b3cdba08cf883 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,637 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmsb_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmsb_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmsb_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmsb_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmsb_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmsb_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmsb_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmsb_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmsb_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmsb_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmsb_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmsb_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmsb_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmsb_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmsb_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmsb_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmsb_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmsb_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmsb_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmsb_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmsb_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmsb_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmsb_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmsb_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmsb_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmsb_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmsb_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmsb_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmsb_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmsb_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmsb_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmsb_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmsb_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmsb_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmsb_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmsb_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmsb_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmsb_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmsb_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmsb_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmsb_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmsb_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmsb_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmsb_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmsb_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmsb_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmsb_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmsb_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmsb_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmsb_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmsb_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmsb_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmsb_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmsb_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmsb_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmsb_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmsb_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmsb_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmsb_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmsb_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmsb_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmsb_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmsb_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmsb_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmsb_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmsb_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmsb_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmsb_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmsb_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmsb_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmsb_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmsb_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmsb_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmsb_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmsb_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmsb_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmsb_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmsb_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmsb_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmsb_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmsb_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmsb_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmsb_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmsb_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmsb_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmsb_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmsb_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmsb_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmsb_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmsb_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmsb_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmsb_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmsb_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmsb_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmsb_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmsb_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmsb_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmsb_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmsb_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmsb_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmsb_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmsb_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmsb_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmsb_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmsb_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmsb_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmsb_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmsb_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmsb_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmsb_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmsb_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmsb_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmsb_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmsb_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmsb_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c index d2110cd1819b3..293018e96ff42 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,687 +14,1300 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmul_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmul_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmul_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmul_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmul_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmul_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmul_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmul_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmul_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmul_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmul_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmul_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmul_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmul_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmul_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmul_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmul_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmul_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmul_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmul_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmul_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmul_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmul_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmul_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmul_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmul_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmul_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmul_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmul_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmul_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmul_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmul_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmul_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmul_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmul_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmul_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmul_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmul_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmul_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmul_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmul_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmul_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmul_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmul_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmul_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmul_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmul_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmul_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmul_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmul_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmul_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmul_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmul_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmul_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmul_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmul_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmul_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmul_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmul_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmul_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmul_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmul_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmul_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmul_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmul_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmul_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmul_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmul_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmul_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmul_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmul_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmul_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmul_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmul_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmul_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmul_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmul_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmul_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmul_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmul_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmul_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmul_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmul_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmul_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmul_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmul_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmul_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmul_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmul_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmul_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmul_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmul_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmul_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmul_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmul_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmul_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmul_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmul_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmul_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmul_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmul_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmul_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmul_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmul_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmul_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmul_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmul_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmul_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmul_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmul_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmul_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmul_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmul_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmul_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmul_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmul_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmul_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmul_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmul_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmul_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmul_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmul_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmul_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmul_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f16u13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmul_lane_f16(svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( %op1, %op2, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 0); } +// CHECK-LABEL: @test_svmul_lane_f16_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f16_1u13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmul_lane_f16_1(svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_lane_f16_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( %op1, %op2, i32 7) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 7); } +// CHECK-LABEL: @test_svmul_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f32u13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmul_lane_f32(svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( %op1, %op2, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 0); } +// CHECK-LABEL: @test_svmul_lane_f32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f32_1u13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmul_lane_f32_1(svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_lane_f32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( %op1, %op2, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 3); } +// CHECK-LABEL: @test_svmul_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f64u13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmul_lane_f64(svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( %op1, %op2, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 0); } +// CHECK-LABEL: @test_svmul_lane_f64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f64_1u13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmul_lane_f64_1(svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_lane_f64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( %op1, %op2, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c index 2614be69dec71..162be519a8941 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,462 +14,874 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmulh_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmulh_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmulh_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmulh_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmulh_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmulh_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmulh_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmulh_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmulh_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmulh_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmulh_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmulh_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmulh_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmulh_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmulh_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmulh_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmulh_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmulh_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmulh_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmulh_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmulh_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmulh_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmulh_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmulh_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmulh_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmulh_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmulh_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmulh_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmulh_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmulh_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmulh_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmulh_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmulh_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmulh_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmulh_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmulh_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmulh_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmulh_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmulh_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmulh_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmulh_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmulh_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmulh_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmulh_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmulh_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmulh_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmulh_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmulh_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmulh_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmulh_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmulh_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmulh_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmulh_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmulh_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmulh_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmulh_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmulh_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmulh_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmulh_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmulh_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmulh_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmulh_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmulh_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmulh_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmulh_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmulh_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmulh_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmulh_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmulh_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmulh_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmulh_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmulh_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmulh_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmulh_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmulh_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmulh_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmulh_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmulh_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmulh_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmulh_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmulh_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmulh_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmulh_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmulh_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmulh_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmulh_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmulh_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmulh_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmulh_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmulh_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmulh_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmulh_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmulh_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmulh_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmulh_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmulh_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmulh_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c index 1fb72675273cb..71846e792b3f9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmulx_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmulx_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmulx_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmulx_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmulx_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmulx_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmulx_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmulx_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmulx_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmulx_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmulx_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmulx_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmulx_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmulx_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmulx_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmulx_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmulx_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmulx_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmulx_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmulx_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmulx_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmulx_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmulx_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmulx_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmulx_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmulx_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmulx_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmulx_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmulx_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmulx_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmulx_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmulx_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmulx_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmulx_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmulx_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmulx_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmulx_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c index 80a8f19506dd3..cd0b371f26fa5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmad_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmad_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmad_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmad_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmad_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmad_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmad_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmad_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmad_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmad_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmad_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmad_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmad_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmad_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmad_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmad_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmad_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmad_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmad_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c index 8647fae29868e..d0c8f8870995e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmla_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmla_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmla_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmla_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmla_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmla_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmla_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmla_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmla_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmla_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmla_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmla_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmla_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmla_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmla_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmla_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmla_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmla_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmla_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c index 37547faba3d2f..665dd49b80f2c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmls_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmls_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmls_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmls_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmls_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmls_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmls_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmls_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmls_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmls_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmls_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmls_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmls_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmls_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmls_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmls_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmls_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmls_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmls_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c index e814a0925ccc9..c931855967e91 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmsb_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmsb_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmsb_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmsb_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmsb_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmsb_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmsb_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmsb_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmsb_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmsb_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmsb_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmsb_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmsb_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmsb_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmsb_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmsb_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmsb_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmsb_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmsb_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c index 3727afcd38080..28075e2dcc407 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,470 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svorr_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svorr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svorr_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svorr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svorr_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svorr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svorr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svorr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svorr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svorr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svorr_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svorr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svorr_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svorr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svorr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svorr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svorr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svorr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svorr_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svorr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svorr_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svorr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svorr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svorr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svorr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svorr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svorr_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svorr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svorr_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svorr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svorr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svorr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svorr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svorr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svorr_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svorr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svorr_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svorr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svorr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svorr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svorr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svorr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svorr_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svorr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svorr_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svorr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svorr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svorr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svorr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svorr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svorr_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svorr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svorr_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svorr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svorr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svorr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svorr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svorr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svorr_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svorr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svorr_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svorr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svorr_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svorr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svorr_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svorr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svorr_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svorr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svorr_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svorr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svorr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svorr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svorr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svorr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svorr_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svorr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svorr_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svorr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svorr_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svorr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svorr_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svorr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svorr_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svorr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svorr_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svorr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svorr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svorr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svorr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svorr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svorr_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svorr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svorr_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svorr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svorr_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svorr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svorr_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svorr_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svorr_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_svorr_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c index 3cb66cc0b85a8..106ff55707da3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,138 +14,258 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svqadd_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqadd_s8u10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svqadd_s8(svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svqadd_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_s16u11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svqadd_s16(svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svqadd_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_s32u11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svqadd_s32(svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svqadd_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_s64u11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svqadd_s64(svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svqadd_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqadd_u8u11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svqadd_u8(svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svqadd_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_u16u12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svqadd_u16(svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svqadd_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_u32u12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svqadd_u32(svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svqadd_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_u64u12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svqadd_u64(svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svqadd_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u64,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqadd_n_s8u10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svqadd_n_s8(svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svqadd_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s16u11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svqadd_n_s16(svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svqadd_n_s16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s32u11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svqadd_n_s32(svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svqadd_n_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s64u11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svqadd_n_s64(svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svqadd_n_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqadd_n_u8u11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svqadd_n_u8(svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svqadd_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u16u12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svqadd_n_u16(svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svqadd_n_u16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u32u12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svqadd_n_u32(svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svqadd_n_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svqadd_n_u64(svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svqadd_n_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c index 3a59667f3c2fd..bacc2efc1b53b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,138 +14,258 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svqsub_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqsub_s8u10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svqsub_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_s16u11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svqsub_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_s32u11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svqsub_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_s64u11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svqsub_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqsub_u8u11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svqsub_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_u16u12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svqsub_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_u32u12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svqsub_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_u64u12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svqsub_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u64,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqsub_n_s8u10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svqsub_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s16u11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svqsub_n_s16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s32u11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svqsub_n_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s64u11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svqsub_n_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqsub_n_u8u11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svqsub_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u16u12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svqsub_n_u16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u32u12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svqsub_n_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svqsub_n_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c index ef53940b9fa07..6781b1496c98b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svscale_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f16_zu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svscale_f16_z(svbool_t pg, svfloat16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svscale_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f32_zu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svscale_f32_z(svbool_t pg, svfloat32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svscale_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f64_zu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svscale_f64_z(svbool_t pg, svfloat64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svscale_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f16_mu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svscale_f16_m(svbool_t pg, svfloat16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svscale_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f32_mu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svscale_f32_m(svbool_t pg, svfloat32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svscale_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f64_mu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svscale_f64_m(svbool_t pg, svfloat64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svscale_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f16_xu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svscale_f16_x(svbool_t pg, svfloat16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svscale_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f32_xu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svscale_f32_x(svbool_t pg, svfloat32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svscale_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f64_xu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svscale_f64_x(svbool_t pg, svfloat64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svscale_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_zu10__SVBool_tu13__SVFloat16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svscale_n_f16_z(svbool_t pg, svfloat16_t op1, int16_t op2) { - // CHECK-LABEL: test_svscale_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_zu10__SVBool_tu13__SVFloat32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svscale_n_f32_z(svbool_t pg, svfloat32_t op1, int32_t op2) { - // CHECK-LABEL: test_svscale_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_zu10__SVBool_tu13__SVFloat64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svscale_n_f64_z(svbool_t pg, svfloat64_t op1, int64_t op2) { - // CHECK-LABEL: test_svscale_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_mu10__SVBool_tu13__SVFloat16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svscale_n_f16_m(svbool_t pg, svfloat16_t op1, int16_t op2) { - // CHECK-LABEL: test_svscale_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_mu10__SVBool_tu13__SVFloat32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svscale_n_f32_m(svbool_t pg, svfloat32_t op1, int32_t op2) { - // CHECK-LABEL: test_svscale_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_mu10__SVBool_tu13__SVFloat64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svscale_n_f64_m(svbool_t pg, svfloat64_t op1, int64_t op2) { - // CHECK-LABEL: test_svscale_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_xu10__SVBool_tu13__SVFloat16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svscale_n_f16_x(svbool_t pg, svfloat16_t op1, int16_t op2) { - // CHECK-LABEL: test_svscale_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_xu10__SVBool_tu13__SVFloat32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svscale_n_f32_x(svbool_t pg, svfloat32_t op1, int32_t op2) { - // CHECK-LABEL: test_svscale_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_xu10__SVBool_tu13__SVFloat64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svscale_n_f64_x(svbool_t pg, svfloat64_t op1, int64_t op2) { - // CHECK-LABEL: test_svscale_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c index 977c7937d0ebf..2b9fd96f552bc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svsub_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsub_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsub_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsub_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsub_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsub_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsub_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsub_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsub_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsub_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsub_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsub_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsub_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsub_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsub_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsub_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsub_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsub_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsub_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsub_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsub_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsub_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsub_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsub_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsub_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsub_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsub_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsub_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsub_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsub_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsub_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsub_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsub_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsub_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsub_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsub_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsub_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsub_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsub_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsub_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsub_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsub_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsub_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsub_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsub_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsub_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsub_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsub_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsub_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsub_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsub_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsub_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsub_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsub_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsub_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsub_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsub_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsub_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsub_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsub_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsub_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsub_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsub_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsub_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsub_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsub_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsub_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svsub_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsub_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svsub_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsub_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svsub_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsub_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsub_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsub_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsub_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsub_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsub_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsub_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsub_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsub_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsub_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsub_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsub_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsub_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c index 95dadd7cae1b5..2866975f05a03 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svsubr_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsubr_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsubr_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsubr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsubr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsubr_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsubr_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsubr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsubr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsubr_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsubr_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsubr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsubr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsubr_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsubr_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsubr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsubr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsubr_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsubr_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsubr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsubr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsubr_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsubr_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsubr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsubr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsubr_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsubr_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsubr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsubr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsubr_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsubr_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsubr_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsubr_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsubr_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsubr_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsubr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsubr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsubr_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsubr_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsubr_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsubr_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsubr_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsubr_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsubr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsubr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsubr_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsubr_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsubr_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsubr_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsubr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsubr_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsubr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsubr_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsubr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsubr_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsubr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsubr_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsubr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsubr_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsubr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsubr_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsubr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsubr_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsubr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsubr_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsubr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsubr_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svsubr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsubr_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svsubr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsubr_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svsubr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsubr_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsubr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsubr_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsubr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsubr_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsubr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsubr_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsubr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsubr_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsubr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsubr_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsubr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsubr_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c index 6f0e4daaa2d6c..e23bf6ce10d4d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,45 +13,88 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svsudot_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsudot_s32u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_s32(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_s32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %z, %y) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot, _s32, , )(x, y, z); } +// CHECK-LABEL: @test_svsudot_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsudot_n_s32u11__SVInt32_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsudot_n_s32(svint32_t x, svint8_t y, uint8_t z) { - // CHECK-LABEL: test_svsudot_n_s32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %[[SPLAT]], %y) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot, _n_s32, , )(x, y, z); } +// CHECK-LABEL: @test_svsudot_lane_s32_0( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_0u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_0(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_0 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_svsudot_lane_s32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_1(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_1 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 1) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 1); } +// CHECK-LABEL: @test_svsudot_lane_s32_2( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_2u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_2(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_2 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 2) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 2); } +// CHECK-LABEL: @test_svsudot_lane_s32_3( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_3u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_3(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_3 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 3) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c index e77f509b22c3f..0eefd34b490b2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,45 +13,88 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svusdot_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svusdot_s32u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_s32(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_s32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot, _s32, , )(x, y, z); } +// CHECK-LABEL: @test_svusdot_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svusdot_n_s32u11__SVInt32_tu11__SVUint8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svusdot_n_s32(svint32_t x, svuint8_t y, int8_t z) { - // CHECK-LABEL: test_svusdot_n_s32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot, _n_s32, , )(x, y, z); } +// CHECK-LABEL: @test_svusdot_lane_s32_0( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_0u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_0(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_0 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_svusdot_lane_s32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_1u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_1(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_1 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 1) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 1); } +// CHECK-LABEL: @test_svusdot_lane_s32_2( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_2u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_2(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_2 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 2) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 2); } +// CHECK-LABEL: @test_svusdot_lane_s32_3( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_3u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_3(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_3 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 3) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 3); } diff --git a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp index 92a2378e59e21..ef29d24de1dbc 100644 --- a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp +++ b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp @@ -1,14 +1,7 @@ // RUN: %clang_cc1 -fexperimental-strict-floating-point -DEXCEPT=1 -fcxx-exceptions -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-NS %s -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-DEFAULT +// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s // RUN: %clang_cc1 -fexperimental-strict-floating-point -DFENV_ON=1 -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-FENV %s -// RUN: %clang_cc1 -fexperimental-strict-floating-point -DNF128 -triple %itanium_abi_triple -O3 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-O3 %s -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple x86_64-linux-gnu -emit-llvm -o - %s -ffp-eval-method=source | FileCheck %s -check-prefix=CHECK-SOURCE -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple x86_64-linux-gnu -emit-llvm -o - %s -ffp-eval-method=double | FileCheck %s -check-prefix=CHECK-DOUBLE -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple x86_64-linux-gnu -emit-llvm -o - %s -ffp-eval-method=extended -mlong-double-80 | FileCheck %s -check-prefix=CHECK-EXTENDED -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple i386-linux-gnu -emit-llvm -o - %s -ffp-eval-method=source | FileCheck %s -check-prefix=CHECK-SOURCE -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple i386-linux-gnu -emit-llvm -o - %s -ffp-eval-method=double | FileCheck %s -check-prefix=CHECK-DOUBLE -// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple i386-linux-gnu -emit-llvm -o - %s -ffp-eval-method=extended -mlong-double-80 | FileCheck %s -check-prefix=CHECK-EXTENDED -// RUN: %clang_cc1 -triple powerpc-unknown-aix -DNF128 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-AIX +// RUN: %clang_cc1 -fexperimental-strict-floating-point -triple %itanium_abi_triple -O3 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-O3 %s // Verify float_control(precise, off) enables fast math flags on fp operations. float fp_precise_1(float a, float b, float c) { @@ -236,86 +229,3 @@ float try_lam(float x, unsigned n) { result = x + t; return result; } - -float mySub(float x, float y) { - // CHECK: define {{.*}}float {{.*}}mySub{{.*}} - // CHECK-NS: fsub float - // CHECK-SOURCE: fsub float - // CHECK-DOUBLE: fpext float - // CHECK-DOUBLE: fpext float - // CHECK-DOUBLE: fsub double - // CHECK-DOUBLE: fptrunc double {{.*}} to float - // CHECK-EXTENDED: fpext float - // CHECK-EXTENDED: fpext float - // CHECK-EXTENDED: fsub double - // CHECK-EXTENDED: fptrunc double {{.*}} to float - return x - y; -} - -float mySubSource(float x, float y) { -// CHECK: define {{.*}}float {{.*}}mySubSource{{.*}} -#pragma float_control(source) - return x - y; - // CHECK: fsub float -} - -float mySubExtended(float x, float y) { -// CHECK: define {{.*}}float {{.*}}mySubExtended{{.*}} -#pragma float_control(extended) - return x - y; - // CHECK: fpext float - // CHECK: fpext float - // CHECK: fsub x86_fp80 - // CHECK: fptrunc x86_fp80 {{.*}} to float -} - -float mySubDouble(float x, float y) { -// CHECK: define {{.*}}float {{.*}}mySubDouble{{.*}} -#pragma float_control(double) - return x - y; - // CHECK: fpext float - // CHECK: fpext float - // CHECK: fsub double - // CHECK: fptrunc double {{.*}} to float -} - -#ifndef NF128 -__float128 mySub128(__float128 x, __float128 y) { - // CHECK: define {{.*}}mySub128{{.*}} - // Expect no fpext since fp128 is already widest - // CHECK: load fp128 - // CHECK-NEXT: load fp128 - // CHECK-NEXT: fsub fp128 - // CHECK-NEXT: ret fp128 - return x - y; -} -#endif - -void mySubfp16(__fp16 *res, __fp16 *x, __fp16 *y) { - // CHECK: define {{.*}}mySubfp16{{.*}} - *res = *x - *y; - // CHECK: load half - // CHECK-NEXT: load half - // CHECK-NEXT: fpext half{{.*}} - // CHECK-NEXT: load half - // CHECK-NEXT: load half - // CHECK-NS: fpext half{{.*}} to float - // CHECK-DEFAULT: fpext half{{.*}} to float - // CHECK-DOUBLE: fpext half{{.*}} to double - // CHECK-EXTENDED: fpext half{{.*}} to x86_fp80 - // CHECK-NEXT: fsub - // CHECK-NEXT: fptrunc {{.*}}to half - // CHECK-NS: fptrunc float {{.*}} to half - // CHECK-DOUBLE: fptrunc double {{.*}} to half - // CHECK-EXTENDED: fptrunc x86_fp80 {{.*}} to half -} - -int getFEM() { - // CHECK: define {{.*}}getFEM{{.*}} - return __FLT_EVAL_METHOD__; - // CHECK-NS: ret {{.*}} 0 - // CHECK-AIX: ret {{.*}} 1 - // CHECK-SOURCE: ret {{.*}} 0 - // CHECK-DOUBLE: ret {{.*}} 1 - // CHECK-EXTENDED: ret {{.*}} 2 -} diff --git a/clang/test/CodeGen/strictfp_builtins.c b/clang/test/CodeGen/strictfp_builtins.c index 25eaac7cc6cc3..fbf3c274bd6d8 100644 --- a/clang/test/CodeGen/strictfp_builtins.c +++ b/clang/test/CodeGen/strictfp_builtins.c @@ -17,7 +17,7 @@ int printf(const char *, ...); // CHECK-NEXT: store i32 [[X:%.*]], i32* [[X_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** [[STR_ADDR]], align 8 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[X_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* [[TMP0]], i32 [[TMP1]]) #[[ATTR5:[0-9]+]] +// CHECK-NEXT: [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* [[TMP0]], i32 [[TMP1]]) [[ATTR4:#.*]] // CHECK-NEXT: ret void // void p(char *str, int x) { @@ -31,21 +31,21 @@ void p(char *str, int x) { // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 // CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[ISZERO:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR5]] +// CHECK-NEXT: [[ISZERO:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]] // CHECK-NEXT: br i1 [[ISZERO]], label [[FPCLASSIFY_END:%.*]], label [[FPCLASSIFY_NOT_ZERO:%.*]] // CHECK: fpclassify_end: // CHECK-NEXT: [[FPCLASSIFY_RESULT:%.*]] = phi i32 [ 4, [[ENTRY:%.*]] ], [ 0, [[FPCLASSIFY_NOT_ZERO]] ], [ 1, [[FPCLASSIFY_NOT_NAN:%.*]] ], [ [[TMP2:%.*]], [[FPCLASSIFY_NOT_INF:%.*]] ] -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i32 [[FPCLASSIFY_RESULT]]) #[[ATTR5]] +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i32 [[FPCLASSIFY_RESULT]]) [[ATTR4]] // CHECK-NEXT: ret void // CHECK: fpclassify_not_zero: -// CHECK-NEXT: [[CMP:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double [[TMP0]], metadata !"uno", metadata !"fpexcept.strict") #[[ATTR5]] +// CHECK-NEXT: [[CMP:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double [[TMP0]], metadata !"uno", metadata !"fpexcept.strict") [[ATTR4]] // CHECK-NEXT: br i1 [[CMP]], label [[FPCLASSIFY_END]], label [[FPCLASSIFY_NOT_NAN]] // CHECK: fpclassify_not_nan: -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) #[[ATTR6:[0-9]+]] -// CHECK-NEXT: [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR5]] +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) [[ATTR5:#.*]] +// CHECK-NEXT: [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]] // CHECK-NEXT: br i1 [[ISINF]], label [[FPCLASSIFY_END]], label [[FPCLASSIFY_NOT_INF]] // CHECK: fpclassify_not_inf: -// CHECK-NEXT: [[ISNORMAL:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x10000000000000, metadata !"uge", metadata !"fpexcept.strict") #[[ATTR5]] +// CHECK-NEXT: [[ISNORMAL:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x10000000000000, metadata !"uge", metadata !"fpexcept.strict") [[ATTR4]] // CHECK-NEXT: [[TMP2]] = select i1 [[ISNORMAL]], i32 2, i32 3 // CHECK-NEXT: br label [[FPCLASSIFY_END]] // @@ -57,14 +57,14 @@ void test_fpclassify(double d) { // CHECK-LABEL: @test_fp16_isinf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[H_ADDR:%.*]] = alloca half, align 2 -// CHECK-NEXT: store half [[H:%.*]], half* [[H_ADDR]], align 2 -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half [[TMP0]] to i16 -// CHECK-NEXT: [[TMP2:%.*]] = shl i16 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp eq i16 [[TMP2]], -2048 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.2, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR5]] +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT: store half [[H:%.*]], half* [[LD_ADDR]], align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, half* [[LD_ADDR]], align 2 +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT: [[SHL1:%.*]] = shl i16 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[SHL1]], -2048 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:2]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_fp16_isinf(__fp16 h) { @@ -75,14 +75,14 @@ void test_fp16_isinf(__fp16 h) { // CHECK-LABEL: @test_float_isinf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[F_ADDR:%.*]] = alloca float, align 4 -// CHECK-NEXT: store float [[F:%.*]], float* [[F_ADDR]], align 4 -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[TMP0]] to i32 -// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], -16777216 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR5]] +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca float, align 4 +// CHECK-NEXT: store float [[F:%.*]], float* [[LD_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[LD_ADDR]], align 4 +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast float [[TMP0]] to i32 +// CHECK-NEXT: [[SHL1:%.*]] = shl i32 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[SHL1]], -16777216 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_float_isinf(float f) { @@ -93,14 +93,14 @@ void test_float_isinf(float f) { // CHECK-LABEL: @test_double_isinf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 -// CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double [[TMP0]] to i64 -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[TMP2]], -9007199254740992 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR5]] +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca double, align 8 +// CHECK-NEXT: store double [[D:%.*]], double* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast double [[TMP0]] to i64 +// CHECK-NEXT: [[SHL1:%.*]] = shl i64 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[SHL1]], -9007199254740992 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_double_isinf(double d) { @@ -111,14 +111,14 @@ void test_double_isinf(double d) { // CHECK-LABEL: @test_fp16_isfinite( // CHECK-NEXT: entry: -// CHECK-NEXT: [[H_ADDR:%.*]] = alloca half, align 2 -// CHECK-NEXT: store half [[H:%.*]], half* [[H_ADDR]], align 2 -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half [[TMP0]] to i16 -// CHECK-NEXT: [[TMP2:%.*]] = shl i16 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp ult i16 [[TMP2]], -2048 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.5, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR5]] +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT: store half [[H:%.*]], half* [[LD_ADDR]], align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, half* [[LD_ADDR]], align 2 +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT: [[SHL1:%.*]] = shl i16 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[SHL1]], -2048 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_fp16_isfinite(__fp16 h) { @@ -129,14 +129,14 @@ void test_fp16_isfinite(__fp16 h) { // CHECK-LABEL: @test_float_isfinite( // CHECK-NEXT: entry: -// CHECK-NEXT: [[F_ADDR:%.*]] = alloca float, align 4 -// CHECK-NEXT: store float [[F:%.*]], float* [[F_ADDR]], align 4 -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[TMP0]] to i32 -// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], -16777216 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.6, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR5]] +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca float, align 4 +// CHECK-NEXT: store float [[F:%.*]], float* [[LD_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[LD_ADDR]], align 4 +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast float [[TMP0]] to i32 +// CHECK-NEXT: [[SHL1:%.*]] = shl i32 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[SHL1]], -16777216 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_float_isfinite(float f) { @@ -147,14 +147,14 @@ void test_float_isfinite(float f) { // CHECK-LABEL: @test_double_isfinite( // CHECK-NEXT: entry: -// CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 -// CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double [[TMP0]] to i64 -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP1]], 1 -// CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], -9007199254740992 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.7, i64 0, i64 0), i32 [[TMP4]]) #[[ATTR5]] +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca double, align 8 +// CHECK-NEXT: store double [[D:%.*]], double* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast double [[TMP0]] to i64 +// CHECK-NEXT: [[SHL1:%.*]] = shl i64 [[BITCAST]], 1 +// CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SHL1]], -9007199254740992 +// CHECK-NEXT: [[RES:%.*]] = zext i1 [[CMP]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_double_isfinite(double d) { @@ -168,13 +168,13 @@ void test_double_isfinite(double d) { // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 // CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) #[[ATTR6]] -// CHECK-NEXT: [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR5]] +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) [[ATTR5]] +// CHECK-NEXT: [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast double [[TMP0]] to i64 // CHECK-NEXT: [[TMP3:%.*]] = icmp slt i64 [[TMP2]], 0 // CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 -1, i32 1 // CHECK-NEXT: [[TMP5:%.*]] = select i1 [[ISINF]], i32 [[TMP4]], i32 0 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.8, i64 0, i64 0), i32 [[TMP5]]) #[[ATTR5]] +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[TMP5]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_isinf_sign(double d) { @@ -188,9 +188,12 @@ void test_isinf_sign(double d) { // CHECK-NEXT: [[H_ADDR:%.*]] = alloca half, align 2 // CHECK-NEXT: store half [[H:%.*]], half* [[H_ADDR]], align 2 // CHECK-NEXT: [[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 -// CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.isnan.f16(half [[TMP0]]) #[[ATTR5]] -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.9, i64 0, i64 0), i32 [[TMP2]]) #[[ATTR5]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT: [[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT: [[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT: [[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_fp16_isnan(__fp16 h) { @@ -204,9 +207,11 @@ void test_fp16_isnan(__fp16 h) { // CHECK-NEXT: [[F_ADDR:%.*]] = alloca float, align 4 // CHECK-NEXT: store float [[F:%.*]], float* [[F_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4 -// CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.isnan.f32(float [[TMP0]]) #[[ATTR5]] -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.10, i64 0, i64 0), i32 [[TMP2]]) #[[ATTR5]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast float [[TMP0]] to i32 +// CHECK-NEXT: [[ABS:%.*]] = and i32 [[BITCAST]], [[#%u,0x7FFFFFFF]] +// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[#%u,0x7F800000]], [[ABS]] +// CHECK-NEXT: [[ISNAN:%.*]] = lshr i32 [[TMP1]], 31 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[ISNAN]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_float_isnan(float f) { @@ -220,9 +225,12 @@ void test_float_isnan(float f) { // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 // CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP1:%.*]] = call i1 @llvm.isnan.f64(double [[TMP0]]) #[[ATTR5]] -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.11, i64 0, i64 0), i32 [[TMP2]]) #[[ATTR5]] +// CHECK-NEXT: [[BITCAST:%.*]] = bitcast double [[TMP0]] to i64 +// CHECK-NEXT: [[ABS:%.*]] = and i64 [[BITCAST]], [[#%u,0x7FFFFFFFFFFFFFFF]] +// CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[#%u,0x7FF0000000000000]], [[ABS]] +// CHECK-NEXT: [[ISNAN:%.*]] = lshr i64 [[TMP1]], 63 +// CHECK-NEXT: [[RES:%.*]] = trunc i64 [[ISNAN]] to i32 +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_double_isnan(double d) { @@ -236,14 +244,14 @@ void test_double_isnan(double d) { // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 // CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[ISEQ:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double [[TMP0]], metadata !"oeq", metadata !"fpexcept.strict") #[[ATTR5]] -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) #[[ATTR6]] -// CHECK-NEXT: [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"ult", metadata !"fpexcept.strict") #[[ATTR5]] -// CHECK-NEXT: [[ISNORMAL:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x10000000000000, metadata !"uge", metadata !"fpexcept.strict") #[[ATTR5]] +// CHECK-NEXT: [[ISEQ:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double [[TMP0]], metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]] +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) [[ATTR5]] +// CHECK-NEXT: [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"ult", metadata !"fpexcept.strict") [[ATTR4]] +// CHECK-NEXT: [[ISNORMAL:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x10000000000000, metadata !"uge", metadata !"fpexcept.strict") [[ATTR4]] // CHECK-NEXT: [[AND:%.*]] = and i1 [[ISEQ]], [[ISINF]] // CHECK-NEXT: [[AND1:%.*]] = and i1 [[AND]], [[ISNORMAL]] // CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[AND1]] to i32 -// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.12, i64 0, i64 0), i32 [[TMP2]]) #[[ATTR5]] +// CHECK-NEXT: call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[TMP2]]) [[ATTR4]] // CHECK-NEXT: ret void // void test_isnormal(double d) { diff --git a/clang/test/CodeGenSYCL/field-annotate-addr-space.cpp b/clang/test/CodeGenSYCL/field-annotate-addr-space.cpp new file mode 100644 index 0000000000000..2184ceb3ab656 --- /dev/null +++ b/clang/test/CodeGenSYCL/field-annotate-addr-space.cpp @@ -0,0 +1,19 @@ +// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s + +// CHECK: [[ANNOT:.+]] = private unnamed_addr constant {{.*}}c"my_annotation\00" + +struct HasField { + // This caused an assertion on creating a bitcast here, + // since the address space didn't match. + [[clang::annotate("my_annotation")]] + int *a; +}; + +__attribute__((sycl_device)) void foo(int *b) { + struct HasField f; + // CHECK: %[[A:.+]] = getelementptr inbounds %struct{{.*}}.HasField, %struct{{.*}}.HasField addrspace(4)* %{{.+}} + // CHECK: %[[BITCAST:.+]] = bitcast i32 addrspace(4)* addrspace(4)* %[[A]] to i8 addrspace(4)* + // CHECK: %[[CALL:.+]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8(i8 addrspace(4)* %[[BITCAST]], i8* getelementptr inbounds ([14 x i8], [14 x i8]* [[ANNOT]] + // CHECK: bitcast i8 addrspace(4)* %[[CALL]] to i32 addrspace(4)* addrspace(4)* + f.a = b; +} diff --git a/clang/test/Driver/check-time-trace-sections.py b/clang/test/Driver/check-time-trace-sections.py index 7551e5c19be50..297ab38e36555 100644 --- a/clang/test/Driver/check-time-trace-sections.py +++ b/clang/test/Driver/check-time-trace-sections.py @@ -20,10 +20,8 @@ def is_before(range1, range2): beginning_of_time = log_contents["beginningOfTime"] / 1000000 seconds_since_epoch = time.time() -# Make sure that the 'beginningOfTime' is not earlier than 10 seconds ago -# and not later than now. -if beginning_of_time > seconds_since_epoch or \ - seconds_since_epoch - beginning_of_time > 10: +# Make sure that the 'beginningOfTime' is not later than now. +if beginning_of_time > seconds_since_epoch: sys.exit("'beginningOfTime' should represent the absolute time when the " "process has started") diff --git a/clang/test/Driver/cl-x86-flags.c b/clang/test/Driver/cl-x86-flags.c index 15e3e012f2ac1..8d7b74ffb87ac 100644 --- a/clang/test/Driver/cl-x86-flags.c +++ b/clang/test/Driver/cl-x86-flags.c @@ -6,7 +6,8 @@ // flag space. // RUN: %clang_cl /Zs /WX -m32 -m64 -msse3 -msse4.1 -mavx -mno-avx \ // RUN: --target=i386-pc-win32 -### -- 2>&1 %s | FileCheck -check-prefix=MFLAGS %s -// MFLAGS-NOT: argument unused during compilation +// MFLAGS-NOT: invalid /arch: argument +// // RUN: %clang_cl -m32 -arch:IA32 --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_IA32 -- %s #if defined(TEST_32_ARCH_IA32) @@ -17,10 +18,10 @@ // arch: args are case-sensitive. // RUN: %clang_cl -m32 -arch:ia32 --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=ia32 %s -// ia32: argument unused during compilation +// ia32: invalid /arch: argument 'ia32'; for 32-bit expected one of AVX, AVX2, AVX512, AVX512F, IA32, SSE, SSE2 // RUN: %clang_cl -m64 -arch:IA32 --target=x86_64-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=IA3264 %s -// IA3264: argument unused during compilation +// IA3264: invalid /arch: argument 'IA32'; for 64-bit expected one of AVX, AVX2, AVX512, AVX512F // RUN: %clang_cl -m32 -arch:SSE --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_SSE -- %s #if defined(TEST_32_ARCH_SSE) @@ -30,7 +31,7 @@ #endif // RUN: %clang_cl -m32 -arch:sse --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=sse %s -// sse: argument unused during compilation +// sse: invalid /arch: argument // RUN: %clang_cl -m32 -arch:SSE2 --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_SSE2 -- %s #if defined(TEST_32_ARCH_SSE2) @@ -40,13 +41,13 @@ #endif // RUN: %clang_cl -m32 -arch:sse2 --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=sse %s -// sse2: argument unused during compilation +// sse2: invalid /arch: argument // RUN: %clang_cl -m64 -arch:SSE --target=x86_64-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=SSE64 %s -// SSE64: argument unused during compilation +// SSE64: invalid /arch: argument 'SSE'; for 64-bit expected one of AVX, AVX2, AVX512, AVX512F // RUN: %clang_cl -m64 -arch:SSE2 --target=x86_64-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=SSE264 %s -// SSE264: argument unused during compilation +// SSE264: invalid /arch: argument // RUN: %clang_cl -m32 -arch:AVX --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_AVX -- %s #if defined(TEST_32_ARCH_AVX) @@ -56,7 +57,7 @@ #endif // RUN: %clang_cl -m32 -arch:avx --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx %s -// avx: argument unused during compilation +// avx: invalid /arch: argument // RUN: %clang_cl -m32 -arch:AVX2 --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_AVX2 -- %s #if defined(TEST_32_ARCH_AVX2) @@ -66,7 +67,7 @@ #endif // RUN: %clang_cl -m32 -arch:avx2 --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx2 %s -// avx2: argument unused during compilation +// avx2: invalid /arch: argument // RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_AVX512F -- %s #if defined(TEST_32_ARCH_AVX512F) @@ -76,7 +77,7 @@ #endif // RUN: %clang_cl -m32 -arch:avx512f --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx512f %s -// avx512f: argument unused during compilation +// avx512f: invalid /arch: argument // RUN: %clang_cl -m32 -arch:AVX512 --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_32_ARCH_AVX512 -- %s #if defined(TEST_32_ARCH_AVX512) @@ -86,7 +87,7 @@ #endif // RUN: %clang_cl -m32 -arch:avx512 --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx512 %s -// avx512: argument unused during compilation +// avx512: invalid /arch: argument // RUN: %clang_cl -m64 -arch:AVX --target=x86_64-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_64_ARCH_AVX -- %s #if defined(TEST_64_ARCH_AVX) @@ -96,7 +97,7 @@ #endif // RUN: %clang_cl -m64 -arch:avx --target=x86_64-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx64 %s -// avx64: argument unused during compilation +// avx64: invalid /arch: argument // RUN: %clang_cl -m64 -arch:AVX2 --target=x86_64-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_64_ARCH_AVX2 -- %s #if defined(TEST_64_ARCH_AVX2) @@ -106,7 +107,7 @@ #endif // RUN: %clang_cl -m64 -arch:avx2 --target=x86_64-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx264 %s -// avx264: argument unused during compilation +// avx264: invalid /arch: argument // RUN: %clang_cl -m64 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_64_ARCH_AVX512F -- %s #if defined(TEST_64_ARCH_AVX512F) @@ -116,7 +117,7 @@ #endif // RUN: %clang_cl -m64 -arch:avx512f --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx512f64 %s -// avx512f64: argument unused during compilation +// avx512f64: invalid /arch: argument // RUN: %clang_cl -m64 -arch:AVX512 --target=i386-pc-windows /c /Fo%t.obj -Xclang -verify -DTEST_64_ARCH_AVX512 -- %s #if defined(TEST_64_ARCH_AVX512) @@ -126,7 +127,7 @@ #endif // RUN: %clang_cl -m64 -arch:avx512 --target=i386-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=avx51264 %s -// avx51264: argument unused during compilation +// avx51264: invalid /arch: argument // RUN: %clang_cl -m64 -arch:AVX -tune:haswell --target=x86_64-pc-windows -### -- 2>&1 %s | FileCheck -check-prefix=tune %s // tune: "-target-cpu" "sandybridge" diff --git a/clang/test/Driver/no-canonical-prefixes.c b/clang/test/Driver/no-canonical-prefixes.c index c222dd4aa6cc7..fb54f85f959ae 100644 --- a/clang/test/Driver/no-canonical-prefixes.c +++ b/clang/test/Driver/no-canonical-prefixes.c @@ -10,8 +10,20 @@ // RUN: rm -f %t.fake // RUN: ln -sf %t.real %t.fake // RUN: cd %t.fake -// RUN: ./test-clang -v -S %s 2>&1 | FileCheck --check-prefix=CANONICAL %s -// RUN: ./test-clang -v -S %s -no-canonical-prefixes 2>&1 | FileCheck --check-prefix=NON-CANONICAL %s +// RUN: ./test-clang -v -S %s 2>&1 \ +// RUN: | FileCheck --check-prefix=CANONICAL %s +// RUN: ./test-clang -v -S %s 2>&1 \ +// RUN: -no-canonical-prefixes \ +// RUN: | FileCheck --check-prefix=NON-CANONICAL %s +// RUN: ./test-clang -v -S %s 2>&1 \ +// RUN: -no-canonical-prefixes \ +// RUN: -canonical-prefixes \ +// RUN: | FileCheck --check-prefix=CANONICAL %s +// RUN: ./test-clang -v -S %s 2>&1 \ +// RUN: -no-canonical-prefixes \ +// RUN: -canonical-prefixes \ +// RUN: -no-canonical-prefixes \ +// RUN: | FileCheck --check-prefix=NON-CANONICAL %s // // FIXME: This should really be '.real'. // CANONICAL: InstalledDir: {{.*}}.fake diff --git a/clang/test/Driver/openmp-offload-gpu.c b/clang/test/Driver/openmp-offload-gpu.c index dafedfe70e069..d4e1757162771 100644 --- a/clang/test/Driver/openmp-offload-gpu.c +++ b/clang/test/Driver/openmp-offload-gpu.c @@ -169,6 +169,7 @@ // CHK-BCLIB: clang{{.*}}-triple{{.*}}nvptx64-nvidia-cuda{{.*}}-mlink-builtin-bitcode{{.*}}libomptarget-nvptx-sm_35.bc // CHK-BCLIB-NEW: clang{{.*}}-triple{{.*}}nvptx64-nvidia-cuda{{.*}}-mlink-builtin-bitcode{{.*}}libomptarget-new-nvptx-sm_35.bc // CHK-BCLIB-USER: clang{{.*}}-triple{{.*}}nvptx64-nvidia-cuda{{.*}}-mlink-builtin-bitcode{{.*}}libomptarget-nvptx-test.bc + // CHK-BCLIB-NOT: {{error:|warning:}} /// ########################################################################### diff --git a/clang/test/Headers/opencl-c-header.cl b/clang/test/Headers/opencl-c-header.cl index e7d0ae017d3a7..50b9ebba8f0d2 100644 --- a/clang/test/Headers/opencl-c-header.cl +++ b/clang/test/Headers/opencl-c-header.cl @@ -175,13 +175,13 @@ global atomic_int z = ATOMIC_VAR_INIT(99); #endif //(defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ >= 200) // OpenCL C features. -#if (__OPENCL_C_VERSION__ == 300) +#if (__OPENCL_CPP_VERSION__ == 202100 || __OPENCL_C_VERSION__ == 300) #if __opencl_c_atomic_scope_all_devices != 1 #error "Incorrectly defined feature macro __opencl_c_atomic_scope_all_devices" #endif -#elif (defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ == 200) +#elif (__OPENCL_CPP_VERSION__ == 100 || __OPENCL_C_VERSION__ == 200) #ifndef __opencl_c_pipes #error "Feature macro __opencl_c_pipes should be defined" @@ -262,6 +262,6 @@ global atomic_int z = ATOMIC_VAR_INIT(99); #error "Incorrect feature macro __opencl_c_subgroups define" #endif -#endif //(defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ == 200) +#endif // (__OPENCL_CPP_VERSION__ == 202100 || __OPENCL_C_VERSION__ == 300) #endif // defined(__SPIR__) diff --git a/clang/test/Index/print-type.cpp b/clang/test/Index/print-type.cpp index 49e2c5f4c0fcd..18259e80ebac2 100644 --- a/clang/test/Index/print-type.cpp +++ b/clang/test/Index/print-type.cpp @@ -132,7 +132,7 @@ inline namespace InlineNS {} // CHECK: TypedefDecl=OtherType:26:18 (Definition) [type=outer::inner::Bar::OtherType] [typekind=Typedef] [canonicaltype=double] [canonicaltypekind=Double] [isPOD=1] // CHECK: TypedefDecl=ArrayType:27:15 (Definition) [type=outer::inner::Bar::ArrayType] [typekind=Typedef] [canonicaltype=int [5]] [canonicaltypekind=ConstantArray] [isPOD=1] // CHECK: IntegerLiteral= [type=int] [typekind=Int] [isPOD=1] -// CHECK: FieldDecl=baz:28:20 (Definition) [type=Baz] [typekind=Unexposed] [templateargs/3= [type=int] [typekind=Int]] [canonicaltype=outer::Baz] [canonicaltypekind=Record] [canonicaltemplateargs/3= [type=int] [typekind=Int]] [isPOD=1] +// CHECK: FieldDecl=baz:28:20 (Definition) [type=Baz] [typekind=Unexposed] [templateargs/3= [type=int] [typekind=Int]] [canonicaltype=outer::Baz] [canonicaltypekind=Record] [canonicaltemplateargs/3= [type=int] [typekind=Int]] [isPOD=1] // CHECK: TemplateRef=Baz:9:8 [type=] [typekind=Invalid] [isPOD=0] // CHECK: IntegerLiteral= [type=int] [typekind=Int] [isPOD=1] // CHECK: TemplateRef=Foo:4:8 [type=] [typekind=Invalid] [isPOD=0] diff --git a/clang/test/Misc/diag-template.cpp b/clang/test/Misc/diag-template.cpp index e207344c2e9fd..5299375f65650 100644 --- a/clang/test/Misc/diag-template.cpp +++ b/clang/test/Misc/diag-template.cpp @@ -34,8 +34,8 @@ namespace default_args { f(Q<>()).g(); // expected-error {{no member named 'g' in 'default_args::Q<>'}} f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q<>'}} f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q<>'}} - f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q'}} - f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q'}} - f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q'}} + f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q'}} + f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q'}} + f(Q()).g(); // expected-error {{no member named 'g' in 'default_args::Q'}} } } diff --git a/clang/test/Preprocessor/init-aarch64.c b/clang/test/Preprocessor/init-aarch64.c index b38319c9b2ff5..3b6f4ddaabde8 100644 --- a/clang/test/Preprocessor/init-aarch64.c +++ b/clang/test/Preprocessor/init-aarch64.c @@ -91,6 +91,7 @@ // AARCH64-NEXT: #define __FLT_DENORM_MIN__ 1.40129846e-45F // AARCH64-NEXT: #define __FLT_DIG__ 6 // AARCH64-NEXT: #define __FLT_EPSILON__ 1.19209290e-7F +// AARCH64-NEXT: #define __FLT_EVAL_METHOD__ 0 // AARCH64-NEXT: #define __FLT_HAS_DENORM__ 1 // AARCH64-NEXT: #define __FLT_HAS_INFINITY__ 1 // AARCH64-NEXT: #define __FLT_HAS_QUIET_NAN__ 1 @@ -372,6 +373,7 @@ // AARCH64-DARWIN: #define __FLT_DENORM_MIN__ 1.40129846e-45F // AARCH64-DARWIN: #define __FLT_DIG__ 6 // AARCH64-DARWIN: #define __FLT_EPSILON__ 1.19209290e-7F +// AARCH64-DARWIN: #define __FLT_EVAL_METHOD__ 0 // AARCH64-DARWIN: #define __FLT_HAS_DENORM__ 1 // AARCH64-DARWIN: #define __FLT_HAS_INFINITY__ 1 // AARCH64-DARWIN: #define __FLT_HAS_QUIET_NAN__ 1 @@ -587,6 +589,7 @@ // AARCH64-MSVC: #define __FLT_DENORM_MIN__ 1.40129846e-45F // AARCH64-MSVC: #define __FLT_DIG__ 6 // AARCH64-MSVC: #define __FLT_EPSILON__ 1.19209290e-7F +// AARCH64-MSVC: #define __FLT_EVAL_METHOD__ 0 // AARCH64-MSVC: #define __FLT_HAS_DENORM__ 1 // AARCH64-MSVC: #define __FLT_HAS_INFINITY__ 1 // AARCH64-MSVC: #define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-arm.c b/clang/test/Preprocessor/init-arm.c index 2d1503c18560e..32eb2c513f8b0 100644 --- a/clang/test/Preprocessor/init-arm.c +++ b/clang/test/Preprocessor/init-arm.c @@ -35,6 +35,7 @@ // ARM:#define __FLT_DENORM_MIN__ 1.40129846e-45F // ARM:#define __FLT_DIG__ 6 // ARM:#define __FLT_EPSILON__ 1.19209290e-7F +// ARM:#define __FLT_EVAL_METHOD__ 0 // ARM:#define __FLT_HAS_DENORM__ 1 // ARM:#define __FLT_HAS_INFINITY__ 1 // ARM:#define __FLT_HAS_QUIET_NAN__ 1 @@ -234,6 +235,7 @@ // ARM-BE:#define __FLT_DENORM_MIN__ 1.40129846e-45F // ARM-BE:#define __FLT_DIG__ 6 // ARM-BE:#define __FLT_EPSILON__ 1.19209290e-7F +// ARM-BE:#define __FLT_EVAL_METHOD__ 0 // ARM-BE:#define __FLT_HAS_DENORM__ 1 // ARM-BE:#define __FLT_HAS_INFINITY__ 1 // ARM-BE:#define __FLT_HAS_QUIET_NAN__ 1 @@ -426,6 +428,7 @@ // ARMEABISOFTFP:#define __FLT_DENORM_MIN__ 1.40129846e-45F // ARMEABISOFTFP:#define __FLT_DIG__ 6 // ARMEABISOFTFP:#define __FLT_EPSILON__ 1.19209290e-7F +// ARMEABISOFTFP:#define __FLT_EVAL_METHOD__ 0 // ARMEABISOFTFP:#define __FLT_HAS_DENORM__ 1 // ARMEABISOFTFP:#define __FLT_HAS_INFINITY__ 1 // ARMEABISOFTFP:#define __FLT_HAS_QUIET_NAN__ 1 @@ -620,6 +623,7 @@ // ARMEABIHARDFP:#define __FLT_DENORM_MIN__ 1.40129846e-45F // ARMEABIHARDFP:#define __FLT_DIG__ 6 // ARMEABIHARDFP:#define __FLT_EPSILON__ 1.19209290e-7F +// ARMEABIHARDFP:#define __FLT_EVAL_METHOD__ 0 // ARMEABIHARDFP:#define __FLT_HAS_DENORM__ 1 // ARMEABIHARDFP:#define __FLT_HAS_INFINITY__ 1 // ARMEABIHARDFP:#define __FLT_HAS_QUIET_NAN__ 1 @@ -817,6 +821,7 @@ // ARM-NETBSD:#define __FLT_DENORM_MIN__ 1.40129846e-45F // ARM-NETBSD:#define __FLT_DIG__ 6 // ARM-NETBSD:#define __FLT_EPSILON__ 1.19209290e-7F +// ARM-NETBSD:#define __FLT_EVAL_METHOD__ 0 // ARM-NETBSD:#define __FLT_HAS_DENORM__ 1 // ARM-NETBSD:#define __FLT_HAS_INFINITY__ 1 // ARM-NETBSD:#define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-mips.c b/clang/test/Preprocessor/init-mips.c index a07cee64e6848..d76396aa35c91 100644 --- a/clang/test/Preprocessor/init-mips.c +++ b/clang/test/Preprocessor/init-mips.c @@ -37,6 +37,7 @@ // MIPS32BE:#define __FLT_DENORM_MIN__ 1.40129846e-45F // MIPS32BE:#define __FLT_DIG__ 6 // MIPS32BE:#define __FLT_EPSILON__ 1.19209290e-7F +// MIPS32BE:#define __FLT_EVAL_METHOD__ 0 // MIPS32BE:#define __FLT_HAS_DENORM__ 1 // MIPS32BE:#define __FLT_HAS_INFINITY__ 1 // MIPS32BE:#define __FLT_HAS_QUIET_NAN__ 1 @@ -246,6 +247,7 @@ // MIPS32EL:#define __FLT_DENORM_MIN__ 1.40129846e-45F // MIPS32EL:#define __FLT_DIG__ 6 // MIPS32EL:#define __FLT_EPSILON__ 1.19209290e-7F +// MIPS32EL:#define __FLT_EVAL_METHOD__ 0 // MIPS32EL:#define __FLT_HAS_DENORM__ 1 // MIPS32EL:#define __FLT_HAS_INFINITY__ 1 // MIPS32EL:#define __FLT_HAS_QUIET_NAN__ 1 @@ -465,6 +467,7 @@ // MIPSN32BE: #define __FLT_DENORM_MIN__ 1.40129846e-45F // MIPSN32BE: #define __FLT_DIG__ 6 // MIPSN32BE: #define __FLT_EPSILON__ 1.19209290e-7F +// MIPSN32BE: #define __FLT_EVAL_METHOD__ 0 // MIPSN32BE: #define __FLT_HAS_DENORM__ 1 // MIPSN32BE: #define __FLT_HAS_INFINITY__ 1 // MIPSN32BE: #define __FLT_HAS_QUIET_NAN__ 1 @@ -771,6 +774,7 @@ // MIPSN32EL: #define __FLT_DENORM_MIN__ 1.40129846e-45F // MIPSN32EL: #define __FLT_DIG__ 6 // MIPSN32EL: #define __FLT_EPSILON__ 1.19209290e-7F +// MIPSN32EL: #define __FLT_EVAL_METHOD__ 0 // MIPSN32EL: #define __FLT_HAS_DENORM__ 1 // MIPSN32EL: #define __FLT_HAS_INFINITY__ 1 // MIPSN32EL: #define __FLT_HAS_QUIET_NAN__ 1 @@ -1070,6 +1074,7 @@ // MIPS64BE:#define __FLT_DENORM_MIN__ 1.40129846e-45F // MIPS64BE:#define __FLT_DIG__ 6 // MIPS64BE:#define __FLT_EPSILON__ 1.19209290e-7F +// MIPS64BE:#define __FLT_EVAL_METHOD__ 0 // MIPS64BE:#define __FLT_HAS_DENORM__ 1 // MIPS64BE:#define __FLT_HAS_INFINITY__ 1 // MIPS64BE:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1279,6 +1284,7 @@ // MIPS64EL:#define __FLT_DENORM_MIN__ 1.40129846e-45F // MIPS64EL:#define __FLT_DIG__ 6 // MIPS64EL:#define __FLT_EPSILON__ 1.19209290e-7F +// MIPS64EL:#define __FLT_EVAL_METHOD__ 0 // MIPS64EL:#define __FLT_HAS_DENORM__ 1 // MIPS64EL:#define __FLT_HAS_INFINITY__ 1 // MIPS64EL:#define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-ppc.c b/clang/test/Preprocessor/init-ppc.c index ca61143e8dc9a..611b16dfb8f7e 100644 --- a/clang/test/Preprocessor/init-ppc.c +++ b/clang/test/Preprocessor/init-ppc.c @@ -30,6 +30,7 @@ // PPC603E:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC603E:#define __FLT_DIG__ 6 // PPC603E:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC603E:#define __FLT_EVAL_METHOD__ 0 // PPC603E:#define __FLT_HAS_DENORM__ 1 // PPC603E:#define __FLT_HAS_INFINITY__ 1 // PPC603E:#define __FLT_HAS_QUIET_NAN__ 1 @@ -223,6 +224,7 @@ // PPC:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC:#define __FLT_DIG__ 6 // PPC:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC:#define __FLT_EVAL_METHOD__ 0 // PPC:#define __FLT_HAS_DENORM__ 1 // PPC:#define __FLT_HAS_INFINITY__ 1 // PPC:#define __FLT_HAS_QUIET_NAN__ 1 @@ -320,6 +322,7 @@ // PPC:#define __NATURAL_ALIGNMENT__ 1 // PPC:#define __POINTER_WIDTH__ 32 // PPC:#define __POWERPC__ 1 +// PPC-NOT:#define __PPC 1 // PPC:#define __PPC__ 1 // PPC:#define __PTRDIFF_TYPE__ long int // PPC:#define __PTRDIFF_WIDTH__ 32 @@ -384,6 +387,7 @@ // PPC:#define __WCHAR_WIDTH__ 32 // PPC:#define __WINT_TYPE__ int // PPC:#define __WINT_WIDTH__ 32 +// PPC-NOT:#define __powerpc 1 // PPC:#define __ppc__ 1 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.1.0.0 -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX %s @@ -421,6 +425,7 @@ // PPC-AIX:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC-AIX:#define __FLT_DIG__ 6 // PPC-AIX:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC-AIX:#define __FLT_EVAL_METHOD__ 1 // PPC-AIX:#define __FLT_HAS_DENORM__ 1 // PPC-AIX:#define __FLT_HAS_INFINITY__ 1 // PPC-AIX:#define __FLT_HAS_QUIET_NAN__ 1 @@ -517,6 +522,7 @@ // PPC-AIX-NOT:#define __NATURAL_ALIGNMENT__ 1 // PPC-AIX:#define __POINTER_WIDTH__ 32 // PPC-AIX:#define __POWERPC__ 1 +// PPC-AIX:#define __PPC 1 // PPC-AIX:#define __PPC__ 1 // PPC-AIX:#define __PTRDIFF_TYPE__ long int // PPC-AIX:#define __PTRDIFF_WIDTH__ 32 @@ -584,6 +590,7 @@ // PPC-AIX:#define __WCHAR_WIDTH__ 16 // PPC-AIX:#define __WINT_TYPE__ int // PPC-AIX:#define __WINT_WIDTH__ 32 +// PPC-AIX:#define __powerpc 1 // PPC-AIX:#define __powerpc__ 1 // PPC-AIX:#define __ppc__ 1 @@ -791,6 +798,7 @@ // PPC-LINUX:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC-LINUX:#define __FLT_DIG__ 6 // PPC-LINUX:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC-LINUX:#define __FLT_EVAL_METHOD__ 0 // PPC-LINUX:#define __FLT_HAS_DENORM__ 1 // PPC-LINUX:#define __FLT_HAS_INFINITY__ 1 // PPC-LINUX:#define __FLT_HAS_QUIET_NAN__ 1 @@ -998,6 +1006,7 @@ // PPC-DARWIN:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC-DARWIN:#define __FLT_DIG__ 6 // PPC-DARWIN:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC-DARWIN:#define __FLT_EVAL_METHOD__ 0 // PPC-DARWIN:#define __FLT_HAS_DENORM__ 1 // PPC-DARWIN:#define __FLT_HAS_INFINITY__ 1 // PPC-DARWIN:#define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-ppc64.c b/clang/test/Preprocessor/init-ppc64.c index fbb3fd7400086..ca9029d6cab51 100644 --- a/clang/test/Preprocessor/init-ppc64.c +++ b/clang/test/Preprocessor/init-ppc64.c @@ -35,6 +35,7 @@ // PPC64:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC64:#define __FLT_DIG__ 6 // PPC64:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC64:#define __FLT_EVAL_METHOD__ 0 // PPC64:#define __FLT_HAS_DENORM__ 1 // PPC64:#define __FLT_HAS_INFINITY__ 1 // PPC64:#define __FLT_HAS_QUIET_NAN__ 1 @@ -239,6 +240,7 @@ // PPC64LE:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC64LE:#define __FLT_DIG__ 6 // PPC64LE:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC64LE:#define __FLT_EVAL_METHOD__ 0 // PPC64LE:#define __FLT_HAS_DENORM__ 1 // PPC64LE:#define __FLT_HAS_INFINITY__ 1 // PPC64LE:#define __FLT_HAS_QUIET_NAN__ 1 @@ -701,6 +703,7 @@ // PPC64-AIX:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC64-AIX:#define __FLT_DIG__ 6 // PPC64-AIX:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC64-AIX:#define __FLT_EVAL_METHOD__ 1 // PPC64-AIX:#define __FLT_HAS_DENORM__ 1 // PPC64-AIX:#define __FLT_HAS_INFINITY__ 1 // PPC64-AIX:#define __FLT_HAS_QUIET_NAN__ 1 @@ -898,6 +901,7 @@ // PPC64-LINUX:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PPC64-LINUX:#define __FLT_DIG__ 6 // PPC64-LINUX:#define __FLT_EPSILON__ 1.19209290e-7F +// PPC64-LINUX:#define __FLT_EVAL_METHOD__ 0 // PPC64-LINUX:#define __FLT_HAS_DENORM__ 1 // PPC64-LINUX:#define __FLT_HAS_INFINITY__ 1 // PPC64-LINUX:#define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-s390x.c b/clang/test/Preprocessor/init-s390x.c index 6c646527f50f7..b0e45b5348ce9 100644 --- a/clang/test/Preprocessor/init-s390x.c +++ b/clang/test/Preprocessor/init-s390x.c @@ -23,6 +23,7 @@ // S390X:#define __FLT_DENORM_MIN__ 1.40129846e-45F // S390X:#define __FLT_DIG__ 6 // S390X:#define __FLT_EPSILON__ 1.19209290e-7F +// S390X:#define __FLT_EVAL_METHOD__ 0 // S390X:#define __FLT_HAS_DENORM__ 1 // S390X:#define __FLT_HAS_INFINITY__ 1 // S390X:#define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-v7k-compat.c b/clang/test/Preprocessor/init-v7k-compat.c index ff5d4bbdea53a..482c7ad6ff687 100644 --- a/clang/test/Preprocessor/init-v7k-compat.c +++ b/clang/test/Preprocessor/init-v7k-compat.c @@ -28,6 +28,7 @@ // CHECK: #define __FLT_DENORM_MIN__ 1.40129846e-45F // CHECK: #define __FLT_DIG__ 6 // CHECK: #define __FLT_EPSILON__ 1.19209290e-7F +// CHECK: #define __FLT_EVAL_METHOD__ 0 // CHECK: #define __FLT_HAS_DENORM__ 1 // CHECK: #define __FLT_HAS_INFINITY__ 1 // CHECK: #define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init-x86.c b/clang/test/Preprocessor/init-x86.c index 287de8d90937c..527cd39508889 100644 --- a/clang/test/Preprocessor/init-x86.c +++ b/clang/test/Preprocessor/init-x86.c @@ -24,6 +24,7 @@ // I386:#define __FLT_DENORM_MIN__ 1.40129846e-45F // I386:#define __FLT_DIG__ 6 // I386:#define __FLT_EPSILON__ 1.19209290e-7F +// I386:#define __FLT_EVAL_METHOD__ 2 // I386:#define __FLT_HAS_DENORM__ 1 // I386:#define __FLT_HAS_INFINITY__ 1 // I386:#define __FLT_HAS_QUIET_NAN__ 1 @@ -212,6 +213,7 @@ // I386-LINUX:#define __FLT_DENORM_MIN__ 1.40129846e-45F // I386-LINUX:#define __FLT_DIG__ 6 // I386-LINUX:#define __FLT_EPSILON__ 1.19209290e-7F +// I386-LINUX:#define __FLT_EVAL_METHOD__ 0 // I386-LINUX:#define __FLT_HAS_DENORM__ 1 // I386-LINUX:#define __FLT_HAS_INFINITY__ 1 // I386-LINUX:#define __FLT_HAS_QUIET_NAN__ 1 @@ -414,6 +416,7 @@ // I386-NETBSD:#define __FLT_DENORM_MIN__ 1.40129846e-45F // I386-NETBSD:#define __FLT_DIG__ 6 // I386-NETBSD:#define __FLT_EPSILON__ 1.19209290e-7F +// I386-NETBSD:#define __FLT_EVAL_METHOD__ 2 // I386-NETBSD:#define __FLT_HAS_DENORM__ 1 // I386-NETBSD:#define __FLT_HAS_INFINITY__ 1 // I386-NETBSD:#define __FLT_HAS_QUIET_NAN__ 1 @@ -587,6 +590,12 @@ // I386-NETBSD:#define __i386__ 1 // I386-NETBSD:#define i386 1 +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=i386-netbsd -target-feature +sse2 < /dev/null | FileCheck -match-full-lines -check-prefix I386-NETBSD-SSE %s +// I386-NETBSD-SSE:#define __FLT_EVAL_METHOD__ 0 +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=i386-netbsd6 < /dev/null | FileCheck -match-full-lines -check-prefix I386-NETBSD6 %s +// I386-NETBSD6:#define __FLT_EVAL_METHOD__ 1 +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=i386-netbsd6 -target-feature +sse2 < /dev/null | FileCheck -match-full-lines -check-prefix I386-NETBSD6-SSE %s +// I386-NETBSD6-SSE:#define __FLT_EVAL_METHOD__ 1 // RUN: %clang_cc1 -E -dM -triple=i686-pc-mingw32 < /dev/null | FileCheck -match-full-lines -check-prefix I386-DECLSPEC %s // RUN: %clang_cc1 -E -dM -fms-extensions -triple=i686-pc-mingw32 < /dev/null | FileCheck -match-full-lines -check-prefix I386-DECLSPEC %s @@ -622,6 +631,7 @@ // X86_64:#define __FLT_DENORM_MIN__ 1.40129846e-45F // X86_64:#define __FLT_DIG__ 6 // X86_64:#define __FLT_EPSILON__ 1.19209290e-7F +// X86_64:#define __FLT_EVAL_METHOD__ 0 // X86_64:#define __FLT_HAS_DENORM__ 1 // X86_64:#define __FLT_HAS_INFINITY__ 1 // X86_64:#define __FLT_HAS_QUIET_NAN__ 1 @@ -829,6 +839,7 @@ // X32:#define __FLT_DENORM_MIN__ 1.40129846e-45F // X32:#define __FLT_DIG__ 6 // X32:#define __FLT_EPSILON__ 1.19209290e-7F +// X32:#define __FLT_EVAL_METHOD__ 0 // X32:#define __FLT_HAS_DENORM__ 1 // X32:#define __FLT_HAS_INFINITY__ 1 // X32:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1035,6 +1046,7 @@ // X86_64-CLOUDABI:#define __FLT_DENORM_MIN__ 1.40129846e-45F // X86_64-CLOUDABI:#define __FLT_DIG__ 6 // X86_64-CLOUDABI:#define __FLT_EPSILON__ 1.19209290e-7F +// X86_64-CLOUDABI:#define __FLT_EVAL_METHOD__ 0 // X86_64-CLOUDABI:#define __FLT_HAS_DENORM__ 1 // X86_64-CLOUDABI:#define __FLT_HAS_INFINITY__ 1 // X86_64-CLOUDABI:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1329,6 +1341,7 @@ // X86_64-LINUX:#define __FLT_DENORM_MIN__ 1.40129846e-45F // X86_64-LINUX:#define __FLT_DIG__ 6 // X86_64-LINUX:#define __FLT_EPSILON__ 1.19209290e-7F +// X86_64-LINUX:#define __FLT_EVAL_METHOD__ 0 // X86_64-LINUX:#define __FLT_HAS_DENORM__ 1 // X86_64-LINUX:#define __FLT_HAS_INFINITY__ 1 // X86_64-LINUX:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1541,6 +1554,7 @@ // X86_64-NETBSD:#define __FLT_DENORM_MIN__ 1.40129846e-45F // X86_64-NETBSD:#define __FLT_DIG__ 6 // X86_64-NETBSD:#define __FLT_EPSILON__ 1.19209290e-7F +// X86_64-NETBSD:#define __FLT_EVAL_METHOD__ 0 // X86_64-NETBSD:#define __FLT_HAS_DENORM__ 1 // X86_64-NETBSD:#define __FLT_HAS_INFINITY__ 1 // X86_64-NETBSD:#define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/Preprocessor/init.c b/clang/test/Preprocessor/init.c index c14ef173390a9..4e46405dce6a5 100644 --- a/clang/test/Preprocessor/init.c +++ b/clang/test/Preprocessor/init.c @@ -323,6 +323,7 @@ // MSP430:#define __FLT_DENORM_MIN__ 1.40129846e-45F // MSP430:#define __FLT_DIG__ 6 // MSP430:#define __FLT_EPSILON__ 1.19209290e-7F +// MSP430:#define __FLT_EVAL_METHOD__ 0 // MSP430:#define __FLT_HAS_DENORM__ 1 // MSP430:#define __FLT_HAS_INFINITY__ 1 // MSP430:#define __FLT_HAS_QUIET_NAN__ 1 @@ -510,6 +511,7 @@ // NVPTX32:#define __FLT_DENORM_MIN__ 1.40129846e-45F // NVPTX32:#define __FLT_DIG__ 6 // NVPTX32:#define __FLT_EPSILON__ 1.19209290e-7F +// NVPTX32:#define __FLT_EVAL_METHOD__ 0 // NVPTX32:#define __FLT_HAS_DENORM__ 1 // NVPTX32:#define __FLT_HAS_INFINITY__ 1 // NVPTX32:#define __FLT_HAS_QUIET_NAN__ 1 @@ -698,6 +700,7 @@ // NVPTX64:#define __FLT_DENORM_MIN__ 1.40129846e-45F // NVPTX64:#define __FLT_DIG__ 6 // NVPTX64:#define __FLT_EPSILON__ 1.19209290e-7F +// NVPTX64:#define __FLT_EVAL_METHOD__ 0 // NVPTX64:#define __FLT_HAS_DENORM__ 1 // NVPTX64:#define __FLT_HAS_INFINITY__ 1 // NVPTX64:#define __FLT_HAS_QUIET_NAN__ 1 @@ -901,6 +904,7 @@ // SPARC:#define __FLT_DENORM_MIN__ 1.40129846e-45F // SPARC:#define __FLT_DIG__ 6 // SPARC:#define __FLT_EPSILON__ 1.19209290e-7F +// SPARC:#define __FLT_EVAL_METHOD__ 0 // SPARC:#define __FLT_HAS_DENORM__ 1 // SPARC:#define __FLT_HAS_INFINITY__ 1 // SPARC:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1101,6 +1105,7 @@ // TCE:#define __FLT_DENORM_MIN__ 1.40129846e-45F // TCE:#define __FLT_DIG__ 6 // TCE:#define __FLT_EPSILON__ 1.19209290e-7F +// TCE:#define __FLT_EVAL_METHOD__ 0 // TCE:#define __FLT_HAS_DENORM__ 1 // TCE:#define __FLT_HAS_INFINITY__ 1 // TCE:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1267,6 +1272,7 @@ // PS4:#define __FLT_DENORM_MIN__ 1.40129846e-45F // PS4:#define __FLT_DIG__ 6 // PS4:#define __FLT_EPSILON__ 1.19209290e-7F +// PS4:#define __FLT_EVAL_METHOD__ 0 // PS4:#define __FLT_HAS_DENORM__ 1 // PS4:#define __FLT_HAS_INFINITY__ 1 // PS4:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1558,6 +1564,7 @@ // WEBASSEMBLY-NEXT:#define __FLT_DENORM_MIN__ 1.40129846e-45F // WEBASSEMBLY-NEXT:#define __FLT_DIG__ 6 // WEBASSEMBLY-NEXT:#define __FLT_EPSILON__ 1.19209290e-7F +// WEBASSEMBLY-NEXT:#define __FLT_EVAL_METHOD__ 0 // WEBASSEMBLY-NEXT:#define __FLT_HAS_DENORM__ 1 // WEBASSEMBLY-NEXT:#define __FLT_HAS_INFINITY__ 1 // WEBASSEMBLY-NEXT:#define __FLT_HAS_QUIET_NAN__ 1 @@ -1913,6 +1920,7 @@ // AVR:#define __FLT_DENORM_MIN__ 1.40129846e-45F // AVR:#define __FLT_DIG__ 6 // AVR:#define __FLT_EPSILON__ 1.19209290e-7F +// AVR:#define __FLT_EVAL_METHOD__ 0 // AVR:#define __FLT_HAS_DENORM__ 1 // AVR:#define __FLT_HAS_INFINITY__ 1 // AVR:#define __FLT_HAS_QUIET_NAN__ 1 @@ -2195,6 +2203,7 @@ // RISCV32: #define __FLT_DENORM_MIN__ 1.40129846e-45F // RISCV32: #define __FLT_DIG__ 6 // RISCV32: #define __FLT_EPSILON__ 1.19209290e-7F +// RISCV32: #define __FLT_EVAL_METHOD__ 0 // RISCV32: #define __FLT_HAS_DENORM__ 1 // RISCV32: #define __FLT_HAS_INFINITY__ 1 // RISCV32: #define __FLT_HAS_QUIET_NAN__ 1 @@ -2402,6 +2411,7 @@ // RISCV64: #define __FLT_DENORM_MIN__ 1.40129846e-45F // RISCV64: #define __FLT_DIG__ 6 // RISCV64: #define __FLT_EPSILON__ 1.19209290e-7F +// RISCV64: #define __FLT_EVAL_METHOD__ 0 // RISCV64: #define __FLT_HAS_DENORM__ 1 // RISCV64: #define __FLT_HAS_INFINITY__ 1 // RISCV64: #define __FLT_HAS_QUIET_NAN__ 1 diff --git a/clang/test/SemaOpenCL/features.cl b/clang/test/SemaOpenCL/features.cl index 57c52694b6850..af058b5e69828 100644 --- a/clang/test/SemaOpenCL/features.cl +++ b/clang/test/SemaOpenCL/features.cl @@ -6,6 +6,14 @@ // RUN: | FileCheck -match-full-lines %s --check-prefix=NO-FEATURES // RUN: %clang_cc1 -triple r600-unknown-unknown %s -E -dM -o - -x cl -cl-std=CL3.0 -cl-ext=+all \ // RUN: | FileCheck -match-full-lines %s --check-prefix=FEATURES +// RUN: %clang_cc1 -triple spir-unknown-unknown %s -E -dM -o - -x cl -cl-std=clc++2021 -cl-ext=-all \ +// RUN: | FileCheck -match-full-lines %s --check-prefix=NO-FEATURES +// RUN: %clang_cc1 -triple spir-unknown-unknown %s -E -dM -o - -x cl -cl-std=clc++2021 -cl-ext=+all \ +// RUN: | FileCheck -match-full-lines %s --check-prefix=FEATURES +// RUN: %clang_cc1 -triple r600-unknown-unknown %s -E -dM -o - -x cl -cl-std=clc++2021 \ +// RUN: | FileCheck -match-full-lines %s --check-prefix=NO-FEATURES +// RUN: %clang_cc1 -triple r600-unknown-unknown %s -E -dM -o - -x cl -cl-std=clc++2021 -cl-ext=+all \ +// RUN: | FileCheck -match-full-lines %s --check-prefix=FEATURES // For OpenCL C 2.0 feature macros are defined only in header, so test that earlier OpenCL // versions don't define feature macros accidentally and CL2.0 don't define them without header @@ -15,7 +23,7 @@ // RUN: | FileCheck -match-full-lines %s --check-prefix=NO-FEATURES // RUN: %clang_cc1 -triple spir-unknown-unknown %s -E -dM -o - -x cl -cl-std=CL2.0 \ // RUN: | FileCheck -match-full-lines %s --check-prefix=NO-FEATURES -// RUN: %clang_cc1 -triple spir-unknown-unknown %s -E -dM -o - -x cl -cl-std=CLC++ \ +// RUN: %clang_cc1 -triple spir-unknown-unknown %s -E -dM -o - -x cl -cl-std=clc++1.0 \ // RUN: | FileCheck -match-full-lines %s --check-prefix=NO-FEATURES // Note that __opencl_c_int64 is always defined assuming diff --git a/clang/test/SemaTemplate/temp_arg_template.cpp b/clang/test/SemaTemplate/temp_arg_template.cpp index 59deae701801e..37e1e52521263 100644 --- a/clang/test/SemaTemplate/temp_arg_template.cpp +++ b/clang/test/SemaTemplate/temp_arg_template.cpp @@ -59,7 +59,7 @@ namespace N { 0 << a.const_ref(); // expected-error{{invalid operands to binary expression ('int' and 'X')}} } - void f0( Y y){ 1 << y; } // expected-note{{in instantiation of function template specialization 'N::operator<<' requested here}} + void f0( Y y){ 1 << y; } // expected-note{{in instantiation of function template specialization 'N::operator<<' requested here}} } // PR12179 diff --git a/clang/tools/CMakeLists.txt b/clang/tools/CMakeLists.txt index fb8c77c3e144d..192ded4fd77cd 100644 --- a/clang/tools/CMakeLists.txt +++ b/clang/tools/CMakeLists.txt @@ -8,6 +8,7 @@ add_clang_subdirectory(clang-format) add_clang_subdirectory(clang-format-vs) add_clang_subdirectory(clang-fuzzer) add_clang_subdirectory(clang-import-test) +add_clang_subdirectory(clang-nvlink-wrapper) add_clang_subdirectory(clang-offload-bundler) add_clang_subdirectory(clang-offload-deps) add_clang_subdirectory(clang-offload-wrapper) diff --git a/clang/tools/clang-nvlink-wrapper/CMakeLists.txt b/clang/tools/clang-nvlink-wrapper/CMakeLists.txt new file mode 100644 index 0000000000000..033392f1c2bdc --- /dev/null +++ b/clang/tools/clang-nvlink-wrapper/CMakeLists.txt @@ -0,0 +1,25 @@ +set(LLVM_LINK_COMPONENTS BitWriter Core Object Support) + +if(NOT CLANG_BUILT_STANDALONE) + set(tablegen_deps intrinsics_gen) +endif() + +add_clang_executable(clang-nvlink-wrapper + ClangNvlinkWrapper.cpp + + DEPENDS + ${tablegen_deps} + ) + +set(CLANG_NVLINK_WRAPPER_LIB_DEPS + clangBasic + ) + +add_dependencies(clang clang-nvlink-wrapper) + +target_link_libraries(clang-nvlink-wrapper + PRIVATE + ${CLANG_NVLINK_WRAPPER_LIB_DEPS} + ) + +install(TARGETS clang-nvlink-wrapper RUNTIME DESTINATION bin) diff --git a/clang/tools/clang-nvlink-wrapper/ClangNvlinkWrapper.cpp b/clang/tools/clang-nvlink-wrapper/ClangNvlinkWrapper.cpp new file mode 100644 index 0000000000000..00c371e35e75c --- /dev/null +++ b/clang/tools/clang-nvlink-wrapper/ClangNvlinkWrapper.cpp @@ -0,0 +1,164 @@ +//===-- clang-nvlink-wrapper/ClangNvlinkWrapper.cpp - wrapper over nvlink-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===---------------------------------------------------------------------===// +/// +/// \file +/// This tool works as a wrapper over nvlink program. It transparently passes +/// every input option and objects to nvlink except archive files. It reads +/// each input archive file to extract archived cubin files as temporary files. +/// These temp (*.cubin) files are passed to nvlink, because nvlink does not +/// support linking of archive files implicitly. +/// +/// During linking of heteregenous device archive libraries, the +/// clang-offload-bundler creates a device specific archive of cubin files. +/// Such an archive is then passed to this tool to extract cubin files before +/// passing to nvlink. +/// +/// Example: +/// clang-nvlink-wrapper -o a.out-openmp-nvptx64 /tmp/libTest-nvptx-sm_50.a +/// +/// 1. Extract (libTest-nvptx-sm_50.a) => /tmp/a.cubin /tmp/b.cubin +/// 2. nvlink -o a.out-openmp-nvptx64 /tmp/a.cubin /tmp/b.cubin +//===---------------------------------------------------------------------===// + +#include "llvm/Object/Archive.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Errc.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/Path.h" +#include "llvm/Support/Program.h" +#include "llvm/Support/Signals.h" +#include "llvm/Support/StringSaver.h" +#include "llvm/Support/WithColor.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm; + +static cl::opt Help("h", cl::desc("Alias for -help"), cl::Hidden); + +static Error runNVLink(std::string NVLinkPath, + SmallVectorImpl &Args) { + std::vector NVLArgs; + NVLArgs.push_back(NVLinkPath); + for (auto &Arg : Args) { + NVLArgs.push_back(Arg); + } + + if (sys::ExecuteAndWait(NVLinkPath.c_str(), NVLArgs)) + return createStringError(inconvertibleErrorCode(), "'nvlink' failed"); + return Error::success(); +} + +static Error extractArchiveFiles(StringRef Filename, + SmallVectorImpl &Args, + SmallVectorImpl &TmpFiles) { + std::vector> ArchiveBuffers; + + ErrorOr> BufOrErr = + MemoryBuffer::getFileOrSTDIN(Filename, -1, false); + if (std::error_code EC = BufOrErr.getError()) + return createFileError(Filename, EC); + + ArchiveBuffers.push_back(std::move(*BufOrErr)); + Expected> LibOrErr = + object::Archive::create(ArchiveBuffers.back()->getMemBufferRef()); + if (!LibOrErr) + return LibOrErr.takeError(); + + auto Archive = std::move(*LibOrErr); + + Error Err = Error::success(); + auto ChildEnd = Archive->child_end(); + for (auto ChildIter = Archive->child_begin(Err); ChildIter != ChildEnd; + ++ChildIter) { + if (Err) + return Err; + auto ChildNameOrErr = (*ChildIter).getName(); + if (!ChildNameOrErr) + return ChildNameOrErr.takeError(); + + StringRef ChildName = sys::path::filename(ChildNameOrErr.get()); + + auto ChildBufferRefOrErr = (*ChildIter).getMemoryBufferRef(); + if (!ChildBufferRefOrErr) + return ChildBufferRefOrErr.takeError(); + + auto ChildBuffer = + MemoryBuffer::getMemBuffer(ChildBufferRefOrErr.get(), false); + auto ChildNameSplit = ChildName.split('.'); + + SmallString<16> Path; + int FileDesc; + if (std::error_code EC = sys::fs::createTemporaryFile( + (ChildNameSplit.first), (ChildNameSplit.second), FileDesc, Path)) + return createFileError(ChildName, EC); + + std::string TmpFileName(Path.str()); + Args.push_back(TmpFileName); + TmpFiles.push_back(TmpFileName); + std::error_code EC; + raw_fd_ostream OS(Path.c_str(), EC, sys::fs::OF_None); + if (EC) + return createFileError(TmpFileName, errc::io_error); + OS << ChildBuffer->getBuffer(); + OS.close(); + } + return Err; +} + +static Error cleanupTmpFiles(SmallVectorImpl &TmpFiles) { + for (auto &TmpFile : TmpFiles) { + if (std::error_code EC = sys::fs::remove(TmpFile)) + return createFileError(TmpFile, errc::no_such_file_or_directory); + } + return Error::success(); +} + +int main(int argc, const char **argv) { + sys::PrintStackTraceOnErrorSignal(argv[0]); + + if (Help) { + cl::PrintHelpMessage(); + return 0; + } + + auto reportError = [argv](Error E) { + logAllUnhandledErrors(std::move(E), WithColor::error(errs(), argv[0])); + exit(1); + }; + + ErrorOr NvlinkPath = sys::findProgramByName("nvlink"); + if (!NvlinkPath) { + reportError(createStringError(NvlinkPath.getError(), + "unable to find 'nvlink' in path")); + } + + SmallVector Argv(argv, argv + argc); + SmallVector ArgvSubst; + SmallVector TmpFiles; + BumpPtrAllocator Alloc; + StringSaver Saver(Alloc); + cl::ExpandResponseFiles(Saver, cl::TokenizeGNUCommandLine, Argv); + + for (size_t i = 1; i < Argv.size(); ++i) { + std::string Arg = Argv[i]; + if (sys::path::extension(Arg) == ".a") { + if (Error Err = extractArchiveFiles(Arg, ArgvSubst, TmpFiles)) + reportError(std::move(Err)); + } else { + ArgvSubst.push_back(Arg); + } + } + + if (Error Err = runNVLink(NvlinkPath.get(), ArgvSubst)) + reportError(std::move(Err)); + if (Error Err = cleanupTmpFiles(TmpFiles)) + reportError(std::move(Err)); + + return 0; +} diff --git a/clang/tools/driver/driver.cpp b/clang/tools/driver/driver.cpp index 5a453429e79bf..ad36bd6be9133 100644 --- a/clang/tools/driver/driver.cpp +++ b/clang/tools/driver/driver.cpp @@ -278,27 +278,6 @@ static void FixupDiagPrefixExeName(TextDiagnosticPrinter *DiagClient, DiagClient->setPrefix(std::string(ExeBasename)); } -// This lets us create the DiagnosticsEngine with a properly-filled-out -// DiagnosticOptions instance. -static DiagnosticOptions * -CreateAndPopulateDiagOpts(ArrayRef argv, bool &UseNewCC1Process) { - auto *DiagOpts = new DiagnosticOptions; - unsigned MissingArgIndex, MissingArgCount; - InputArgList Args = getDriverOptTable().ParseArgs( - argv.slice(1), MissingArgIndex, MissingArgCount); - // We ignore MissingArgCount and the return value of ParseDiagnosticArgs. - // Any errors that would be diagnosed here will also be diagnosed later, - // when the DiagnosticsEngine actually exists. - (void)ParseDiagnosticArgs(*DiagOpts, Args); - - UseNewCC1Process = - Args.hasFlag(clang::driver::options::OPT_fno_integrated_cc1, - clang::driver::options::OPT_fintegrated_cc1, - /*Default=*/CLANG_SPAWN_CC1); - - return DiagOpts; -} - static void SetInstallDir(SmallVectorImpl &argv, Driver &TheDriver, bool CanonicalPrefixes) { // Attempt to find the original path used to invoke the driver, to determine @@ -416,10 +395,10 @@ int main(int Argc, const char **Argv) { // Skip end-of-line response file markers if (Args[i] == nullptr) continue; - if (StringRef(Args[i]) == "-no-canonical-prefixes") { + if (StringRef(Args[i]) == "-canonical-prefixes") + CanonicalPrefixes = true; + else if (StringRef(Args[i]) == "-no-canonical-prefixes") CanonicalPrefixes = false; - break; - } } // Handle CL and _CL_ which permits additional command line options to be @@ -459,10 +438,15 @@ int main(int Argc, const char **Argv) { // should spawn a new clang subprocess (old behavior). // Not having an additional process saves some execution time of Windows, // and makes debugging and profiling easier. - bool UseNewCC1Process; + bool UseNewCC1Process = CLANG_SPAWN_CC1; + for (const char *Arg : Args) + UseNewCC1Process = llvm::StringSwitch(Arg) + .Case("-fno-integrated-cc1", true) + .Case("-fintegrated-cc1", false) + .Default(UseNewCC1Process); IntrusiveRefCntPtr DiagOpts = - CreateAndPopulateDiagOpts(Args, UseNewCC1Process); + CreateAndPopulateDiagOpts(Args); TextDiagnosticPrinter *DiagClient = new TextDiagnosticPrinter(llvm::errs(), &*DiagOpts); diff --git a/clang/unittests/Basic/FileManagerTest.cpp b/clang/unittests/Basic/FileManagerTest.cpp index 0a1f58f3bb90d..b40ba01121f8f 100644 --- a/clang/unittests/Basic/FileManagerTest.cpp +++ b/clang/unittests/Basic/FileManagerTest.cpp @@ -276,9 +276,9 @@ TEST_F(FileManagerTest, getFileReturnsSameFileEntryForAliasedRealFiles) { TEST_F(FileManagerTest, getFileRefReturnsCorrectNameForDifferentStatPath) { // Inject files with the same inode, but where some files have a stat that - // gives a different name. This is adding coverage for weird stat behaviour - // triggered by the RedirectingFileSystem that FileManager::getFileRef has - // special logic for. + // gives a different name. This is adding coverage for stat behaviour + // triggered by the RedirectingFileSystem for 'use-external-name' that + // FileManager::getFileRef has special logic for. auto StatCache = std::make_unique(); StatCache->InjectDirectory("dir", 40); StatCache->InjectFile("dir/f1.cpp", 41); diff --git a/compiler-rt/lib/dfsan/dfsan_thread.h b/compiler-rt/lib/dfsan/dfsan_thread.h index 8dde626f55695..6952963cfc48f 100644 --- a/compiler-rt/lib/dfsan/dfsan_thread.h +++ b/compiler-rt/lib/dfsan/dfsan_thread.h @@ -1,5 +1,4 @@ -//===-- dfsan_thread.h -------------------------------------------*- C++ -//-*-===// +//===-- dfsan_thread.h ------------------------------------------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc b/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc index 5ab3186e159f1..5e731ac399102 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc +++ b/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc @@ -2229,8 +2229,20 @@ INTERCEPTOR(int, clock_getcpuclockid, pid_t pid, return res; } -#define INIT_CLOCK_GETCPUCLOCKID \ - COMMON_INTERCEPT_FUNCTION(clock_getcpuclockid); +INTERCEPTOR(int, pthread_getcpuclockid, uptr thread, + __sanitizer_clockid_t *clockid) { + void *ctx; + COMMON_INTERCEPTOR_ENTER(ctx, pthread_getcpuclockid, thread, clockid); + int res = REAL(pthread_getcpuclockid)(thread, clockid); + if (!res && clockid) { + COMMON_INTERCEPTOR_WRITE_RANGE(ctx, clockid, sizeof *clockid); + } + return res; +} + +#define INIT_CLOCK_GETCPUCLOCKID \ + COMMON_INTERCEPT_FUNCTION(clock_getcpuclockid); \ + COMMON_INTERCEPT_FUNCTION(pthread_getcpuclockid); #else #define INIT_CLOCK_GETCPUCLOCKID #endif diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h b/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h index a65a39afe9f8b..bdb07ff132730 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h +++ b/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h @@ -229,7 +229,7 @@ (SI_MAC || SI_LINUX_NOT_ANDROID || SI_SOLARIS) #define SANITIZER_INTERCEPT_CLOCK_GETTIME \ (SI_FREEBSD || SI_NETBSD || SI_LINUX || SI_SOLARIS) -#define SANITIZER_INTERCEPT_CLOCK_GETCPUCLOCKID SI_LINUX +#define SANITIZER_INTERCEPT_CLOCK_GETCPUCLOCKID (SI_LINUX || SI_FREEBSD) #define SANITIZER_INTERCEPT_GETITIMER SI_POSIX #define SANITIZER_INTERCEPT_TIME SI_POSIX #define SANITIZER_INTERCEPT_GLOB (SI_GLIBC || SI_SOLARIS) diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_signal_interceptors.inc b/compiler-rt/lib/sanitizer_common/sanitizer_signal_interceptors.inc index cefb870f7e258..475e577d9982e 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_signal_interceptors.inc +++ b/compiler-rt/lib/sanitizer_common/sanitizer_signal_interceptors.inc @@ -29,8 +29,16 @@ using namespace __sanitizer; #endif #ifndef SIGNAL_INTERCEPTOR_SIGACTION_IMPL -#define SIGNAL_INTERCEPTOR_SIGACTION_IMPL(signum, act, oldact) \ - { return REAL(sigaction_symname)(signum, act, oldact); } +# define SIGNAL_INTERCEPTOR_SIGACTION_IMPL(signum, act, oldact) \ + { \ + if (!REAL(sigaction_symname)) { \ + Printf( \ + "Warning: REAL(sigaction_symname) == nullptr. This may happen " \ + "if you link with ubsan statically. Sigaction will not work.\n"); \ + return -1; \ + } \ + return REAL(sigaction_symname)(signum, act, oldact); \ + } #endif #if SANITIZER_INTERCEPT_BSD_SIGNAL diff --git a/compiler-rt/test/profile/Darwin/coverage-linkage.cpp b/compiler-rt/test/profile/Darwin/coverage-linkage.cpp new file mode 100644 index 0000000000000..062717b47bfac --- /dev/null +++ b/compiler-rt/test/profile/Darwin/coverage-linkage.cpp @@ -0,0 +1,46 @@ +/// Test instrumentation can handle various linkages. +// RUN: %clang_profgen -fcoverage-mapping %s -o %t +// RUN: env LLVM_PROFILE_FILE=%t.profraw %run %t +// RUN: llvm-profdata show %t.profraw --all-functions | FileCheck %s + +// RUN: %clang_profgen -fcoverage-mapping -Wl,-dead_strip %s -o %t +// RUN: env LLVM_PROFILE_FILE=%t.profraw %run %t +// RUN: llvm-profdata show %t.profraw --all-functions | FileCheck %s + +// CHECK: {{.*}}external{{.*}}: +// CHECK-NEXT: Hash: +// CHECK-NEXT: Counters: 1 +// CHECK-NEXT: Function count: 1 +// CHECK: {{.*}}weak{{.*}}: +// CHECK-NEXT: Hash: +// CHECK-NEXT: Counters: 1 +// CHECK-NEXT: Function count: 1 +// CHECK: main: +// CHECK-NEXT: Hash: +// CHECK-NEXT: Counters: 1 +// CHECK-NEXT: Function count: 1 +// CHECK: {{.*}}internal{{.*}}: +// CHECK-NEXT: Hash: +// CHECK-NEXT: Counters: 1 +// CHECK-NEXT: Function count: 1 +// CHECK: {{.*}}linkonce_odr{{.*}}: +// CHECK-NEXT: Hash: +// CHECK-NEXT: Counters: 1 +// CHECK-NEXT: Function count: 1 + +#include + +void discarded0() {} +__attribute__((weak)) void discarded1() {} + +void external() { puts("external"); } +__attribute__((weak)) void weak() { puts("weak"); } +static void internal() { puts("internal"); } +__attribute__((noinline)) inline void linkonce_odr() { puts("linkonce_odr"); } + +int main() { + internal(); + external(); + weak(); + linkonce_odr(); +} diff --git a/compiler-rt/test/profile/Darwin/lit.local.cfg.py b/compiler-rt/test/profile/Darwin/lit.local.cfg.py new file mode 100644 index 0000000000000..a85dfcd24c08e --- /dev/null +++ b/compiler-rt/test/profile/Darwin/lit.local.cfg.py @@ -0,0 +1,9 @@ +def getRoot(config): + if not config.parent: + return config + return getRoot(config.parent) + +root = getRoot(config) + +if root.host_os not in ['Darwin']: + config.unsupported = True diff --git a/compiler-rt/test/sanitizer_common/TestCases/Linux/getcpuclockid.c b/compiler-rt/test/sanitizer_common/TestCases/Linux/getcpuclockid.c deleted file mode 100644 index 6999a80b638e5..0000000000000 --- a/compiler-rt/test/sanitizer_common/TestCases/Linux/getcpuclockid.c +++ /dev/null @@ -1,20 +0,0 @@ -// RUN: %clang %s -Wl,-as-needed -o %t && %run %t -#include -#include -#include - -long cpu_ns() { - clockid_t clk; - struct timespec ts; - int res = clock_getcpuclockid(getpid(), &clk); - assert(!res); - res = clock_gettime(clk, &ts); - assert(!res); - return ts.tv_nsec; -} - -int main() { - long cpuns = cpu_ns(); - asm volatile ("" :: "r"(cpuns)); - return 0; -} diff --git a/compiler-rt/test/sanitizer_common/TestCases/Posix/getcpuclockid.c b/compiler-rt/test/sanitizer_common/TestCases/Posix/getcpuclockid.c new file mode 100644 index 0000000000000..87ce3f5cddf38 --- /dev/null +++ b/compiler-rt/test/sanitizer_common/TestCases/Posix/getcpuclockid.c @@ -0,0 +1,36 @@ +// RUN: %clang -pthread %s -Wl,-as-needed -o %t && %run %t +// +// UNSUPPORTED: darwin, netbsd, solaris + +#include +#include +#include +#include + +long cpu_ns() { + clockid_t clk; + struct timespec ts; + int res = clock_getcpuclockid(getpid(), &clk); + assert(!res); + res = clock_gettime(clk, &ts); + assert(!res); + return ts.tv_nsec; +} + +long th_cpu_ns() { + clockid_t clk; + struct timespec ts; + int res = pthread_getcpuclockid(pthread_self(), &clk); + assert(!res); + res = clock_gettime(clk, &ts); + assert(!res); + return ts.tv_nsec; +} + +int main() { + long cpuns = cpu_ns(); + asm volatile ("" :: "r"(cpuns)); + cpuns = th_cpu_ns(); + asm volatile ("" :: "r"(cpuns)); + return 0; +} diff --git a/compiler-rt/test/ubsan/TestCases/Misc/Linux/static-link.cpp b/compiler-rt/test/ubsan/TestCases/Misc/Linux/static-link.cpp new file mode 100644 index 0000000000000..6c6b421e40c6a --- /dev/null +++ b/compiler-rt/test/ubsan/TestCases/Misc/Linux/static-link.cpp @@ -0,0 +1,13 @@ +// REQUIRES: ubsan-standalone +// REQUIRES: arch=x86_64 +// RUN: %clangxx -fsanitize=bool -static %s -o %t && UBSAN_OPTIONS=handle_segv=0:handle_sigbus=0:handle_sigfpe=0 %run %t 2>&1 | FileCheck %s +#include +#include + +int main() { + struct sigaction old_action; + sigaction(SIGINT, nullptr, &old_action); + // CHECK: Warning: REAL(sigaction_symname) == nullptr. + printf("PASS\n"); + // CHECK: PASS +} diff --git a/flang/include/flang/Evaluate/initial-image.h b/flang/include/flang/Evaluate/initial-image.h index c2cf12e377e05..596b1f77d1790 100644 --- a/flang/include/flang/Evaluate/initial-image.h +++ b/flang/include/flang/Evaluate/initial-image.h @@ -30,6 +30,7 @@ class InitialImage { }; explicit InitialImage(std::size_t bytes) : data_(bytes) {} + InitialImage(InitialImage &&that) = default; std::size_t size() const { return data_.size(); } @@ -93,19 +94,17 @@ class InitialImage { void AddPointer(ConstantSubscript, const Expr &); - void Incorporate(ConstantSubscript, const InitialImage &); + void Incorporate(ConstantSubscript toOffset, const InitialImage &from, + ConstantSubscript fromOffset, ConstantSubscript bytes); // Conversions to constant initializers std::optional> AsConstant(FoldingContext &, const DynamicType &, const ConstantSubscripts &, ConstantSubscript offset = 0) const; - std::optional> AsConstantDataPointer( - const DynamicType &, ConstantSubscript offset = 0) const; - const ProcedureDesignator &AsConstantProcPointer( + std::optional> AsConstantPointer( ConstantSubscript offset = 0) const; friend class AsConstantHelper; - friend class AsConstantDataPointerHelper; private: std::vector data_; diff --git a/flang/include/flang/Semantics/scope.h b/flang/include/flang/Semantics/scope.h index f1d5b0c87d48a..6c6ee5956f490 100644 --- a/flang/include/flang/Semantics/scope.h +++ b/flang/include/flang/Semantics/scope.h @@ -41,6 +41,8 @@ struct EquivalenceObject { std::optional substringStart, parser::CharBlock source) : symbol{symbol}, subscripts{subscripts}, substringStart{substringStart}, source{source} {} + explicit EquivalenceObject(Symbol &symbol) + : symbol{symbol}, source{symbol.name()} {} bool operator==(const EquivalenceObject &) const; bool operator<(const EquivalenceObject &) const; diff --git a/flang/include/flang/Semantics/symbol.h b/flang/include/flang/Semantics/symbol.h index 7eb7eb1370180..8810c57853701 100644 --- a/flang/include/flang/Semantics/symbol.h +++ b/flang/include/flang/Semantics/symbol.h @@ -497,6 +497,7 @@ class Symbol { LocalityShared, // named in SHARED locality-spec InDataStmt, // initialized in a DATA statement InNamelist, // flag is set if the symbol is in Namelist statement + CompilerCreated, // OpenACC data-sharing attribute AccPrivate, AccFirstPrivate, AccShared, // OpenACC data-mapping attribute @@ -779,7 +780,7 @@ struct SymbolAddressCompare { } }; -// Symbol comparison is based on the order of cooked source +// Symbol comparison is usually based on the order of cooked source // stream creation and, when both are from the same cooked source, // their positions in that cooked source stream. // Don't use this comparator or OrderedSymbolSet to hold @@ -791,12 +792,17 @@ struct SymbolSourcePositionCompare { bool operator()(const MutableSymbolRef &, const MutableSymbolRef &) const; }; +struct SymbolOffsetCompare { + bool operator()(const SymbolRef &, const SymbolRef &) const; + bool operator()(const MutableSymbolRef &, const MutableSymbolRef &) const; +}; + using UnorderedSymbolSet = std::set; -using OrderedSymbolSet = std::set; +using SourceOrderedSymbolSet = std::set; template -OrderedSymbolSet OrderBySourcePosition(const A &container) { - OrderedSymbolSet result; +SourceOrderedSymbolSet OrderBySourcePosition(const A &container) { + SourceOrderedSymbolSet result; for (SymbolRef x : container) { result.emplace(x); } diff --git a/flang/include/flang/Semantics/tools.h b/flang/include/flang/Semantics/tools.h index 1e92275eb6011..d969dc914b037 100644 --- a/flang/include/flang/Semantics/tools.h +++ b/flang/include/flang/Semantics/tools.h @@ -56,6 +56,8 @@ const DeclTypeSpec *FindParentTypeSpec(const DeclTypeSpec &); const DeclTypeSpec *FindParentTypeSpec(const Scope &); const DeclTypeSpec *FindParentTypeSpec(const Symbol &); +const EquivalenceSet *FindEquivalenceSet(const Symbol &); + enum class Tristate { No, Yes, Maybe }; inline Tristate ToTristate(bool x) { return x ? Tristate::Yes : Tristate::No; } @@ -105,14 +107,13 @@ bool IsEventTypeOrLockType(const DerivedTypeSpec *); bool IsOrContainsEventOrLockComponent(const Symbol &); bool CanBeTypeBoundProc(const Symbol *); // Does a non-PARAMETER symbol have explicit initialization with =value or -// =>target in its declaration, or optionally in a DATA statement? (Being +// =>target in its declaration (but not in a DATA statement)? (Being // ALLOCATABLE or having a derived type with default component initialization // doesn't count; it must be a variable initialization that implies the SAVE // attribute, or a derived type component default value.) -bool IsStaticallyInitialized(const Symbol &, bool ignoreDATAstatements = false); +bool HasDeclarationInitializer(const Symbol &); // Is the symbol explicitly or implicitly initialized in any way? -bool IsInitialized(const Symbol &, bool ignoreDATAstatements = false, - const Symbol *derivedType = nullptr); +bool IsInitialized(const Symbol &, bool ignoreDATAstatements = false); // Is the symbol a component subject to deallocation or finalization? bool IsDestructible(const Symbol &, const Symbol *derivedType = nullptr); bool HasIntrinsicTypeName(const Symbol &); @@ -330,6 +331,13 @@ enum class ProcedureDefinitionClass { ProcedureDefinitionClass ClassifyProcedure(const Symbol &); +// Returns a list of storage associations due to EQUIVALENCE in a +// scope; each storage association is a list of symbol references +// in ascending order of scope offset. Note that the scope may have +// more EquivalenceSets than this function's result has storage +// associations; these are closures over equivalences. +std::list> GetStorageAssociations(const Scope &); + // Derived type component iterator that provides a C++ LegacyForwardIterator // iterator over the Ordered, Direct, Ultimate or Potential components of a // DerivedTypeSpec. These iterators can be used with STL algorithms diff --git a/flang/lib/Evaluate/fold-implementation.h b/flang/lib/Evaluate/fold-implementation.h index 134222d0710a0..f68e2ea0acd4d 100644 --- a/flang/lib/Evaluate/fold-implementation.h +++ b/flang/lib/Evaluate/fold-implementation.h @@ -65,6 +65,8 @@ template class Folder { Expr EOSHIFT(FunctionRef &&); Expr PACK(FunctionRef &&); Expr RESHAPE(FunctionRef &&); + Expr TRANSPOSE(FunctionRef &&); + Expr UNPACK(FunctionRef &&); private: FoldingContext &context_; @@ -853,6 +855,78 @@ template Expr Folder::RESHAPE(FunctionRef &&funcRef) { return MakeInvalidIntrinsic(std::move(funcRef)); } +template Expr Folder::TRANSPOSE(FunctionRef &&funcRef) { + auto args{funcRef.arguments()}; + CHECK(args.size() == 1); + const auto *matrix{UnwrapConstantValue(args[0])}; + if (!matrix) { + return Expr{std::move(funcRef)}; + } + // Argument is constant. Traverse its elements in transposed order. + std::vector> resultElements; + ConstantSubscripts at(2); + for (ConstantSubscript j{0}; j < matrix->shape()[0]; ++j) { + at[0] = matrix->lbounds()[0] + j; + for (ConstantSubscript k{0}; k < matrix->shape()[1]; ++k) { + at[1] = matrix->lbounds()[1] + k; + resultElements.push_back(matrix->At(at)); + } + } + at = matrix->shape(); + std::swap(at[0], at[1]); + return Expr{PackageConstant(std::move(resultElements), *matrix, at)}; +} + +template Expr Folder::UNPACK(FunctionRef &&funcRef) { + auto args{funcRef.arguments()}; + CHECK(args.size() == 3); + const auto *vector{UnwrapConstantValue(args[0])}; + auto convertedMask{Fold(context_, + ConvertToType( + Expr{DEREF(UnwrapExpr>(args[1]))}))}; + const auto *mask{UnwrapConstantValue(convertedMask)}; + const auto *field{UnwrapConstantValue(args[2])}; + if (!vector || !mask || !field) { + return Expr{std::move(funcRef)}; + } + // Arguments are constant. + if (field->Rank() > 0 && field->shape() != mask->shape()) { + // Error already emitted from intrinsic processing + return MakeInvalidIntrinsic(std::move(funcRef)); + } + ConstantSubscript maskElements{GetSize(mask->shape())}; + ConstantSubscript truths{0}; + ConstantSubscripts maskAt{mask->lbounds()}; + for (ConstantSubscript j{0}; j < maskElements; + ++j, mask->IncrementSubscripts(maskAt)) { + if (mask->At(maskAt).IsTrue()) { + ++truths; + } + } + if (truths > GetSize(vector->shape())) { + context_.messages().Say( + "Invalid 'vector=' argument in UNPACK: the 'mask=' argument has %jd true elements, but the vector has only %jd elements"_err_en_US, + static_cast(truths), + static_cast(GetSize(vector->shape()))); + return MakeInvalidIntrinsic(std::move(funcRef)); + } + std::vector> resultElements; + ConstantSubscripts vectorAt{vector->lbounds()}; + ConstantSubscripts fieldAt{field->lbounds()}; + for (ConstantSubscript j{0}; j < maskElements; ++j) { + if (mask->At(maskAt).IsTrue()) { + resultElements.push_back(vector->At(vectorAt)); + vector->IncrementSubscripts(vectorAt); + } else { + resultElements.push_back(field->At(fieldAt)); + } + mask->IncrementSubscripts(maskAt); + field->IncrementSubscripts(fieldAt); + } + return Expr{ + PackageConstant(std::move(resultElements), *vector, mask->shape())}; +} + template Expr FoldMINorMAX( FoldingContext &context, FunctionRef &&funcRef, Ordering order) { @@ -943,8 +1017,12 @@ Expr FoldOperation(FoldingContext &context, FunctionRef &&funcRef) { return Folder{context}.PACK(std::move(funcRef)); } else if (name == "reshape") { return Folder{context}.RESHAPE(std::move(funcRef)); + } else if (name == "transpose") { + return Folder{context}.TRANSPOSE(std::move(funcRef)); + } else if (name == "unpack") { + return Folder{context}.UNPACK(std::move(funcRef)); } - // TODO: spread, unpack, transpose + // TODO: spread // TODO: extends_type_of, same_type_as if constexpr (!std::is_same_v) { return FoldIntrinsicFunction(context, std::move(funcRef)); diff --git a/flang/lib/Evaluate/initial-image.cpp b/flang/lib/Evaluate/initial-image.cpp index 35be2238af1ad..6abca5704fbb6 100644 --- a/flang/lib/Evaluate/initial-image.cpp +++ b/flang/lib/Evaluate/initial-image.cpp @@ -54,11 +54,14 @@ void InitialImage::AddPointer( pointers_.emplace(offset, pointer); } -void InitialImage::Incorporate( - ConstantSubscript offset, const InitialImage &that) { - CHECK(that.pointers_.empty()); // pointers are not allowed in EQUIVALENCE - CHECK(offset + that.size() <= size()); - std::memcpy(&data_[offset], &that.data_[0], that.size()); +void InitialImage::Incorporate(ConstantSubscript toOffset, + const InitialImage &from, ConstantSubscript fromOffset, + ConstantSubscript bytes) { + CHECK(from.pointers_.empty()); // pointers are not allowed in EQUIVALENCE + CHECK(fromOffset >= 0 && bytes >= 0 && + static_cast(fromOffset + bytes) <= from.size()); + CHECK(static_cast(toOffset + bytes) <= size()); + std::memcpy(&data_[toOffset], &from.data_[fromOffset], bytes); } // Classes used with common::SearchTypes() to (re)construct Constant<> values @@ -97,26 +100,31 @@ class AsConstantHelper { const semantics::DerivedTypeSpec &derived{type_.GetDerivedTypeSpec()}; for (auto iter : DEREF(derived.scope())) { const Symbol &component{*iter.second}; - bool isPointer{IsPointer(component)}; - if (component.has() || - component.has()) { - auto componentType{DynamicType::From(component)}; - CHECK(componentType); + bool isProcPtr{IsProcedurePointer(component)}; + if (isProcPtr || component.has()) { auto at{offset_ + component.offset()}; - if (isPointer) { + if (isProcPtr) { for (std::size_t j{0}; j < elements; ++j, at += stride) { - Result value{image_.AsConstantDataPointer(*componentType, at)}; - CHECK(value); - typedValue[j].emplace(component, std::move(*value)); + if (Result value{image_.AsConstantPointer(at)}) { + typedValue[j].emplace(component, std::move(*value)); + } + } + } else if (IsPointer(component)) { + for (std::size_t j{0}; j < elements; ++j, at += stride) { + if (Result value{image_.AsConstantPointer(at)}) { + typedValue[j].emplace(component, std::move(*value)); + } } } else { + auto componentType{DynamicType::From(component)}; + CHECK(componentType.has_value()); auto componentExtents{GetConstantExtents(context_, component)}; - CHECK(componentExtents); + CHECK(componentExtents.has_value()); for (std::size_t j{0}; j < elements; ++j, at += stride) { - Result value{image_.AsConstant( - context_, *componentType, *componentExtents, at)}; - CHECK(value); - typedValue[j].emplace(component, std::move(*value)); + if (Result value{image_.AsConstant( + context_, *componentType, *componentExtents, at)}) { + typedValue[j].emplace(component, std::move(*value)); + } } } } @@ -159,45 +167,11 @@ std::optional> InitialImage::AsConstant(FoldingContext &context, AsConstantHelper{context, type, extents, *this, offset}); } -class AsConstantDataPointerHelper { -public: - using Result = std::optional>; - using Types = AllTypes; - AsConstantDataPointerHelper(const DynamicType &type, - const InitialImage &image, ConstantSubscript offset = 0) - : type_{type}, image_{image}, offset_{offset} {} - template Result Test() { - if (T::category != type_.category()) { - return std::nullopt; - } - if constexpr (T::category != TypeCategory::Derived) { - if (T::kind != type_.kind()) { - return std::nullopt; - } - } - auto iter{image_.pointers_.find(offset_)}; - if (iter == image_.pointers_.end()) { - return AsGenericExpr(NullPointer{}); - } - return iter->second; - } - -private: - const DynamicType &type_; - const InitialImage &image_; - ConstantSubscript offset_; -}; - -std::optional> InitialImage::AsConstantDataPointer( - const DynamicType &type, ConstantSubscript offset) const { - return common::SearchTypes(AsConstantDataPointerHelper{type, *this, offset}); -} - -const ProcedureDesignator &InitialImage::AsConstantProcPointer( +std::optional> InitialImage::AsConstantPointer( ConstantSubscript offset) const { - auto iter{pointers_.find(0)}; - CHECK(iter != pointers_.end()); - return DEREF(std::get_if(&iter->second.u)); + auto iter{pointers_.find(offset)}; + return iter == pointers_.end() ? std::optional>{} + : iter->second; } } // namespace Fortran::evaluate diff --git a/flang/lib/Parser/preprocessor.cpp b/flang/lib/Parser/preprocessor.cpp index a2eb77aaa9a2d..de85e8eda56ab 100644 --- a/flang/lib/Parser/preprocessor.cpp +++ b/flang/lib/Parser/preprocessor.cpp @@ -394,15 +394,14 @@ TokenSequence Preprocessor::ReplaceMacros( return tokens; } -void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { +void Preprocessor::Directive(const TokenSequence &dir, Prescanner &prescanner) { std::size_t tokens{dir.SizeInTokens()}; std::size_t j{dir.SkipBlanks(0)}; if (j == tokens) { return; } - CHECK(prescanner); // TODO: change to reference if (dir.TokenAt(j).ToString() != "#") { - prescanner->Say(dir.GetTokenProvenanceRange(j), "missing '#'"_err_en_US); + prescanner.Say(dir.GetTokenProvenanceRange(j), "missing '#'"_err_en_US); return; } j = dir.SkipBlanks(j + 1); @@ -426,7 +425,7 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { // #line is ignored } else if (dirName == "define") { if (nameToken.empty()) { - prescanner->Say(dir.GetTokenProvenanceRange(j < tokens ? j : tokens - 1), + prescanner.Say(dir.GetTokenProvenanceRange(j < tokens ? j : tokens - 1), "#define: missing or invalid name"_err_en_US); return; } @@ -444,7 +443,7 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { isVariadic = true; } else { if (an.empty() || !IsLegalIdentifierStart(an[0])) { - prescanner->Say(dir.GetTokenProvenanceRange(j), + prescanner.Say(dir.GetTokenProvenanceRange(j), "#define: missing or invalid argument name"_err_en_US); return; } @@ -452,7 +451,7 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { } j = dir.SkipBlanks(j + 1); if (j == tokens) { - prescanner->Say(dir.GetTokenProvenanceRange(tokens - 1), + prescanner.Say(dir.GetTokenProvenanceRange(tokens - 1), "#define: malformed argument list"_err_en_US); return; } @@ -461,20 +460,20 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { break; } if (isVariadic || punc != ",") { - prescanner->Say(dir.GetTokenProvenanceRange(j), + prescanner.Say(dir.GetTokenProvenanceRange(j), "#define: malformed argument list"_err_en_US); return; } j = dir.SkipBlanks(j + 1); if (j == tokens) { - prescanner->Say(dir.GetTokenProvenanceRange(tokens - 1), + prescanner.Say(dir.GetTokenProvenanceRange(tokens - 1), "#define: malformed argument list"_err_en_US); return; } } if (std::set(argName.begin(), argName.end()).size() != argName.size()) { - prescanner->Say(dir.GetTokenProvenance(dirOffset), + prescanner.Say(dir.GetTokenProvenance(dirOffset), "#define: argument names are not distinct"_err_en_US); return; } @@ -489,12 +488,12 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { } } else if (dirName == "undef") { if (nameToken.empty()) { - prescanner->Say( + prescanner.Say( dir.GetIntervalProvenanceRange(dirOffset, tokens - dirOffset), "# missing or invalid name"_err_en_US); } else { if (dir.IsAnythingLeft(++j)) { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#undef: excess tokens at end of directive"_en_US); } else { definitions_.erase(nameToken); @@ -503,12 +502,12 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { } else if (dirName == "ifdef" || dirName == "ifndef") { bool doThen{false}; if (nameToken.empty()) { - prescanner->Say( + prescanner.Say( dir.GetIntervalProvenanceRange(dirOffset, tokens - dirOffset), "#%s: missing name"_err_en_US, dirName); } else { if (dir.IsAnythingLeft(++j)) { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#%s: excess tokens at end of directive"_en_US, dirName); } doThen = IsNameDefined(nameToken) == (dirName == "ifdef"); @@ -528,13 +527,13 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { } } else if (dirName == "else") { if (dir.IsAnythingLeft(j)) { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#else: excess tokens at end of directive"_en_US); } else if (ifStack_.empty()) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#else: not nested within #if, #ifdef, or #ifndef"_err_en_US); } else if (ifStack_.top() != CanDeadElseAppear::Yes) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#else: already appeared within this #if, #ifdef, or #ifndef"_err_en_US); } else { ifStack_.pop(); @@ -543,10 +542,10 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { } } else if (dirName == "elif") { if (ifStack_.empty()) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#elif: not nested within #if, #ifdef, or #ifndef"_err_en_US); } else if (ifStack_.top() != CanDeadElseAppear::Yes) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#elif: #else previously appeared within this #if, #ifdef, or #ifndef"_err_en_US); } else { ifStack_.pop(); @@ -555,26 +554,26 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { } } else if (dirName == "endif") { if (dir.IsAnythingLeft(j)) { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#endif: excess tokens at end of directive"_en_US); } else if (ifStack_.empty()) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#endif: no #if, #ifdef, or #ifndef"_err_en_US); } else { ifStack_.pop(); } } else if (dirName == "error") { - prescanner->Say( + prescanner.Say( dir.GetIntervalProvenanceRange(dirOffset, tokens - dirOffset), "%s"_err_en_US, dir.ToString()); } else if (dirName == "warning" || dirName == "comment" || dirName == "note") { - prescanner->Say( + prescanner.Say( dir.GetIntervalProvenanceRange(dirOffset, tokens - dirOffset), "%s"_en_US, dir.ToString()); } else if (dirName == "include") { if (j == tokens) { - prescanner->Say( + prescanner.Say( dir.GetIntervalProvenanceRange(dirOffset, tokens - dirOffset), "#include: missing name of file to include"_err_en_US); return; @@ -584,7 +583,7 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { if (dir.TokenAt(j).ToString() == "<") { // #include std::size_t k{j + 1}; if (k >= tokens) { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#include: file name missing"_err_en_US); return; } @@ -592,11 +591,11 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { ++k; } if (k >= tokens) { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#include: expected '>' at end of included file"_en_US); } TokenSequence braced{dir, j + 1, k - j - 1}; - include = ReplaceMacros(braced, *prescanner).ToString(); + include = ReplaceMacros(braced, prescanner).ToString(); j = k; } else if ((include = dir.TokenAt(j).ToString()).substr(0, 1) == "\"" && include.substr(include.size() - 1, 1) == "\"") { // #include "foo" @@ -608,18 +607,18 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { prependPath = DirectoryName(currentFile->path()); } } else { - prescanner->Say(dir.GetTokenProvenanceRange(j < tokens ? j : tokens - 1), + prescanner.Say(dir.GetTokenProvenanceRange(j < tokens ? j : tokens - 1), "#include: expected name of file to include"_err_en_US); return; } if (include.empty()) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#include: empty include file name"_err_en_US); return; } j = dir.SkipBlanks(j + 1); if (j < tokens && dir.TokenAt(j).ToString() != "!") { - prescanner->Say(dir.GetIntervalProvenanceRange(j, tokens - j), + prescanner.Say(dir.GetIntervalProvenanceRange(j, tokens - j), "#include: extra stuff ignored after file name"_en_US); } std::string buf; @@ -627,17 +626,17 @@ void Preprocessor::Directive(const TokenSequence &dir, Prescanner *prescanner) { const SourceFile *included{ allSources_.Open(include, error, std::move(prependPath))}; if (!included) { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#include: %s"_err_en_US, error.str()); } else if (included->bytes() > 0) { ProvenanceRange fileRange{ allSources_.AddIncludedFile(*included, dir.GetProvenanceRange())}; - Prescanner{*prescanner} + Prescanner{prescanner} .set_encoding(included->encoding()) .Prescan(fileRange); } } else { - prescanner->Say(dir.GetTokenProvenanceRange(dirOffset), + prescanner.Say(dir.GetTokenProvenanceRange(dirOffset), "#%s: unknown or unimplemented directive"_err_en_US, dirName); } } @@ -669,15 +668,15 @@ static std::string GetDirectiveName( } void Preprocessor::SkipDisabledConditionalCode(const std::string &dirName, - IsElseActive isElseActive, Prescanner *prescanner, + IsElseActive isElseActive, Prescanner &prescanner, ProvenanceRange provenanceRange) { int nesting{0}; - while (!prescanner->IsAtEnd()) { - if (!prescanner->IsNextLinePreprocessorDirective()) { - prescanner->NextLine(); + while (!prescanner.IsAtEnd()) { + if (!prescanner.IsNextLinePreprocessorDirective()) { + prescanner.NextLine(); continue; } - TokenSequence line{prescanner->TokenizePreprocessorDirective()}; + TokenSequence line{prescanner.TokenizePreprocessorDirective()}; std::size_t rest{0}; std::string dn{GetDirectiveName(line, &rest)}; if (dn == "ifdef" || dn == "ifndef" || dn == "if") { @@ -699,7 +698,7 @@ void Preprocessor::SkipDisabledConditionalCode(const std::string &dirName, } } } - prescanner->Say(provenanceRange, "#%s: missing #endif"_err_en_US, dirName); + prescanner.Say(provenanceRange, "#%s: missing #endif"_err_en_US, dirName); } // Precedence level codes used here to accommodate mixed Fortran and C: @@ -1049,7 +1048,7 @@ static std::int64_t ExpressionValue(const TokenSequence &token, } bool Preprocessor::IsIfPredicateTrue(const TokenSequence &expr, - std::size_t first, std::size_t exprTokens, Prescanner *prescanner) { + std::size_t first, std::size_t exprTokens, Prescanner &prescanner) { TokenSequence expr1{expr, first, exprTokens}; if (expr1.HasBlanks()) { expr1.RemoveBlanks(); @@ -1075,23 +1074,23 @@ bool Preprocessor::IsIfPredicateTrue(const TokenSequence &expr, } expr2.Put(expr1, j); } - TokenSequence expr3{ReplaceMacros(expr2, *prescanner)}; + TokenSequence expr3{ReplaceMacros(expr2, prescanner)}; if (expr3.HasBlanks()) { expr3.RemoveBlanks(); } if (expr3.empty()) { - prescanner->Say(expr.GetProvenanceRange(), "empty expression"_err_en_US); + prescanner.Say(expr.GetProvenanceRange(), "empty expression"_err_en_US); return false; } std::size_t atToken{0}; std::optional error; bool result{ExpressionValue(expr3, 0, &atToken, &error) != 0}; if (error) { - prescanner->Say(std::move(*error)); + prescanner.Say(std::move(*error)); } else if (atToken < expr3.SizeInTokens() && expr3.TokenAt(atToken).ToString() != "!") { - prescanner->Say(expr3.GetIntervalProvenanceRange( - atToken, expr3.SizeInTokens() - atToken), + prescanner.Say(expr3.GetIntervalProvenanceRange( + atToken, expr3.SizeInTokens() - atToken), atToken == 0 ? "could not parse any expression"_err_en_US : "excess characters after expression"_err_en_US); } diff --git a/flang/lib/Parser/preprocessor.h b/flang/lib/Parser/preprocessor.h index 00149275a18eb..8900dc3f44150 100644 --- a/flang/lib/Parser/preprocessor.h +++ b/flang/lib/Parser/preprocessor.h @@ -78,7 +78,7 @@ class Preprocessor { const TokenSequence &, Prescanner &); // Implements a preprocessor directive. - void Directive(const TokenSequence &, Prescanner *); + void Directive(const TokenSequence &, Prescanner &); private: enum class IsElseActive { No, Yes }; @@ -87,9 +87,9 @@ class Preprocessor { CharBlock SaveTokenAsName(const CharBlock &); TokenSequence ReplaceMacros(const TokenSequence &, Prescanner &); void SkipDisabledConditionalCode( - const std::string &, IsElseActive, Prescanner *, ProvenanceRange); + const std::string &, IsElseActive, Prescanner &, ProvenanceRange); bool IsIfPredicateTrue(const TokenSequence &expr, std::size_t first, - std::size_t exprTokens, Prescanner *); + std::size_t exprTokens, Prescanner &); AllSources &allSources_; std::list names_; diff --git a/flang/lib/Parser/prescan.cpp b/flang/lib/Parser/prescan.cpp index edb62b35242df..18d69d1ac5e75 100644 --- a/flang/lib/Parser/prescan.cpp +++ b/flang/lib/Parser/prescan.cpp @@ -103,7 +103,7 @@ void Prescanner::Statement() { case LineClassification::Kind::IncludeDirective: case LineClassification::Kind::DefinitionDirective: case LineClassification::Kind::PreprocessorDirective: - preprocessor_.Directive(TokenizePreprocessorDirective(), this); + preprocessor_.Directive(TokenizePreprocessorDirective(), *this); return; case LineClassification::Kind::CompilerDirective: directiveSentinel_ = line.sentinel; @@ -823,7 +823,7 @@ bool Prescanner::SkipCommentLine(bool afterAmpersand) { // (when it does not follow '&'), #define, and #undef (because // they cannot be allowed to affect preceding text on a // continued line). - preprocessor_.Directive(TokenizePreprocessorDirective(), this); + preprocessor_.Directive(TokenizePreprocessorDirective(), *this); return true; } else if (afterAmpersand && (lineClass.kind == LineClassification::Kind::IncludeDirective || diff --git a/flang/lib/Semantics/check-declarations.cpp b/flang/lib/Semantics/check-declarations.cpp index 3b6d589ba2973..368c8a108a5b9 100644 --- a/flang/lib/Semantics/check-declarations.cpp +++ b/flang/lib/Semantics/check-declarations.cpp @@ -526,7 +526,7 @@ void CheckHelper::CheckObjectEntity( messages_.Say("OPTIONAL attribute may apply only to a dummy " "argument"_err_en_US); // C849 } - if (IsStaticallyInitialized(symbol, true /* ignore DATA inits */)) { // C808 + if (HasDeclarationInitializer(symbol)) { // C808; ignore DATA initialization CheckPointerInitialization(symbol); if (IsAutomatic(symbol)) { messages_.Say( @@ -1152,6 +1152,12 @@ bool CheckHelper::CheckDefinedOperator(SourceName opName, GenericKind kind, return false; } std::optional msg; + auto checkDefinedOperatorArgs{ + [&](SourceName opName, const Symbol &specific, const Procedure &proc) { + bool arg0Defined{CheckDefinedOperatorArg(opName, specific, proc, 0)}; + bool arg1Defined{CheckDefinedOperatorArg(opName, specific, proc, 1)}; + return arg0Defined && arg1Defined; + }}; if (specific.attrs().test(Attr::NOPASS)) { // C774 msg = "%s procedure '%s' may not have NOPASS attribute"_err_en_US; } else if (!proc.functionResult.has_value()) { @@ -1161,8 +1167,7 @@ bool CheckHelper::CheckDefinedOperator(SourceName opName, GenericKind kind, " result"_err_en_US; } else if (auto m{CheckNumberOfArgs(kind, proc.dummyArguments.size())}) { msg = std::move(m); - } else if (!CheckDefinedOperatorArg(opName, specific, proc, 0) | - !CheckDefinedOperatorArg(opName, specific, proc, 1)) { + } else if (!checkDefinedOperatorArgs(opName, specific, proc)) { return false; // error was reported } else if (ConflictsWithIntrinsicOperator(kind, proc)) { msg = "%s function '%s' conflicts with intrinsic operator"_err_en_US; diff --git a/flang/lib/Semantics/compute-offsets.cpp b/flang/lib/Semantics/compute-offsets.cpp index 2ceb8f4336a58..a78d3f8418bc7 100644 --- a/flang/lib/Semantics/compute-offsets.cpp +++ b/flang/lib/Semantics/compute-offsets.cpp @@ -38,9 +38,9 @@ class ComputeOffsetsHelper { }; struct SymbolAndOffset { SymbolAndOffset(Symbol &s, std::size_t off, const EquivalenceObject &obj) - : symbol{&s}, offset{off}, object{&obj} {} + : symbol{s}, offset{off}, object{&obj} {} SymbolAndOffset(const SymbolAndOffset &) = default; - Symbol *symbol; + MutableSymbolRef symbol; std::size_t offset; const EquivalenceObject *object; }; diff --git a/flang/lib/Semantics/data-to-inits.cpp b/flang/lib/Semantics/data-to-inits.cpp index 168dfb8e45586..8fba39f825345 100644 --- a/flang/lib/Semantics/data-to-inits.cpp +++ b/flang/lib/Semantics/data-to-inits.cpp @@ -20,6 +20,16 @@ #include "flang/Evaluate/tools.h" #include "flang/Semantics/tools.h" +// The job of generating explicit static initializers for objects that don't +// have them in order to implement default component initialization is now being +// done in lowering, so don't do it here in semantics; but the code remains here +// in case we change our minds. +static constexpr bool makeDefaultInitializationExplicit{false}; + +// Whether to delete the original "init()" initializers from storage-associated +// objects and pointers. +static constexpr bool removeOriginalInits{false}; + namespace Fortran::semantics { // Steps through a list of values in a DATA statement set; implements @@ -269,8 +279,10 @@ bool DataInitializationCompiler::InitElement( } }}; const auto GetImage{[&]() -> evaluate::InitialImage & { - auto &symbolInit{inits_.emplace(&symbol, symbol.size()).first->second}; - symbolInit.inits.emplace_back(offsetSymbol.offset(), offsetSymbol.size()); + auto iter{inits_.emplace(&symbol, symbol.size())}; + auto &symbolInit{iter.first->second}; + symbolInit.initializedRanges.emplace_back( + offsetSymbol.offset(), offsetSymbol.size()); return symbolInit.image; }}; const auto OutOfRangeError{[&]() { @@ -393,146 +405,422 @@ void AccumulateDataInitializations(DataInitializations &inits, } } -static bool CombineSomeEquivalencedInits( - DataInitializations &inits, evaluate::ExpressionAnalyzer &exprAnalyzer) { - auto end{inits.end()}; - for (auto iter{inits.begin()}; iter != end; ++iter) { - const Symbol &symbol{*iter->first}; - Scope &scope{const_cast(symbol.owner())}; - if (scope.equivalenceSets().empty()) { - continue; // no problem to solve here - } - const auto *commonBlock{FindCommonBlockContaining(symbol)}; - // Sweep following DATA initializations in search of overlapping - // objects, accumulating into a vector; iterate to a fixed point. - std::vector conflicts; - auto minStart{symbol.offset()}; - auto maxEnd{symbol.offset() + symbol.size()}; - std::size_t minElementBytes{1}; - while (true) { - auto prevCount{conflicts.size()}; - conflicts.clear(); - for (auto scan{iter}; ++scan != end;) { - const Symbol &other{*scan->first}; - const Scope &otherScope{other.owner()}; - if (&otherScope == &scope && - FindCommonBlockContaining(other) == commonBlock && - maxEnd > other.offset() && - other.offset() + other.size() > minStart) { - // "other" conflicts with "symbol" or another conflict - conflicts.push_back(&other); - minStart = std::min(minStart, other.offset()); - maxEnd = std::max(maxEnd, other.offset() + other.size()); +// Looks for default derived type component initialization -- but +// *not* allocatables. +static const DerivedTypeSpec *HasDefaultInitialization(const Symbol &symbol) { + if (const auto *object{symbol.detailsIf()}) { + if (object->init().has_value()) { + return nullptr; // init is explicit, not default + } else if (!object->isDummy() && object->type()) { + if (const DerivedTypeSpec * derived{object->type()->AsDerived()}) { + DirectComponentIterator directs{*derived}; + if (std::find_if( + directs.begin(), directs.end(), [](const Symbol &component) { + return !IsAllocatable(component) && + HasDeclarationInitializer(component); + })) { + return derived; } } - if (conflicts.size() == prevCount) { - break; + } + } + return nullptr; +} + +// PopulateWithComponentDefaults() adds initializations to an instance +// of SymbolDataInitialization containing all of the default component +// initializers + +static void PopulateWithComponentDefaults(SymbolDataInitialization &init, + std::size_t offset, const DerivedTypeSpec &derived, + evaluate::FoldingContext &foldingContext); + +static void PopulateWithComponentDefaults(SymbolDataInitialization &init, + std::size_t offset, const DerivedTypeSpec &derived, + evaluate::FoldingContext &foldingContext, const Symbol &symbol) { + if (auto extents{evaluate::GetConstantExtents(foldingContext, symbol)}) { + const Scope &scope{derived.scope() ? *derived.scope() + : DEREF(derived.typeSymbol().scope())}; + std::size_t stride{scope.size()}; + if (std::size_t alignment{scope.alignment().value_or(0)}) { + stride = ((stride + alignment - 1) / alignment) * alignment; + } + for (auto elements{evaluate::GetSize(*extents)}; elements-- > 0; + offset += stride) { + PopulateWithComponentDefaults(init, offset, derived, foldingContext); + } + } +} + +// F'2018 19.5.3(10) allows storage-associated default component initialization +// when the values are identical. +static void PopulateWithComponentDefaults(SymbolDataInitialization &init, + std::size_t offset, const DerivedTypeSpec &derived, + evaluate::FoldingContext &foldingContext) { + const Scope &scope{ + derived.scope() ? *derived.scope() : DEREF(derived.typeSymbol().scope())}; + for (const auto &pair : scope) { + const Symbol &component{*pair.second}; + std::size_t componentOffset{offset + component.offset()}; + if (const auto *object{component.detailsIf()}) { + if (!IsAllocatable(component) && !IsAutomatic(component)) { + bool initialized{false}; + if (object->init()) { + initialized = true; + if (IsPointer(component)) { + if (auto extant{init.image.AsConstantPointer(componentOffset)}) { + initialized = !(*extant == *object->init()); + } + if (initialized) { + init.image.AddPointer(componentOffset, *object->init()); + } + } else { // data, not pointer + if (auto dyType{evaluate::DynamicType::From(component)}) { + if (auto extents{evaluate::GetConstantExtents( + foldingContext, component)}) { + if (auto extant{init.image.AsConstant( + foldingContext, *dyType, *extents, componentOffset)}) { + initialized = !(*extant == *object->init()); + } + } + } + if (initialized) { + init.image.Add(componentOffset, component.size(), *object->init(), + foldingContext); + } + } + } else if (const DeclTypeSpec * type{component.GetType()}) { + if (const DerivedTypeSpec * componentDerived{type->AsDerived()}) { + PopulateWithComponentDefaults(init, componentOffset, + *componentDerived, foldingContext, component); + } + } + if (initialized) { + init.initializedRanges.emplace_back( + componentOffset, component.size()); + } + } + } else if (const auto *proc{component.detailsIf()}) { + if (proc->init() && *proc->init()) { + SomeExpr procPtrInit{evaluate::ProcedureDesignator{**proc->init()}}; + auto extant{init.image.AsConstantPointer(componentOffset)}; + if (!extant || !(*extant == procPtrInit)) { + init.initializedRanges.emplace_back( + componentOffset, component.size()); + init.image.AddPointer(componentOffset, std::move(procPtrInit)); + } } } - if (conflicts.empty()) { - continue; - } - // Compute the minimum common granularity - if (auto dyType{evaluate::DynamicType::From(symbol)}) { - minElementBytes = evaluate::ToInt64( - dyType->MeasureSizeInBytes(exprAnalyzer.GetFoldingContext(), true)) - .value_or(1); - } - for (const Symbol *s : conflicts) { - if (auto dyType{evaluate::DynamicType::From(*s)}) { - minElementBytes = std::min(minElementBytes, - evaluate::ToInt64(dyType->MeasureSizeInBytes( - exprAnalyzer.GetFoldingContext(), true)) - .value_or(1)); + } +} + +static bool CheckForOverlappingInitialization( + const std::list &symbols, + SymbolDataInitialization &initialization, + evaluate::ExpressionAnalyzer &exprAnalyzer, const std::string &what) { + bool result{true}; + auto &context{exprAnalyzer.GetFoldingContext()}; + initialization.initializedRanges.sort(); + ConstantSubscript next{0}; + for (const auto &range : initialization.initializedRanges) { + if (range.start() < next) { + result = false; // error: overlap + bool hit{false}; + for (const Symbol &symbol : symbols) { + auto offset{range.start() - + static_cast( + symbol.offset() - symbols.front()->offset())}; + if (offset >= 0) { + if (auto badDesignator{evaluate::OffsetToDesignator( + context, symbol, offset, range.size())}) { + hit = true; + exprAnalyzer.Say(symbol.name(), + "%s affect '%s' more than once"_err_en_US, what, + badDesignator->AsFortran()); + } + } + } + CHECK(hit); + } + next = range.start() + range.size(); + CHECK(next <= static_cast(initialization.image.size())); + } + return result; +} + +static void IncorporateExplicitInitialization( + SymbolDataInitialization &combined, DataInitializations &inits, + const Symbol &symbol, ConstantSubscript firstOffset, + evaluate::FoldingContext &foldingContext) { + auto iter{inits.find(&symbol)}; + const auto offset{symbol.offset() - firstOffset}; + if (iter != inits.end()) { // DATA statement initialization + for (const auto &range : iter->second.initializedRanges) { + auto at{offset + range.start()}; + combined.initializedRanges.emplace_back(at, range.size()); + combined.image.Incorporate( + at, iter->second.image, range.start(), range.size()); + } + if (removeOriginalInits) { + inits.erase(iter); + } + } else { // Declaration initialization + Symbol &mutableSymbol{const_cast(symbol)}; + if (IsPointer(mutableSymbol)) { + if (auto *object{mutableSymbol.detailsIf()}) { + if (object->init()) { + combined.initializedRanges.emplace_back(offset, mutableSymbol.size()); + combined.image.AddPointer(offset, *object->init()); + if (removeOriginalInits) { + object->init().reset(); + } + } + } else if (auto *proc{mutableSymbol.detailsIf()}) { + if (proc->init() && *proc->init()) { + combined.initializedRanges.emplace_back(offset, mutableSymbol.size()); + combined.image.AddPointer( + offset, SomeExpr{evaluate::ProcedureDesignator{**proc->init()}}); + if (removeOriginalInits) { + proc->init().reset(); + } + } + } + } else if (auto *object{mutableSymbol.detailsIf()}) { + if (!IsNamedConstant(mutableSymbol) && object->init()) { + combined.initializedRanges.emplace_back(offset, mutableSymbol.size()); + combined.image.Add( + offset, mutableSymbol.size(), *object->init(), foldingContext); + if (removeOriginalInits) { + object->init().reset(); + } + } + } + } +} + +// Finds the size of the smallest element type in a list of +// storage-associated objects. +static std::size_t ComputeMinElementBytes( + const std::list &associated, + evaluate::FoldingContext &foldingContext) { + std::size_t minElementBytes{1}; + const Symbol &first{*associated.front()}; + for (const Symbol &s : associated) { + if (auto dyType{evaluate::DynamicType::From(s)}) { + auto size{static_cast( + evaluate::ToInt64(dyType->MeasureSizeInBytes(foldingContext, true)) + .value_or(1))}; + if (std::size_t alignment{dyType->GetAlignment(foldingContext)}) { + size = ((size + alignment - 1) / alignment) * alignment; + } + if (&s == &first) { + minElementBytes = size; } else { - minElementBytes = 1; + minElementBytes = std::min(minElementBytes, size); } + } else { + minElementBytes = 1; } - CHECK(minElementBytes > 0); - CHECK((minElementBytes & (minElementBytes - 1)) == 0); - auto bytes{static_cast(maxEnd - minStart)}; - CHECK(bytes % minElementBytes == 0); - const DeclTypeSpec &typeSpec{scope.MakeNumericType( - TypeCategory::Integer, KindExpr{minElementBytes})}; - // Combine "symbol" and "conflicts[]" into a compiler array temp - // that overlaps all of them, and merge their initial values into - // the temp's initializer. + } + return minElementBytes; +} + +// Checks for overlapping initialization errors in a list of +// storage-associated objects. Default component initializations +// are allowed to be overridden by explicit initializations. +// If the objects are static, save the combined initializer as +// a compiler-created object that covers all of them. +static bool CombineEquivalencedInitialization( + const std::list &associated, + evaluate::ExpressionAnalyzer &exprAnalyzer, DataInitializations &inits) { + // Compute the minimum common granularity and total size + const Symbol &first{*associated.front()}; + std::size_t maxLimit{0}; + for (const Symbol &s : associated) { + CHECK(s.offset() >= first.offset()); + auto limit{s.offset() + s.size()}; + if (limit > maxLimit) { + maxLimit = limit; + } + } + auto bytes{static_cast(maxLimit - first.offset())}; + Scope &scope{const_cast(first.owner())}; + // Combine the initializations of the associated objects. + // Apply all default initializations first. + SymbolDataInitialization combined{static_cast(bytes)}; + auto &foldingContext{exprAnalyzer.GetFoldingContext()}; + for (const Symbol &s : associated) { + if (!IsNamedConstant(s)) { + if (const auto *derived{HasDefaultInitialization(s)}) { + PopulateWithComponentDefaults( + combined, s.offset() - first.offset(), *derived, foldingContext, s); + } + } + } + if (!CheckForOverlappingInitialization(associated, combined, exprAnalyzer, + "Distinct default component initializations of equivalenced objects"s)) { + return false; + } + // Don't complain about overlap between explicit initializations and + // default initializations. + combined.initializedRanges.clear(); + // Now overlay all explicit initializations from DATA statements and + // from initializers in declarations. + for (const Symbol &symbol : associated) { + IncorporateExplicitInitialization( + combined, inits, symbol, first.offset(), foldingContext); + } + if (!CheckForOverlappingInitialization(associated, combined, exprAnalyzer, + "Explicit initializations of equivalenced objects"s)) { + return false; + } + // If the items are in static storage, save the final initialization. + if (std::find_if(associated.begin(), associated.end(), + [](SymbolRef ref) { return IsSaved(*ref); }) != associated.end()) { + // Create a compiler array temp that overlaps all the items. SourceName name{exprAnalyzer.context().GetTempName(scope)}; auto emplaced{ scope.try_emplace(name, Attrs{Attr::SAVE}, ObjectEntityDetails{})}; CHECK(emplaced.second); Symbol &combinedSymbol{*emplaced.first->second}; + combinedSymbol.set(Symbol::Flag::CompilerCreated); + inits.emplace(&combinedSymbol, std::move(combined)); auto &details{combinedSymbol.get()}; - combinedSymbol.set_offset(minStart); + combinedSymbol.set_offset(first.offset()); combinedSymbol.set_size(bytes); + std::size_t minElementBytes{ + ComputeMinElementBytes(associated, foldingContext)}; + if (!evaluate::IsValidKindOfIntrinsicType( + TypeCategory::Integer, minElementBytes) || + (bytes % minElementBytes) != 0) { + minElementBytes = 1; + } + const DeclTypeSpec &typeSpec{scope.MakeNumericType( + TypeCategory::Integer, KindExpr{minElementBytes})}; details.set_type(typeSpec); ArraySpec arraySpec; arraySpec.emplace_back(ShapeSpec::MakeExplicit(Bound{ bytes / static_cast(minElementBytes)})); details.set_shape(arraySpec); - if (commonBlock) { + if (const auto *commonBlock{FindCommonBlockContaining(first)}) { details.set_commonBlock(*commonBlock); } - // Merge these EQUIVALENCE'd DATA initializations, and remove the - // original initializations from the map. - auto combinedInit{ - inits.emplace(&combinedSymbol, static_cast(bytes))}; - evaluate::InitialImage &combined{combinedInit.first->second.image}; - combined.Incorporate(symbol.offset() - minStart, iter->second.image); - inits.erase(iter); - for (const Symbol *s : conflicts) { - auto sIter{inits.find(s)}; - CHECK(sIter != inits.end()); - combined.Incorporate(s->offset() - minStart, sIter->second.image); - inits.erase(sIter); - } - return true; // got one + // Add an EQUIVALENCE set to the scope so that the new object appears in + // the results of GetStorageAssociations(). + auto &newSet{scope.equivalenceSets().emplace_back()}; + newSet.emplace_back(combinedSymbol); + newSet.emplace_back(const_cast(first)); + } + return true; +} + +// When a statically-allocated derived type variable has no explicit +// initialization, but its type has at least one nonallocatable ultimate +// component with default initialization, make its initialization explicit. +[[maybe_unused]] static void MakeDefaultInitializationExplicit( + const Scope &scope, const std::list> &associations, + evaluate::FoldingContext &foldingContext, DataInitializations &inits) { + UnorderedSymbolSet equivalenced; + for (const std::list &association : associations) { + for (const Symbol &symbol : association) { + equivalenced.emplace(symbol); + } + } + for (const auto &pair : scope) { + const Symbol &symbol{*pair.second}; + if (!symbol.test(Symbol::Flag::InDataStmt) && + !HasDeclarationInitializer(symbol) && IsSaved(symbol) && + equivalenced.find(symbol) == equivalenced.end()) { + // Static object, no local storage association, no explicit initialization + if (const DerivedTypeSpec * derived{HasDefaultInitialization(symbol)}) { + auto newInitIter{inits.emplace(&symbol, symbol.size())}; + CHECK(newInitIter.second); + auto &newInit{newInitIter.first->second}; + PopulateWithComponentDefaults( + newInit, 0, *derived, foldingContext, symbol); + } + } } - return false; // no remaining EQUIVALENCE'd DATA initializations } -// Converts the initialization image for all the DATA statement appearances of -// a single symbol into an init() expression in the symbol table entry. +// Traverses the Scopes to: +// 1) combine initialization of equivalenced objects, & +// 2) optionally make initialization explicit for otherwise uninitialized static +// objects of derived types with default component initialization +// Returns false on error. +static bool ProcessScopes(const Scope &scope, + evaluate::ExpressionAnalyzer &exprAnalyzer, DataInitializations &inits) { + bool result{true}; // no error + switch (scope.kind()) { + case Scope::Kind::Global: + case Scope::Kind::Module: + case Scope::Kind::MainProgram: + case Scope::Kind::Subprogram: + case Scope::Kind::BlockData: + case Scope::Kind::Block: { + std::list> associations{GetStorageAssociations(scope)}; + for (const std::list &associated : associations) { + if (std::find_if(associated.begin(), associated.end(), [](SymbolRef ref) { + return IsInitialized(*ref); + }) != associated.end()) { + result &= + CombineEquivalencedInitialization(associated, exprAnalyzer, inits); + } + } + if constexpr (makeDefaultInitializationExplicit) { + MakeDefaultInitializationExplicit( + scope, associations, exprAnalyzer.GetFoldingContext(), inits); + } + for (const Scope &child : scope.children()) { + result &= ProcessScopes(child, exprAnalyzer, inits); + } + } break; + default:; + } + return result; +} + +// Converts the static initialization image for a single symbol with +// one or more DATA statement appearances. void ConstructInitializer(const Symbol &symbol, SymbolDataInitialization &initialization, evaluate::ExpressionAnalyzer &exprAnalyzer) { + std::list symbols{symbol}; + CheckForOverlappingInitialization( + symbols, initialization, exprAnalyzer, "DATA statement initializations"s); auto &context{exprAnalyzer.GetFoldingContext()}; - initialization.inits.sort(); - ConstantSubscript next{0}; - for (const auto &init : initialization.inits) { - if (init.start() < next) { - auto badDesignator{evaluate::OffsetToDesignator( - context, symbol, init.start(), init.size())}; - CHECK(badDesignator); - exprAnalyzer.Say(symbol.name(), - "DATA statement initializations affect '%s' more than once"_err_en_US, - badDesignator->AsFortran()); - } - next = init.start() + init.size(); - CHECK(next <= static_cast(initialization.image.size())); - } if (const auto *proc{symbol.detailsIf()}) { CHECK(IsProcedurePointer(symbol)); - const auto &procDesignator{initialization.image.AsConstantProcPointer()}; - CHECK(!procDesignator.GetComponent()); auto &mutableProc{const_cast(*proc)}; - mutableProc.set_init(DEREF(procDesignator.GetSymbol())); + if (MaybeExpr expr{initialization.image.AsConstantPointer()}) { + if (const auto *procDesignator{ + std::get_if(&expr->u)}) { + CHECK(!procDesignator->GetComponent()); + mutableProc.set_init(DEREF(procDesignator->GetSymbol())); + } else { + CHECK(evaluate::IsNullPointer(*expr)); + mutableProc.set_init(nullptr); + } + } else { + mutableProc.set_init(nullptr); + } } else if (const auto *object{symbol.detailsIf()}) { - if (auto symbolType{evaluate::DynamicType::From(symbol)}) { - auto &mutableObject{const_cast(*object)}; - if (IsPointer(symbol)) { + auto &mutableObject{const_cast(*object)}; + if (IsPointer(symbol)) { + if (auto ptr{initialization.image.AsConstantPointer()}) { + mutableObject.set_init(*ptr); + } else { + mutableObject.set_init(SomeExpr{evaluate::NullPointer{}}); + } + } else if (auto symbolType{evaluate::DynamicType::From(symbol)}) { + if (auto extents{evaluate::GetConstantExtents(context, symbol)}) { mutableObject.set_init( - initialization.image.AsConstantDataPointer(*symbolType)); + initialization.image.AsConstant(context, *symbolType, *extents)); } else { - if (auto extents{evaluate::GetConstantExtents(context, symbol)}) { - mutableObject.set_init( - initialization.image.AsConstant(context, *symbolType, *extents)); - } else { - exprAnalyzer.Say(symbol.name(), - "internal: unknown shape for '%s' while constructing initializer from DATA"_err_en_US, - symbol.name()); - return; - } + exprAnalyzer.Say(symbol.name(), + "internal: unknown shape for '%s' while constructing initializer from DATA"_err_en_US, + symbol.name()); + return; } } else { exprAnalyzer.Say(symbol.name(), @@ -552,10 +840,11 @@ void ConstructInitializer(const Symbol &symbol, void ConvertToInitializers( DataInitializations &inits, evaluate::ExpressionAnalyzer &exprAnalyzer) { - while (CombineSomeEquivalencedInits(inits, exprAnalyzer)) { - } - for (auto &[symbolPtr, initialization] : inits) { - ConstructInitializer(*symbolPtr, initialization, exprAnalyzer); + if (ProcessScopes( + exprAnalyzer.context().globalScope(), exprAnalyzer, inits)) { + for (auto &[symbolPtr, initialization] : inits) { + ConstructInitializer(*symbolPtr, initialization, exprAnalyzer); + } } } } // namespace Fortran::semantics diff --git a/flang/lib/Semantics/data-to-inits.h b/flang/lib/Semantics/data-to-inits.h index 87926fc957c59..fd07396d22099 100644 --- a/flang/lib/Semantics/data-to-inits.h +++ b/flang/lib/Semantics/data-to-inits.h @@ -28,8 +28,9 @@ class Symbol; struct SymbolDataInitialization { using Range = common::Interval; explicit SymbolDataInitialization(std::size_t bytes) : image{bytes} {} + SymbolDataInitialization(SymbolDataInitialization &&) = default; evaluate::InitialImage image; - std::list inits; + std::list initializedRanges; }; using DataInitializations = std::map; diff --git a/flang/lib/Semantics/mod-file.cpp b/flang/lib/Semantics/mod-file.cpp index 005342007302c..e93e4fbf1935a 100644 --- a/flang/lib/Semantics/mod-file.cpp +++ b/flang/lib/Semantics/mod-file.cpp @@ -184,11 +184,25 @@ bool ModFileWriter::PutSymbols(const Scope &scope) { std::string buf; // stuff after CONTAINS in derived type llvm::raw_string_ostream typeBindings{buf}; for (const Symbol &symbol : sorted) { - PutSymbol(typeBindings, symbol); + if (!symbol.test(Symbol::Flag::CompilerCreated)) { + PutSymbol(typeBindings, symbol); + } } for (const Symbol &symbol : uses) { PutUse(symbol); } + for (const auto &set : scope.equivalenceSets()) { + if (!set.empty() && + !set.front().symbol.test(Symbol::Flag::CompilerCreated)) { + char punctuation{'('}; + decls_ << "equivalence"; + for (const auto &object : set) { + decls_ << punctuation << object.AsFortran(); + punctuation = ','; + } + decls_ << ")\n"; + } + } if (auto str{typeBindings.str()}; !str.empty()) { CHECK(scope.IsDerivedType()); decls_ << "contains\n" << str; diff --git a/flang/lib/Semantics/resolve-names.cpp b/flang/lib/Semantics/resolve-names.cpp index 35c29818ae34e..ba0a2da50cc42 100644 --- a/flang/lib/Semantics/resolve-names.cpp +++ b/flang/lib/Semantics/resolve-names.cpp @@ -459,9 +459,8 @@ class ScopeHandler : public ImplicitRulesVisitor { Scope &currScope() { return DEREF(currScope_); } // The enclosing host procedure if current scope is in an internal procedure Scope *GetHostProcedure(); - // The enclosing scope, skipping blocks and derived types. - // TODO: Will return the scope of a FORALL or implied DO loop; is this ok? - // If not, should call FindProgramUnitContaining() instead. + // The innermost enclosing program unit scope, ignoring BLOCK and other + // construct scopes. Scope &InclusiveScope(); // The enclosing scope, skipping derived types. Scope &NonDerivedTypeScope(); @@ -2015,12 +2014,21 @@ void ScopeHandler::Say2(const parser::Name &name, MessageFixedText &&msg1, context().SetError(symbol, msg1.isFatal()); } -// T may be `Scope` or `const Scope` +// This is essentially GetProgramUnitContaining(), but it can return +// a mutable Scope &, it ignores statement functions, and it fails +// gracefully for error recovery (returning the original Scope). template static T &GetInclusiveScope(T &scope) { for (T *s{&scope}; !s->IsGlobal(); s = &s->parent()) { - if (s->kind() != Scope::Kind::Block && !s->IsDerivedType() && - !s->IsStmtFunction()) { - return *s; + switch (s->kind()) { + case Scope::Kind::Module: + case Scope::Kind::MainProgram: + case Scope::Kind::Subprogram: + case Scope::Kind::BlockData: + if (!s->IsStmtFunction()) { + return *s; + } + break; + default:; } } return scope; @@ -3757,7 +3765,7 @@ Symbol &DeclarationVisitor::DeclareUnknownEntity( bool DeclarationVisitor::HasCycle( const Symbol &procSymbol, const ProcInterface &interface) { - OrderedSymbolSet procsInCycle; + SourceOrderedSymbolSet procsInCycle; procsInCycle.insert(procSymbol); const ProcInterface *thisInterface{&interface}; bool haveInterface{true}; @@ -5390,7 +5398,7 @@ bool ConstructVisitor::Pre(const parser::DataImpliedDo &x) { } // Sets InDataStmt flag on a variable (or misidentified function) in a DATA -// statement so that the predicate IsStaticallyInitialized() will be true +// statement so that the predicate IsInitialized() will be true // during semantic analysis before the symbol's initializer is constructed. bool ConstructVisitor::Pre(const parser::DataIDoObject &x) { std::visit( diff --git a/flang/lib/Semantics/runtime-type-info.cpp b/flang/lib/Semantics/runtime-type-info.cpp index 045ced4514eaa..e7879c72060c2 100644 --- a/flang/lib/Semantics/runtime-type-info.cpp +++ b/flang/lib/Semantics/runtime-type-info.cpp @@ -264,11 +264,11 @@ static SomeExpr SaveNumericPointerTarget( object.set_shape(arraySpec); object.set_init(evaluate::AsGenericExpr(evaluate::Constant{ std::move(x), evaluate::ConstantSubscripts{elements}})); - const Symbol &symbol{ - *scope - .try_emplace( - name, Attrs{Attr::TARGET, Attr::SAVE}, std::move(object)) - .first->second}; + Symbol &symbol{*scope + .try_emplace(name, Attrs{Attr::TARGET, Attr::SAVE}, + std::move(object)) + .first->second}; + symbol.set(Symbol::Flag::CompilerCreated); return evaluate::AsGenericExpr( evaluate::Expr{evaluate::Designator{symbol}}); } @@ -301,11 +301,11 @@ static SomeExpr SaveDerivedPointerTarget(Scope &scope, SourceName name, object.set_init( evaluate::AsGenericExpr(evaluate::Constant{ derivedType, std::move(x), std::move(shape)})); - const Symbol &symbol{ - *scope - .try_emplace( - name, Attrs{Attr::TARGET, Attr::SAVE}, std::move(object)) - .first->second}; + Symbol &symbol{*scope + .try_emplace(name, Attrs{Attr::TARGET, Attr::SAVE}, + std::move(object)) + .first->second}; + symbol.set(Symbol::Flag::CompilerCreated); return evaluate::AsGenericExpr( evaluate::Designator{symbol}); } @@ -313,11 +313,12 @@ static SomeExpr SaveDerivedPointerTarget(Scope &scope, SourceName name, static SomeExpr SaveObjectInit( Scope &scope, SourceName name, const ObjectEntityDetails &object) { - const Symbol &symbol{*scope - .try_emplace(name, Attrs{Attr::TARGET, Attr::SAVE}, - ObjectEntityDetails{object}) - .first->second}; + Symbol &symbol{*scope + .try_emplace(name, Attrs{Attr::TARGET, Attr::SAVE}, + ObjectEntityDetails{object}) + .first->second}; CHECK(symbol.get().init().has_value()); + symbol.set(Symbol::Flag::CompilerCreated); return evaluate::AsGenericExpr( evaluate::Designator{symbol}); } @@ -615,6 +616,7 @@ Symbol &RuntimeTableBuilder::CreateObject( Attrs{Attr::TARGET, Attr::SAVE}, std::move(object))}; CHECK(pair.second); Symbol &result{*pair.first->second}; + result.set(Symbol::Flag::CompilerCreated); return result; } @@ -638,11 +640,11 @@ SomeExpr RuntimeTableBuilder::SaveNameAsPointerTarget( using Ascii = evaluate::Type; using AsciiExpr = evaluate::Expr; object.set_init(evaluate::AsGenericExpr(AsciiExpr{name})); - const Symbol &symbol{ - *scope - .try_emplace(SaveObjectName(".n."s + name), - Attrs{Attr::TARGET, Attr::SAVE}, std::move(object)) - .first->second}; + Symbol &symbol{*scope + .try_emplace(SaveObjectName(".n."s + name), + Attrs{Attr::TARGET, Attr::SAVE}, std::move(object)) + .first->second}; + symbol.set(Symbol::Flag::CompilerCreated); return evaluate::AsGenericExpr( AsciiExpr{evaluate::Designator{symbol}}); } @@ -819,6 +821,7 @@ bool RuntimeTableBuilder::InitializeDataPointer( ".dp."s + distinctName + "."s + symbol.name().ToString())}; Symbol &ptrDtSym{ *scope.try_emplace(ptrDtName, Attrs{}, UnknownDetails{}).first->second}; + ptrDtSym.set(Symbol::Flag::CompilerCreated); Scope &ptrDtScope{scope.MakeScope(Scope::Kind::DerivedType, &ptrDtSym)}; ignoreScopes_.insert(&ptrDtScope); ObjectEntityDetails ptrDtObj; diff --git a/flang/lib/Semantics/symbol.cpp b/flang/lib/Semantics/symbol.cpp index 8236e96ec1203..60e4572547857 100644 --- a/flang/lib/Semantics/symbol.cpp +++ b/flang/lib/Semantics/symbol.cpp @@ -676,4 +676,38 @@ bool GenericKind::Is(GenericKind::OtherKind x) const { return y && *y == x; } +bool SymbolOffsetCompare::operator()( + const SymbolRef &x, const SymbolRef &y) const { + const Symbol *xCommon{FindCommonBlockContaining(*x)}; + const Symbol *yCommon{FindCommonBlockContaining(*y)}; + if (xCommon) { + if (yCommon) { + const SymbolSourcePositionCompare sourceCmp; + if (sourceCmp(*xCommon, *yCommon)) { + return true; + } else if (sourceCmp(*yCommon, *xCommon)) { + return false; + } else if (x->offset() == y->offset()) { + return x->size() > y->size(); + } else { + return x->offset() < y->offset(); + } + } else { + return false; + } + } else if (yCommon) { + return true; + } else if (x->offset() == y->offset()) { + return x->size() > y->size(); + } else { + return x->offset() < y->offset(); + } + return x->GetSemanticsContext().allCookedSources().Precedes( + x->name(), y->name()); +} +bool SymbolOffsetCompare::operator()( + const MutableSymbolRef &x, const MutableSymbolRef &y) const { + return (*this)(SymbolRef{*x}, SymbolRef{*y}); +} + } // namespace Fortran::semantics diff --git a/flang/lib/Semantics/tools.cpp b/flang/lib/Semantics/tools.cpp index 7cd6382fea6d9..69d63310ca1bc 100644 --- a/flang/lib/Semantics/tools.cpp +++ b/flang/lib/Semantics/tools.cpp @@ -507,6 +507,18 @@ const DeclTypeSpec *FindParentTypeSpec(const Symbol &symbol) { return nullptr; } +const EquivalenceSet *FindEquivalenceSet(const Symbol &symbol) { + const Symbol &ultimate{symbol.GetUltimate()}; + for (const EquivalenceSet &set : ultimate.owner().equivalenceSets()) { + for (const EquivalenceObject &object : set) { + if (object.symbol == ultimate) { + return &set; + } + } + } + return nullptr; +} + bool IsExtensibleType(const DerivedTypeSpec *derived) { return derived && !IsIsoCType(derived) && !derived->typeSymbol().attrs().test(Attr::BIND_C) && @@ -569,34 +581,36 @@ bool CanBeTypeBoundProc(const Symbol *symbol) { } } -bool IsStaticallyInitialized(const Symbol &symbol, bool ignoreDATAstatements) { - if (!ignoreDATAstatements && symbol.test(Symbol::Flag::InDataStmt)) { - return true; - } else if (IsNamedConstant(symbol)) { +bool HasDeclarationInitializer(const Symbol &symbol) { + if (IsNamedConstant(symbol)) { return false; } else if (const auto *object{symbol.detailsIf()}) { return object->init().has_value(); } else if (const auto *proc{symbol.detailsIf()}) { return proc->init().has_value(); + } else { + return false; } - return false; } -bool IsInitialized(const Symbol &symbol, bool ignoreDATAstatements, - const Symbol *derivedTypeSymbol) { - if (IsStaticallyInitialized(symbol, ignoreDATAstatements) || - IsAllocatable(symbol)) { +bool IsInitialized(const Symbol &symbol, bool ignoreDataStatements) { + if (IsAllocatable(symbol) || + (!ignoreDataStatements && symbol.test(Symbol::Flag::InDataStmt)) || + HasDeclarationInitializer(symbol)) { return true; } else if (IsNamedConstant(symbol) || IsFunctionResult(symbol) || IsPointer(symbol)) { return false; } else if (const auto *object{symbol.detailsIf()}) { if (!object->isDummy() && object->type()) { - const auto *derived{object->type()->AsDerived()}; - // error recovery: avoid infinite recursion on invalid - // recursive usage of a derived type - return derived && &derived->typeSymbol() != derivedTypeSymbol && - derived->HasDefaultInitialization(); + if (const auto *derived{object->type()->AsDerived()}) { + DirectComponentIterator directs{*derived}; + return bool{std::find_if( + directs.begin(), directs.end(), [](const Symbol &component) { + return IsAllocatable(component) || + HasDeclarationInitializer(component); + })}; + } } } return false; @@ -788,6 +802,39 @@ bool IsExternal(const Symbol &symbol) { return ClassifyProcedure(symbol) == ProcedureDefinitionClass::External; } +// Most scopes have no EQUIVALENCE, and this function is a fast no-op for them. +std::list> GetStorageAssociations(const Scope &scope) { + UnorderedSymbolSet distinct; + for (const EquivalenceSet &set : scope.equivalenceSets()) { + for (const EquivalenceObject &object : set) { + distinct.emplace(object.symbol); + } + } + // This set is ordered by ascending offsets, with ties broken by greatest + // size. A multiset is used here because multiple symbols may have the + // same offset and size; the symbols in the set, however, are distinct. + std::multiset associated; + for (SymbolRef ref : distinct) { + associated.emplace(*ref); + } + std::list> result; + std::size_t limit{0}; + const Symbol *currentCommon{nullptr}; + for (const Symbol &symbol : associated) { + const Symbol *thisCommon{FindCommonBlockContaining(symbol)}; + if (result.empty() || symbol.offset() >= limit || + thisCommon != currentCommon) { + // Start a new group + result.emplace_back(std::list{}); + limit = 0; + currentCommon = thisCommon; + } + result.back().emplace_back(symbol); + limit = std::max(limit, symbol.offset() + symbol.size()); + } + return result; +} + bool IsModuleProcedure(const Symbol &symbol) { return ClassifyProcedure(symbol) == ProcedureDefinitionClass::Module; } diff --git a/flang/lib/Semantics/type.cpp b/flang/lib/Semantics/type.cpp index dc9be0022bb2e..69145b90c4e31 100644 --- a/flang/lib/Semantics/type.cpp +++ b/flang/lib/Semantics/type.cpp @@ -179,10 +179,8 @@ bool DerivedTypeSpec::IsForwardReferenced() const { bool DerivedTypeSpec::HasDefaultInitialization() const { DirectComponentIterator components{*this}; - return bool{std::find_if( - components.begin(), components.end(), [&](const Symbol &component) { - return IsInitialized(component, false, &typeSymbol()); - })}; + return bool{std::find_if(components.begin(), components.end(), + [&](const Symbol &component) { return IsInitialized(component); })}; } bool DerivedTypeSpec::HasDestruction() const { diff --git a/flang/runtime/io-stmt.cpp b/flang/runtime/io-stmt.cpp index fc1dcbf37e15d..cd4a6cc62cd58 100644 --- a/flang/runtime/io-stmt.cpp +++ b/flang/runtime/io-stmt.cpp @@ -243,6 +243,10 @@ int OpenStatementState::EndIoStatement() { } unit().isUnformatted = *isUnformatted_; } + if (!unit().isUnformatted) { + // Set default format (C.7.4 point 2). + unit().isUnformatted = unit().access != Access::Sequential; + } return ExternalIoStatementBase::EndIoStatement(); } @@ -969,7 +973,7 @@ bool InquireUnitState::Inquire( : "ASCII"; break; case HashInquiryKeyword("FORM"): - str = !unit().isUnformatted ? "UNKNOWN" + str = !unit().isUnformatted ? "UNDEFINED" : *unit().isUnformatted ? "UNFORMATTED" : "FORMATTED"; break; diff --git a/flang/test/Evaluate/folding19.f90 b/flang/test/Evaluate/folding19.f90 index 5940f25db5eec..8cfaeb155a150 100644 --- a/flang/test/Evaluate/folding19.f90 +++ b/flang/test/Evaluate/folding19.f90 @@ -43,5 +43,11 @@ subroutine s4 !CHECK: error: Invalid 'vector=' argument in PACK: the 'mask=' argument has 3 true elements, but the vector has only 2 elements x = pack(array, mask, [0,0]) end subroutine + subroutine s5 + logical, parameter :: mask(2,3) = reshape([.false., .true., .true., .false., .false., .true.], shape(mask)) + integer, parameter :: field(3,2) = reshape([(-j,j=1,6)], shape(field)) + integer :: x(2,3) + !CHECK: error: Invalid 'vector=' argument in UNPACK: the 'mask=' argument has 3 true elements, but the vector has only 2 elements + x = unpack([1,2], mask, 0) + end subroutine end module - diff --git a/flang/test/Evaluate/folding25.f90 b/flang/test/Evaluate/folding25.f90 new file mode 100644 index 0000000000000..a94565ff8fcab --- /dev/null +++ b/flang/test/Evaluate/folding25.f90 @@ -0,0 +1,10 @@ +! RUN: %S/test_folding.sh %s %t %flang_fc1 +! REQUIRES: shell +! Tests folding of UNPACK (valid cases) +module m + integer, parameter :: vector(*) = [1, 2, 3, 4] + integer, parameter :: field(2,3) = reshape([(-j,j=1,6)], shape(field)) + logical, parameter :: mask(*,*) = reshape([.false., .true., .true., .false., .false., .true.], shape(field)) + logical, parameter :: test_unpack_1 = all(unpack(vector, mask, 0) == reshape([0,1,2,0,0,3], shape(mask))) + logical, parameter :: test_unpack_2 = all(unpack(vector, mask, field) == reshape([-1,1,2,-4,-5,3], shape(mask))) +end module diff --git a/flang/test/Evaluate/folding26.f90 b/flang/test/Evaluate/folding26.f90 new file mode 100644 index 0000000000000..09fd08a0d6cfe --- /dev/null +++ b/flang/test/Evaluate/folding26.f90 @@ -0,0 +1,7 @@ +! RUN: %S/test_folding.sh %s %t %flang_fc1 +! REQUIRES: shell +! Tests folding of TRANSPOSE +module m + integer, parameter :: matrix(0:1,0:2) = reshape([1,2,3,4,5,6],shape(matrix)) + logical, parameter :: test_transpose_1 = all(transpose(matrix) == reshape([1,3,5,2,4,6],[3,2])) +end module diff --git a/flang/test/Semantics/data12.f90 b/flang/test/Semantics/data12.f90 new file mode 100644 index 0000000000000..0ceba176a8bc0 --- /dev/null +++ b/flang/test/Semantics/data12.f90 @@ -0,0 +1,35 @@ +! RUN: %S/test_errors.sh %s %t %flang_fc1 +! REQUIRES: shell +type :: t1 + sequence + integer :: m = 123 + integer :: pad +end type +type :: t2 + sequence + integer :: n = 123 + integer :: pad +end type +type :: t3 + sequence + integer :: k = 234 + integer :: pad +end type +!ERROR: Distinct default component initializations of equivalenced objects affect 'x1a%m' more than once +type(t1) :: x1a +!ERROR: Distinct default component initializations of equivalenced objects affect 'x2a%n' more than once +type(t2) :: x2a +!ERROR: Distinct default component initializations of equivalenced objects affect 'x3%k' more than once +type(t3), save :: x3 +!ERROR: Explicit initializations of equivalenced objects affect 'ja(2_8)' more than once +!ERROR: Explicit initializations of equivalenced objects affect 'ka(1_8)' more than once +integer :: ja(2), ka(2) +data ja/345, 456/ +data ka/456, 567/ +equivalence(x1a, x2a, x3) +! Same value: no error +type(t1) :: x1b +type(t2) :: x2b +equivalence(x1b, x2b) +equivalence(ja(2),ka(1)) +end diff --git a/flang/test/Semantics/data13.f90 b/flang/test/Semantics/data13.f90 new file mode 100644 index 0000000000000..4d7ecf9939e07 --- /dev/null +++ b/flang/test/Semantics/data13.f90 @@ -0,0 +1,32 @@ +! RUN: %flang_fc1 -fsyntax-only -fdebug-dump-symbols %s 2>&1 | FileCheck %s +! Verify that the closure of EQUIVALENCE'd symbols with any DATA +! initialization produces a combined initializer, with explicit +! initialization overriding any default component initialization. +! CHECK: .F18.0, SAVE (CompilerCreated) size=8 offset=0: ObjectEntity type: INTEGER(4) shape: 1_8:2_8 init:[INTEGER(4)::456_4,234_4] +! CHECK: ja (InDataStmt) size=8 offset=0: ObjectEntity type: INTEGER(4) shape: 1_8:2_8 +! CHECK-NOT: x0, SAVE size=8 offset=8: ObjectEntity type: TYPE(t1) init:t1(m=123_4,n=234_4) +! CHECK: x1 size=8 offset=16: ObjectEntity type: TYPE(t1) init:t1(m=345_4,n=234_4) +! CHECK: x2 size=8 offset=0: ObjectEntity type: TYPE(t1) +! CHECK-NOT: x3a, SAVE size=8 offset=24: ObjectEntity type: TYPE(t3) init:t3(t2=t2(k=567_4),j=0_4) +! CHECK: x3b size=8 offset=32: ObjectEntity type: TYPE(t3) init:t3(k=567_4,j=678_4) +! CHECK: Equivalence Sets: (x2,ja(1)) (.F18.0,x2) +type :: t1 + sequence + integer :: m = 123 + integer :: n = 234 +end type +type :: t2 + integer :: k = 567 +end type +type, extends(t2) :: t3 + integer :: j ! uninitialized +end type +type(t1), save :: x0 ! not enabled +type(t1) :: x1 = t1(m=345) +type(t1) :: x2 +type(t3), save :: x3a ! not enabled +type(t3) :: x3b = t3(j=678) +integer :: ja(2) +equivalence(x2, ja) +data ja(1)/456/ +end diff --git a/flang/test/Semantics/modfile26.f90 b/flang/test/Semantics/modfile26.f90 index e57c5378d161d..b0b751bf007b7 100644 --- a/flang/test/Semantics/modfile26.f90 +++ b/flang/test/Semantics/modfile26.f90 @@ -71,6 +71,7 @@ end module m1 !intrinsic::all !integer(4),parameter::intpvals(1_8:*)=[INTEGER(4)::0_4,2_4,3_4,4_4,5_4,9_4,10_4,18_4,19_4,38_4,39_4] !integer(4),parameter::intpkinds(1_8:*)=[INTEGER(4)::1_4,1_4,2_4,2_4,4_4,4_4,8_4,8_4,16_4,16_4,-1_4] +!intrinsic::selected_int_kind !intrinsic::size !logical(4),parameter::ipcheck=.true._4 !integer(4),parameter::realprecs(1_8:*)=[INTEGER(4)::3_4,2_4,6_4,15_4,18_4,33_4] @@ -78,6 +79,7 @@ end module m1 !logical(4),parameter::rpreccheck=.true._4 !integer(4),parameter::realpvals(1_8:*)=[INTEGER(4)::0_4,3_4,4_4,6_4,7_4,15_4,16_4,18_4,19_4,33_4,34_4] !integer(4),parameter::realpkinds(1_8:*)=[INTEGER(4)::2_4,2_4,4_4,4_4,8_4,8_4,10_4,10_4,16_4,16_4,-1_4] +!intrinsic::selected_real_kind !logical(4),parameter::realpcheck=.true._4 !integer(4),parameter::realranges(1_8:*)=[INTEGER(4)::4_4,37_4,37_4,307_4,4931_4,4931_4] !logical(4),parameter::rrangecheck=.true._4 diff --git a/flang/test/Semantics/test_symbols.py b/flang/test/Semantics/test_symbols.py index e284e340267a8..b82903fe44f2b 100755 --- a/flang/test/Semantics/test_symbols.py +++ b/flang/test/Semantics/test_symbols.py @@ -3,10 +3,14 @@ """Compiles a source file with "-fdebug-unparse-with-symbols' and verifies we get the right symbols in the output, i.e. the output should be the same as the input, except for the copyright comment. -Expects a source file passed as the first argument; -Expects the Flang frontend driver with options as second argument.""" + +Parameters: + sys.argv[1]: a source file with contains the input and expected output + sys.argv[2]: the Flang frontend driver + sys.argv[3:]: Optional arguments to the Flang frontend driver""" import sys +import tempfile import re import subprocess import common as cm @@ -36,7 +40,8 @@ # Compiles, inserting comments for symbols: cmd = [flang_fc1, *flang_fc1_args, flang_fc1_options] -diff3 = subprocess.check_output(cmd, input=diff2, universal_newlines=True) +with tempfile.TemporaryDirectory() as tmpdir: + diff3 = subprocess.check_output(cmd, input=diff2, universal_newlines=True, cwd=tmpdir) # Removes all whitespace to compare differences in files diff1 = diff1.replace(" ", "") diff --git a/flang/test/Semantics/typeinfo01.f90 b/flang/test/Semantics/typeinfo01.f90 index 52dd5d5d77b50..7c374bc0d5bcb 100644 --- a/flang/test/Semantics/typeinfo01.f90 +++ b/flang/test/Semantics/typeinfo01.f90 @@ -6,10 +6,10 @@ module m01 integer :: n end type !CHECK: Module scope: m01 -!CHECK: .c.t1, SAVE, TARGET: ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.n,genre=1_1,category=0_1,kind=4_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] -!CHECK: .dt.t1, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t1,sizeinbytes=4_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.t1,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .n.n, SAVE, TARGET: ObjectEntity type: CHARACTER(1_8,1) init:"n" -!CHECK: .n.t1, SAVE, TARGET: ObjectEntity type: CHARACTER(2_8,1) init:"t1" +!CHECK: .c.t1, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.n,genre=1_1,category=0_1,kind=4_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] +!CHECK: .dt.t1, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t1,sizeinbytes=4_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.t1,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .n.n, SAVE, TARGET (CompilerCreated): ObjectEntity type: CHARACTER(1_8,1) init:"n" +!CHECK: .n.t1, SAVE, TARGET (CompilerCreated): ObjectEntity type: CHARACTER(2_8,1) init:"t1" !CHECK: DerivedType scope: t1 end module @@ -20,10 +20,10 @@ module m02 type, extends(parent) :: child integer :: cn end type -!CHECK: .c.child, SAVE, TARGET: ObjectEntity type: TYPE(component) shape: 0_8:1_8 init:[component::component(name=.n.parent,genre=1_1,category=5_1,kind=0_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=.dt.parent,lenvalue=NULL(),bounds=NULL(),initialization=NULL()),component(name=.n.cn,genre=1_1,category=0_1,kind=4_1,rank=0_1,offset=4_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] -!CHECK: .c.parent, SAVE, TARGET: ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.pn,genre=1_1,category=0_1,kind=4_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] -!CHECK: .dt.child, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.child,sizeinbytes=8_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.child,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=1_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .dt.parent, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.parent,sizeinbytes=4_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.parent,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .c.child, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(component) shape: 0_8:1_8 init:[component::component(name=.n.parent,genre=1_1,category=5_1,kind=0_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=.dt.parent,lenvalue=NULL(),bounds=NULL(),initialization=NULL()),component(name=.n.cn,genre=1_1,category=0_1,kind=4_1,rank=0_1,offset=4_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] +!CHECK: .c.parent, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.pn,genre=1_1,category=0_1,kind=4_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] +!CHECK: .dt.child, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.child,sizeinbytes=8_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.child,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=1_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .dt.parent, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.parent,sizeinbytes=4_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.parent,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) end module module m03 @@ -32,11 +32,11 @@ module m03 real(kind=k) :: a end type type(kpdt(4)) :: x -!CHECK: .c.kpdt.0, SAVE, TARGET: ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.a,genre=1_1,category=1_1,kind=4_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] -!CHECK: .dt.kpdt, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(name=.n.kpdt,uninstantiated=NULL(),kindparameter=.kp.kpdt,lenparameterkind=NULL()) -!CHECK: .dt.kpdt.0, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.kpdt,sizeinbytes=4_8,uninstantiated=.dt.kpdt,kindparameter=.kp.kpdt.0,lenparameterkind=NULL(),component=.c.kpdt.0,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .kp.kpdt, SAVE, TARGET: ObjectEntity type: INTEGER(8) shape: 0_8:0_8 init:[INTEGER(8)::1_8] -!CHECK: .kp.kpdt.0, SAVE, TARGET: ObjectEntity type: INTEGER(8) shape: 0_8:0_8 init:[INTEGER(8)::4_8] +!CHECK: .c.kpdt.0, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.a,genre=1_1,category=1_1,kind=4_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL())] +!CHECK: .dt.kpdt, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(name=.n.kpdt,uninstantiated=NULL(),kindparameter=.kp.kpdt,lenparameterkind=NULL()) +!CHECK: .dt.kpdt.0, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.kpdt,sizeinbytes=4_8,uninstantiated=.dt.kpdt,kindparameter=.kp.kpdt.0,lenparameterkind=NULL(),component=.c.kpdt.0,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .kp.kpdt, SAVE, TARGET (CompilerCreated): ObjectEntity type: INTEGER(8) shape: 0_8:0_8 init:[INTEGER(8)::1_8] +!CHECK: .kp.kpdt.0, SAVE, TARGET (CompilerCreated): ObjectEntity type: INTEGER(8) shape: 0_8:0_8 init:[INTEGER(8)::4_8] end module module m04 @@ -49,8 +49,8 @@ module m04 subroutine s1(x) class(tbps), intent(in) :: x end subroutine -!CHECK: .dt.tbps, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.tbps,name=.n.tbps,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .v.tbps, SAVE, TARGET: ObjectEntity type: TYPE(binding) shape: 0_8:1_8 init:[binding::binding(proc=s1,name=.n.b1),binding(proc=s1,name=.n.b2)] +!CHECK: .dt.tbps, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.tbps,name=.n.tbps,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .v.tbps, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(binding) shape: 0_8:1_8 init:[binding::binding(proc=s1,name=.n.b1),binding(proc=s1,name=.n.b2)] end module module m05 @@ -61,8 +61,8 @@ module m05 subroutine s1(x) class(t), intent(in) :: x end subroutine -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=24_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=.p.t,special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=0_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .p.t, SAVE, TARGET: ObjectEntity type: TYPE(procptrcomponent) shape: 0_8:0_8 init:[procptrcomponent::procptrcomponent(name=.n.p1,offset=0_8,initialization=s1)] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=24_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=.p.t,special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=0_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .p.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(procptrcomponent) shape: 0_8:0_8 init:[procptrcomponent::procptrcomponent(name=.n.p1,offset=0_8,initialization=s1)] end module module m06 @@ -84,12 +84,12 @@ subroutine s2(x, y) class(t2), intent(out) :: x class(t), intent(in) :: y end subroutine -!CHECK: .c.t2, SAVE, TARGET: ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.t,genre=1_1,category=5_1,kind=0_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=.dt.t,lenvalue=NULL(),bounds=NULL(),initialization=NULL())] -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t,name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=2_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .dt.t2, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t2,name=.n.t2,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.t2,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=1_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .s.t, SAVE, TARGET: ObjectEntity type: TYPE(specialbinding) shape: 0_8:0_8 init:[specialbinding::specialbinding(which=1_1,isargdescriptorset=3_1,proc=s1)] -!CHECK: .v.t, SAVE, TARGET: ObjectEntity type: TYPE(binding) shape: 0_8:0_8 init:[binding::binding(proc=s1,name=.n.s1)] -!CHECK: .v.t2, SAVE, TARGET: ObjectEntity type: TYPE(binding) shape: 0_8:0_8 init:[binding::binding(proc=s2,name=.n.s1)] +!CHECK: .c.t2, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(component) shape: 0_8:0_8 init:[component::component(name=.n.t,genre=1_1,category=5_1,kind=0_1,rank=0_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=.dt.t,lenvalue=NULL(),bounds=NULL(),initialization=NULL())] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t,name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=2_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .dt.t2, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t2,name=.n.t2,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=.c.t2,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=1_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .s.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(specialbinding) shape: 0_8:0_8 init:[specialbinding::specialbinding(which=1_1,isargdescriptorset=3_1,proc=s1)] +!CHECK: .v.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(binding) shape: 0_8:0_8 init:[binding::binding(proc=s1,name=.n.s1)] +!CHECK: .v.t2, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(binding) shape: 0_8:0_8 init:[binding::binding(proc=s2,name=.n.s1)] end module module m07 @@ -103,9 +103,9 @@ impure elemental subroutine s1(x, y) class(t), intent(out) :: x class(t), intent(in) :: y end subroutine -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t,name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=4_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .s.t, SAVE, TARGET: ObjectEntity type: TYPE(specialbinding) shape: 0_8:0_8 init:[specialbinding::specialbinding(which=2_1,isargdescriptorset=3_1,proc=s1)] -!CHECK: .v.t, SAVE, TARGET: ObjectEntity type: TYPE(binding) shape: 0_8:0_8 init:[binding::binding(proc=s1,name=.n.s1)] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t,name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=4_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .s.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(specialbinding) shape: 0_8:0_8 init:[specialbinding::specialbinding(which=2_1,isargdescriptorset=3_1,proc=s1)] +!CHECK: .v.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(binding) shape: 0_8:0_8 init:[binding::binding(proc=s1,name=.n.s1)] end module module m08 @@ -123,8 +123,8 @@ subroutine s2(x) impure elemental subroutine s3(x) type(t) :: x end subroutine -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=3200_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=0_1,nofinalizationneeded=0_1) -!CHECK: .s.t, SAVE, TARGET: ObjectEntity type: TYPE(specialbinding) shape: 0_8:2_8 init:[specialbinding::specialbinding(which=7_1,isargdescriptorset=0_1,proc=s3),specialbinding(which=10_1,isargdescriptorset=1_1,proc=s1),specialbinding(which=11_1,isargdescriptorset=0_1,proc=s2)] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=3200_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=0_1,nofinalizationneeded=0_1) +!CHECK: .s.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(specialbinding) shape: 0_8:2_8 init:[specialbinding::specialbinding(which=7_1,isargdescriptorset=0_1,proc=s3),specialbinding(which=10_1,isargdescriptorset=1_1,proc=s1),specialbinding(which=11_1,isargdescriptorset=0_1,proc=s2)] end module module m09 @@ -165,9 +165,9 @@ subroutine wu(x,u,iostat,iomsg) integer, intent(out) :: iostat character(len=*), intent(inout) :: iomsg end subroutine -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t,name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=120_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .s.t, SAVE, TARGET: ObjectEntity type: TYPE(specialbinding) shape: 0_8:3_8 init:[specialbinding::specialbinding(which=3_1,isargdescriptorset=1_1,proc=rf),specialbinding(which=4_1,isargdescriptorset=1_1,proc=ru),specialbinding(which=5_1,isargdescriptorset=1_1,proc=wf),specialbinding(which=6_1,isargdescriptorset=1_1,proc=wu)] -!CHECK: .v.t, SAVE, TARGET: ObjectEntity type: TYPE(binding) shape: 0_8:3_8 init:[binding::binding(proc=rf,name=.n.rf),binding(proc=ru,name=.n.ru),binding(proc=wf,name=.n.wf),binding(proc=wu,name=.n.wu)] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=.v.t,name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=120_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .s.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(specialbinding) shape: 0_8:3_8 init:[specialbinding::specialbinding(which=3_1,isargdescriptorset=1_1,proc=rf),specialbinding(which=4_1,isargdescriptorset=1_1,proc=ru),specialbinding(which=5_1,isargdescriptorset=1_1,proc=wf),specialbinding(which=6_1,isargdescriptorset=1_1,proc=wu)] +!CHECK: .v.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(binding) shape: 0_8:3_8 init:[binding::binding(proc=rf,name=.n.rf),binding(proc=ru,name=.n.ru),binding(proc=wf,name=.n.wf),binding(proc=wu,name=.n.wu)] end module module m10 @@ -214,8 +214,8 @@ subroutine wu(x,u,iostat,iomsg) integer, intent(out) :: iostat character(len=*), intent(inout) :: iomsg end subroutine -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=120_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) -!CHECK: .s.t, SAVE, TARGET: ObjectEntity type: TYPE(specialbinding) shape: 0_8:3_8 init:[specialbinding::specialbinding(which=3_1,isargdescriptorset=0_1,proc=rf),specialbinding(which=4_1,isargdescriptorset=0_1,proc=ru),specialbinding(which=5_1,isargdescriptorset=0_1,proc=wf),specialbinding(which=6_1,isargdescriptorset=0_1,proc=wu)] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=0_8,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=NULL(),component=NULL(),procptr=NULL(),special=.s.t,specialbitset=120_4,hasparent=0_1,noinitializationneeded=1_1,nodestructionneeded=1_1,nofinalizationneeded=1_1) +!CHECK: .s.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(specialbinding) shape: 0_8:3_8 init:[specialbinding::specialbinding(which=3_1,isargdescriptorset=0_1,proc=rf),specialbinding(which=4_1,isargdescriptorset=0_1,proc=ru),specialbinding(which=5_1,isargdescriptorset=0_1,proc=wf),specialbinding(which=6_1,isargdescriptorset=0_1,proc=wu)] end module module m11 @@ -227,16 +227,16 @@ module m11 character(len=len) :: chauto real :: automatic(len) end type -!CHECK: .dt.t, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(name=.n.t,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=.lpk.t) -!CHECK: .lpk.t, SAVE, TARGET: ObjectEntity type: INTEGER(1) shape: 0_8:0_8 init:[INTEGER(1)::8_1] +!CHECK: .dt.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(name=.n.t,uninstantiated=NULL(),kindparameter=NULL(),lenparameterkind=.lpk.t) +!CHECK: .lpk.t, SAVE, TARGET (CompilerCreated): ObjectEntity type: INTEGER(1) shape: 0_8:0_8 init:[INTEGER(1)::8_1] contains subroutine s1(x) -!CHECK: .b.t.1.automatic, SAVE, TARGET: ObjectEntity type: TYPE(value) shape: 0_8:1_8,0_8:0_8 init:reshape([value::value(genre=2_1,value=1_8),value(genre=3_1,value=0_8)],shape=[2,1]) -!CHECK: .c.t.1, SAVE, TARGET: ObjectEntity type: TYPE(component) shape: 0_8:3_8 init:[component::component(name=.n.allocatable,genre=3_1,category=1_1,kind=4_1,rank=1_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL()),component(name=.n.pointer,genre=2_1,category=1_1,kind=4_1,rank=0_1,offset=48_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=.di.t.1.pointer),component(name=.n.chauto,genre=4_1,category=3_1,kind=1_1,rank=0_1,offset=72_8,characterlen=value(genre=3_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL()),component(name=.n.automatic,genre=4_1,category=1_1,kind=4_1,rank=1_1,offset=96_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=.b.t.1.automatic,initialization=NULL())] -!CHECK: .di.t.1.pointer, SAVE, TARGET: ObjectEntity type: TYPE(.dp.t.1.pointer) init:.dp.t.1.pointer(pointer=target) -!CHECK: .dp.t.1.pointer: DerivedType components: pointer -!CHECK: .dt.t.1, SAVE, TARGET: ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=144_8,uninstantiated=.dt.t,kindparameter=NULL(),lenparameterkind=.lpk.t.1,component=.c.t.1,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=0_1,nodestructionneeded=0_1,nofinalizationneeded=1_1) -!CHECK: .lpk.t.1, SAVE, TARGET: ObjectEntity type: INTEGER(1) shape: 0_8:0_8 init:[INTEGER(1)::8_1] +!CHECK: .b.t.1.automatic, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(value) shape: 0_8:1_8,0_8:0_8 init:reshape([value::value(genre=2_1,value=1_8),value(genre=3_1,value=0_8)],shape=[2,1]) +!CHECK: .c.t.1, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(component) shape: 0_8:3_8 init:[component::component(name=.n.allocatable,genre=3_1,category=1_1,kind=4_1,rank=1_1,offset=0_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL()),component(name=.n.pointer,genre=2_1,category=1_1,kind=4_1,rank=0_1,offset=48_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=.di.t.1.pointer),component(name=.n.chauto,genre=4_1,category=3_1,kind=1_1,rank=0_1,offset=72_8,characterlen=value(genre=3_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=NULL(),initialization=NULL()),component(name=.n.automatic,genre=4_1,category=1_1,kind=4_1,rank=1_1,offset=96_8,characterlen=value(genre=1_1,value=0_8),derived=NULL(),lenvalue=NULL(),bounds=.b.t.1.automatic,initialization=NULL())] +!CHECK: .di.t.1.pointer, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(.dp.t.1.pointer) init:.dp.t.1.pointer(pointer=target) +!CHECK: .dp.t.1.pointer (CompilerCreated): DerivedType components: pointer +!CHECK: .dt.t.1, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(derivedtype) init:derivedtype(binding=NULL(),name=.n.t,sizeinbytes=144_8,uninstantiated=.dt.t,kindparameter=NULL(),lenparameterkind=.lpk.t.1,component=.c.t.1,procptr=NULL(),special=NULL(),specialbitset=0_4,hasparent=0_1,noinitializationneeded=0_1,nodestructionneeded=0_1,nofinalizationneeded=1_1) +!CHECK: .lpk.t.1, SAVE, TARGET (CompilerCreated): ObjectEntity type: INTEGER(1) shape: 0_8:0_8 init:[INTEGER(1)::8_1] !CHECK: DerivedType scope: .dp.t.1.pointer size=24 alignment=8 instantiation of .dp.t.1.pointer !CHECK: pointer, POINTER size=24 offset=0: ObjectEntity type: REAL(4) type(t(*)), intent(in) :: x @@ -248,9 +248,9 @@ module m12 integer :: n integer :: n2 integer :: n_3 - ! CHECK: .n.n, SAVE, TARGET: ObjectEntity type: CHARACTER(1_8,1) init:"n" - ! CHECK: .n.n2, SAVE, TARGET: ObjectEntity type: CHARACTER(2_8,1) init:"n2" - ! CHECK: .n.n_3, SAVE, TARGET: ObjectEntity type: CHARACTER(3_8,1) init:"n_3" + ! CHECK: .n.n, SAVE, TARGET (CompilerCreated): ObjectEntity type: CHARACTER(1_8,1) init:"n" + ! CHECK: .n.n2, SAVE, TARGET (CompilerCreated): ObjectEntity type: CHARACTER(2_8,1) init:"n2" + ! CHECK: .n.n_3, SAVE, TARGET (CompilerCreated): ObjectEntity type: CHARACTER(3_8,1) init:"n_3" end type end module @@ -260,7 +260,7 @@ module m13 contains procedure :: assign1, assign2 generic :: assignment(=) => assign1, assign2 - ! CHECK: .s.t1, SAVE, TARGET: ObjectEntity type: TYPE(specialbinding) shape: 0_8:0_8 init:[specialbinding::specialbinding(which=2_1,isargdescriptorset=3_1,proc=assign1)] + ! CHECK: .s.t1, SAVE, TARGET (CompilerCreated): ObjectEntity type: TYPE(specialbinding) shape: 0_8:0_8 init:[specialbinding::specialbinding(which=2_1,isargdescriptorset=3_1,proc=assign1)] end type contains impure elemental subroutine assign1(to, from) diff --git a/libc/config/linux/api.td b/libc/config/linux/api.td index c68888ab3c700..ddcf9018f66db 100644 --- a/libc/config/linux/api.td +++ b/libc/config/linux/api.td @@ -344,6 +344,19 @@ def MtxT : TypeDecl<"mtx_t"> { }]; } +def CndT : TypeDecl<"cnd_t"> { + let Decl = [{ + typedef struct { + void *__qfront; + void *__qback; + struct { + unsigned char __w[4]; + int __t; + } __qmtx; + } cnd_t; + }]; +} + def ThreadStartT : TypeDecl<"thrd_start_t"> { let Decl = "typedef int (*thrd_start_t)(void *);"; } @@ -363,6 +376,7 @@ def ThreadsAPI : PublicAPI<"threads.h"> { OnceFlag, CallOnceFuncT, MtxT, + CndT, ThreadStartT, ]; diff --git a/libc/config/linux/x86_64/entrypoints.txt b/libc/config/linux/x86_64/entrypoints.txt index a4b8383b8eb35..59c5f5100f691 100644 --- a/libc/config/linux/x86_64/entrypoints.txt +++ b/libc/config/linux/x86_64/entrypoints.txt @@ -189,6 +189,11 @@ if(LLVM_LIBC_FULL_BUILD) # threads.h entrypoints libc.src.threads.call_once + libc.src.threads.cnd_broadcast + libc.src.threads.cnd_destroy + libc.src.threads.cnd_init + libc.src.threads.cnd_signal + libc.src.threads.cnd_wait libc.src.threads.mtx_destroy libc.src.threads.mtx_init libc.src.threads.mtx_lock diff --git a/libc/spec/spec.td b/libc/spec/spec.td index 55f75f28df3ac..9bb2925e84651 100644 --- a/libc/spec/spec.td +++ b/libc/spec/spec.td @@ -77,6 +77,8 @@ def OnceFlagTypePtr : PtrType; def CallOnceFuncType : NamedType<"__call_once_func_t">; def MtxTType : NamedType<"mtx_t">; def MtxTTypePtr : PtrType; +def CndTType : NamedType<"cnd_t">; +def CndTTypePtr : PtrType; def ThrdStartTType : NamedType<"thrd_start_t">; def ThrdTType : NamedType<"thrd_t">; def ThrdTTypePtr : PtrType; diff --git a/libc/spec/stdc.td b/libc/spec/stdc.td index 08ceea7e952a0..c50f9175fb697 100644 --- a/libc/spec/stdc.td +++ b/libc/spec/stdc.td @@ -549,6 +549,7 @@ def StdC : StandardSpec<"stdc"> { [ OnceFlagType, CallOnceFuncType, + CndTType, MtxTType, ThrdStartTType, ThrdTType, @@ -572,6 +573,42 @@ def StdC : StandardSpec<"stdc"> { ArgSpec, ] >, + FunctionSpec< + "cnd_broadcast", + RetValSpec, + [ + ArgSpec, + ] + >, + FunctionSpec< + "cnd_destroy", + RetValSpec, + [ + ArgSpec, + ] + >, + FunctionSpec< + "cnd_init", + RetValSpec, + [ + ArgSpec, + ] + >, + FunctionSpec< + "cnd_signal", + RetValSpec, + [ + ArgSpec, + ] + >, + FunctionSpec< + "cnd_wait", + RetValSpec, + [ + ArgSpec, + ArgSpec, + ] + >, FunctionSpec< "mtx_init", RetValSpec, diff --git a/libc/src/string/strcpy.cpp b/libc/src/string/strcpy.cpp index d081d6c497dfd..d5b72d9d92f6f 100644 --- a/libc/src/string/strcpy.cpp +++ b/libc/src/string/strcpy.cpp @@ -11,13 +11,25 @@ #include "src/string/string_utils.h" #include "src/__support/common.h" +#include "src/__support/sanitizer.h" namespace __llvm_libc { LLVM_LIBC_FUNCTION(char *, strcpy, (char *__restrict dest, const char *__restrict src)) { - return reinterpret_cast( - __llvm_libc::memcpy(dest, src, internal::string_length(src) + 1)); + size_t size = internal::string_length(src) + 1; + char *result = reinterpret_cast(__llvm_libc::memcpy(dest, src, size)); + + // In many libc uses, we do not want memcpy to be instrumented. Hence, + // we mark the destination as initialized. + // + // We do not want memcpy to be instrumented because compilers can potentially + // generate calls to memcpy. If the sanitizer business logic ends up with a + // compiler generated call to memcpy which is instrumented, then it will + // break the sanitizers. + SANITIZER_MEMORY_INITIALIZED(result, size); + + return result; } } // namespace __llvm_libc diff --git a/libc/src/threads/CMakeLists.txt b/libc/src/threads/CMakeLists.txt index a5d9589e44f33..de72701bef759 100644 --- a/libc/src/threads/CMakeLists.txt +++ b/libc/src/threads/CMakeLists.txt @@ -50,3 +50,38 @@ add_entrypoint_object( DEPENDS .${LIBC_TARGET_OS}.mtx_unlock ) + +add_entrypoint_object( + cnd_init + ALIAS + DEPENDS + .${LIBC_TARGET_OS}.cnd_init +) + +add_entrypoint_object( + cnd_destroy + ALIAS + DEPENDS + .${LIBC_TARGET_OS}.cnd_destroy +) + +add_entrypoint_object( + cnd_wait + ALIAS + DEPENDS + .${LIBC_TARGET_OS}.cnd_wait +) + +add_entrypoint_object( + cnd_signal + ALIAS + DEPENDS + .${LIBC_TARGET_OS}.cnd_signal +) + +add_entrypoint_object( + cnd_broadcast + ALIAS + DEPENDS + .${LIBC_TARGET_OS}.cnd_broadcast +) diff --git a/libc/src/threads/cnd_broadcast.h b/libc/src/threads/cnd_broadcast.h new file mode 100644 index 0000000000000..219341bc44981 --- /dev/null +++ b/libc/src/threads/cnd_broadcast.h @@ -0,0 +1,20 @@ +//===-- Implementation header for cnd_broadcast function --------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_THREADS_CND_BROADCAST_H +#define LLVM_LIBC_SRC_THREADS_CND_BROADCAST_H + +#include "include/threads.h" + +namespace __llvm_libc { + +int cnd_broadcast(cnd_t *cond); + +} // namespace __llvm_libc + +#endif // LLVM_LIBC_SRC_THREADS_CND_BROADCAST_H diff --git a/libc/src/threads/cnd_destroy.h b/libc/src/threads/cnd_destroy.h new file mode 100644 index 0000000000000..4fa1ea18b5e29 --- /dev/null +++ b/libc/src/threads/cnd_destroy.h @@ -0,0 +1,20 @@ +//===-- Implementation header for cnd_destroy function ----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_THREADS_CND_DESTROY_H +#define LLVM_LIBC_SRC_THREADS_CND_DESTROY_H + +#include "include/threads.h" + +namespace __llvm_libc { + +void cnd_destroy(cnd_t *cond); + +} // namespace __llvm_libc + +#endif // LLVM_LIBC_SRC_THREADS_CND_DESTROY_H diff --git a/libc/src/threads/cnd_init.h b/libc/src/threads/cnd_init.h new file mode 100644 index 0000000000000..8c14c88342e37 --- /dev/null +++ b/libc/src/threads/cnd_init.h @@ -0,0 +1,20 @@ +//===-- Implementation header for cnd_init function -------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_THREADS_CND_INIT_H +#define LLVM_LIBC_SRC_THREADS_CND_INIT_H + +#include "include/threads.h" + +namespace __llvm_libc { + +int cnd_init(cnd_t *cond); + +} // namespace __llvm_libc + +#endif // LLVM_LIBC_SRC_THREADS_CND_INIT_H diff --git a/libc/src/threads/cnd_signal.h b/libc/src/threads/cnd_signal.h new file mode 100644 index 0000000000000..d85802dda4845 --- /dev/null +++ b/libc/src/threads/cnd_signal.h @@ -0,0 +1,20 @@ +//===-- Implementation header for cnd_signal function -----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_THREADS_CND_SIGNAL_H +#define LLVM_LIBC_SRC_THREADS_CND_SIGNAL_H + +#include "include/threads.h" + +namespace __llvm_libc { + +int cnd_signal(cnd_t *cond); + +} // namespace __llvm_libc + +#endif // LLVM_LIBC_SRC_THREADS_CND_SIGNAL_H diff --git a/libc/src/threads/cnd_wait.h b/libc/src/threads/cnd_wait.h new file mode 100644 index 0000000000000..5f9ac08846767 --- /dev/null +++ b/libc/src/threads/cnd_wait.h @@ -0,0 +1,20 @@ +//===-- Implementation header for cnd_wait function -------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_THREADS_CND_WAIT_H +#define LLVM_LIBC_SRC_THREADS_CND_WAIT_H + +#include "include/threads.h" + +namespace __llvm_libc { + +int cnd_wait(cnd_t *cond, mtx_t *mutex); + +} // namespace __llvm_libc + +#endif // LLVM_LIBC_SRC_THREADS_CND_WAIT_H diff --git a/libc/src/threads/linux/CMakeLists.txt b/libc/src/threads/linux/CMakeLists.txt index b28850b94d8f2..abf38fabb8aeb 100644 --- a/libc/src/threads/linux/CMakeLists.txt +++ b/libc/src/threads/linux/CMakeLists.txt @@ -113,3 +113,58 @@ add_entrypoint_object( .threads_utils libc.include.threads ) + +add_entrypoint_object( + cnd_init + SRCS + cnd_init.cpp + HDRS + ../cnd_init.h + DEPENDS + .threads_utils + libc.include.threads +) + +add_entrypoint_object( + cnd_destroy + SRCS + cnd_destroy.cpp + HDRS + ../cnd_destroy.h + DEPENDS + .threads_utils + libc.include.threads +) + +add_entrypoint_object( + cnd_wait + SRCS + cnd_wait.cpp + HDRS + ../cnd_wait.h + DEPENDS + .threads_utils + libc.include.threads +) + +add_entrypoint_object( + cnd_signal + SRCS + cnd_signal.cpp + HDRS + ../cnd_signal.h + DEPENDS + .threads_utils + libc.include.threads +) + +add_entrypoint_object( + cnd_broadcast + SRCS + cnd_broadcast.cpp + HDRS + ../cnd_broadcast.h + DEPENDS + .threads_utils + libc.include.threads +) diff --git a/libc/src/threads/linux/cnd_broadcast.cpp b/libc/src/threads/linux/cnd_broadcast.cpp new file mode 100644 index 0000000000000..e10f9fa6c228c --- /dev/null +++ b/libc/src/threads/linux/cnd_broadcast.cpp @@ -0,0 +1,16 @@ +//===-- Linux implementation of the cnd_broadcast function ----------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/threads/cnd_broadcast.h" +#include "src/__support/common.h" + +namespace __llvm_libc { + +LLVM_LIBC_FUNCTION(int, cnd_broadcast, (cnd_t * cond)) { return thrd_success; } + +} // namespace __llvm_libc diff --git a/libc/src/threads/linux/cnd_destroy.cpp b/libc/src/threads/linux/cnd_destroy.cpp new file mode 100644 index 0000000000000..ac8a852a97394 --- /dev/null +++ b/libc/src/threads/linux/cnd_destroy.cpp @@ -0,0 +1,16 @@ +//===-- Linux implementation of the cnd_destroy function ------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/threads/cnd_destroy.h" +#include "src/__support/common.h" + +namespace __llvm_libc { + +LLVM_LIBC_FUNCTION(void, cnd_destroy, (cnd_t * cond)) { } + +} // namespace __llvm_libc diff --git a/libc/src/threads/linux/cnd_init.cpp b/libc/src/threads/linux/cnd_init.cpp new file mode 100644 index 0000000000000..f034695227b7e --- /dev/null +++ b/libc/src/threads/linux/cnd_init.cpp @@ -0,0 +1,16 @@ +//===-- Linux implementation of the cnd_init function ---------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/threads/cnd_init.h" +#include "src/__support/common.h" + +namespace __llvm_libc { + +LLVM_LIBC_FUNCTION(int, cnd_init, (cnd_t * cond)) { return thrd_success; } + +} // namespace __llvm_libc diff --git a/libc/src/threads/linux/cnd_signal.cpp b/libc/src/threads/linux/cnd_signal.cpp new file mode 100644 index 0000000000000..8ef16a355e7b0 --- /dev/null +++ b/libc/src/threads/linux/cnd_signal.cpp @@ -0,0 +1,16 @@ +//===-- Linux implementation of the cnd_signal function -------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/threads/cnd_signal.h" +#include "src/__support/common.h" + +namespace __llvm_libc { + +LLVM_LIBC_FUNCTION(int, cnd_signal, (cnd_t * cond)) { return thrd_success; } + +} // namespace __llvm_libc diff --git a/libc/src/threads/linux/cnd_wait.cpp b/libc/src/threads/linux/cnd_wait.cpp new file mode 100644 index 0000000000000..e2dda46d2dc9c --- /dev/null +++ b/libc/src/threads/linux/cnd_wait.cpp @@ -0,0 +1,18 @@ +//===-- Linux implementation of the cnd_wait function ---------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/threads/cnd_wait.h" +#include "src/__support/common.h" + +namespace __llvm_libc { + +LLVM_LIBC_FUNCTION(int, cnd_wait, (cnd_t * cond, mtx_t *mutex)) { + return thrd_success; +} + +} // namespace __llvm_libc diff --git a/libcxx/CMakeLists.txt b/libcxx/CMakeLists.txt index 0f4c886604c57..c85caa52318f4 100644 --- a/libcxx/CMakeLists.txt +++ b/libcxx/CMakeLists.txt @@ -599,7 +599,6 @@ function(cxx_add_warning_flags target) -Wno-user-defined-literals -Wno-covered-switch-default -Wno-suggest-override - -Wno-ignored-attributes # FIXME: Caused by _LIBCPP_NODEBUG_TYPE not being supported on older clangs ) if (LIBCXX_TARGETING_CLANG_CL) target_add_compile_flags_if_supported(${target} PRIVATE diff --git a/libcxx/TODO.TXT b/libcxx/TODO.TXT index cf489d29149d1..4742b5b0ddc21 100644 --- a/libcxx/TODO.TXT +++ b/libcxx/TODO.TXT @@ -16,60 +16,9 @@ Test Suite Tasks * Improve the quality and portability of the locale test data. * Convert failure tests to use Clang Verify. -Filesystem Tasks -================ -* P0492r2 - Implement National body comments for Filesystem - * INCOMPLETE - US 25: has_filename() is equivalent to just !empty() - * INCOMPLETE - US 31: Everything is defined in terms of one implicit host system - * INCOMPLETE - US 32: Meaning of 27.10.2.1 unclear - * INCOMPLETE - US 33: Definition of canonical path problematic - * INCOMPLETE - US 34: Are there attributes of a file that are not an aspect of the file system? - * INCOMPLETE - US 35: What synchronization is required to avoid a file system race? - * INCOMPLETE - US 36: Symbolic links themselves are attached to a directory via (hard) links - * INCOMPLETE - US 37: The term “redundant current directory (dot) elements” is not defined - * INCOMPLETE - US 38: Duplicates §17.3.16 - * INCOMPLETE - US 39: Remove note: Dot and dot-dot are not directories - * INCOMPLETE - US 40: Not all directories have a parent. - * INCOMPLETE - US 41: The term “parent directory” for a (non-directory) file is unusual - * INCOMPLETE - US 42: Pathname resolution does not always resolve a symlink - * INCOMPLETE - US 43: Concerns about encoded character types - * INCOMPLETE - US 44: Definition of path in terms of a string requires leaky abstraction - * INCOMPLETE - US 45: Generic format portability compromised by unspecified root-name - * INCOMPLETE - US 46: filename can be empty so productions for relative-path are redundant - * INCOMPLETE - US 47: “.” and “..” already match the name production - * INCOMPLETE - US 48: Multiple separators are often meaningful in a root-name - * INCOMPLETE - US 49: What does “method of conversion method” mean? - * INCOMPLETE - US 50: 27.10.8.1 ¶ 1.4 largely redundant with ¶ 1.3 - * INCOMPLETE - US 51: Failing to add / when appending empty string prevents useful apps - * INCOMPLETE - US 52: remove_filename() postcondition is not by itself a definition - * INCOMPLETE - US 53: remove_filename()'s name does not correspond to its behavior - * INCOMPLETE - US 54: remove_filename() is broken - * INCOMPLETE - US 55: replace_extension()'s use of path as parameter is inappropriate - * INCOMPLETE - US 56: Remove replace_extension()'s conditional addition of period - * INCOMPLETE - US 57: On Windows, absolute paths will sort in among relative paths - * INCOMPLETE - US 58: parent_path() behavior for root paths is useless - * INCOMPLETE - US 59: filename() returning path for single path components is bizarre - * INCOMPLETE - US 60: path("/foo/").filename()==path(".") is surprising - * INCOMPLETE - US 61: Leading dots in filename() should not begin an extension - * INCOMPLETE - US 62: It is important that stem()+extension()==filename() - * INCOMPLETE - US 63: lexically_normal() inconsistently treats trailing "/" but not "/.." as directory - * INCOMPLETE - US 73, CA 2: root-name is effectively implementation defined - * INCOMPLETE - US 74, CA 3: The term “pathname” is ambiguous in some contexts - * INCOMPLETE - US 75, CA 4: Extra flag in path constructors is needed - * INCOMPLETE - US 76, CA 5: root-name definition is over-specified. - * INCOMPLETE - US 77, CA 6: operator/ and other appends not useful if arg has root-name - * INCOMPLETE - US 78, CA 7: Member absolute() in 27.10.4.1 is overspecified for non-POSIX-like O/S - * INCOMPLETE - US 79, CA 8: Some operation functions are overspecified for implementation-defined file types - * INCOMPLETE - US 185: Fold error_code and non-error_code signatures into one signature - * INCOMPLETE - FI 14: directory_entry comparisons are members - * INCOMPLETE - Late 36: permissions() error_code overload should be noexcept - * INCOMPLETE - Late 37: permissions() actions should be separate parameter - * INCOMPLETE - Late 42: resize_file() Postcondition missing argument - Misc Tasks ========== * Find all sequences of >2 underscores and eradicate them. * run clang-tidy on libc++ * Document the "conditionally-supported" bits of libc++ -* Look at basic_string's move assignment operator, re LWG 2063 and POCMA * Put a static_assert in std::allocator to deny const/volatile types (LWG 2447) diff --git a/libcxx/docs/Status/Cxx14.rst b/libcxx/docs/Status/Cxx14.rst index 0990cdaeba3ac..0557bdc285d70 100644 --- a/libcxx/docs/Status/Cxx14.rst +++ b/libcxx/docs/Status/Cxx14.rst @@ -48,5 +48,3 @@ Library Working Group Issues Status :file: Cxx14Issues.csv :header-rows: 1 :widths: auto - -Last Updated: 25-Mar-2014 diff --git a/libcxx/docs/Status/Cxx17.rst b/libcxx/docs/Status/Cxx17.rst index 16f19b7c7d067..05f97101b1bd4 100644 --- a/libcxx/docs/Status/Cxx17.rst +++ b/libcxx/docs/Status/Cxx17.rst @@ -53,5 +53,3 @@ Library Working Group Issues Status :file: Cxx17Issues.csv :header-rows: 1 :widths: auto - -Last Updated: 17-Nov-2020 diff --git a/libcxx/docs/Status/Cxx20.rst b/libcxx/docs/Status/Cxx20.rst index 304f69f26f552..d59fd8a8b35f7 100644 --- a/libcxx/docs/Status/Cxx20.rst +++ b/libcxx/docs/Status/Cxx20.rst @@ -40,7 +40,7 @@ Paper Status .. note:: - .. [#note-P0600] P0600: The missing bits in P0600 are in |sect|\ [mem.res.class], |sect|\ [mem.poly.allocator.class], and |sect|\ [container.node.overview]. + .. [#note-P0600] P0600: The missing bits in P0600 are in |sect|\ [mem.res.class] and |sect|\ [mem.poly.allocator.class]. .. [#note-P0966] P0966: It was previously erroneously marked as complete in version 8.0. See `bug 45368 `__. .. [#note-P0619] P0619: Only sections D.8, D.9, D.10 and D.13 are implemented. Sections D.4, D.7, D.11, D.12, and D.14 remain undone. .. [#note-P0883] P0883: shared_ptr and floating-point changes weren't applied as they themselves aren't implemented yet. @@ -55,5 +55,3 @@ Library Working Group Issues Status :file: Cxx20Issues.csv :header-rows: 1 :widths: auto - -Last Updated: 24-May-2021 diff --git a/libcxx/docs/Status/Cxx20Issues.csv b/libcxx/docs/Status/Cxx20Issues.csv index a362f53ce1986..67729a3ccbe19 100644 --- a/libcxx/docs/Status/Cxx20Issues.csv +++ b/libcxx/docs/Status/Cxx20Issues.csv @@ -259,14 +259,14 @@ "`3340 `__","Formatting functions should throw on argument/format string mismatch in |sect|\ [format.functions]","Prague","","" "`3346 `__","``pair``\ and ``tuple``\ copy and move constructor have backwards specification","Prague","","" "`3347 `__","``std::pair``\ now requires ``T``\ and ``U``\ to be less-than-comparable","Prague","","" -"`3348 `__","``__cpp_lib_unwrap_ref``\ in wrong header","Prague","Complete","12.0" +"`3348 `__","``__cpp_lib_unwrap_ref``\ in wrong header","Prague","|Complete|","12.0" "`3349 `__","Missing ``__cpp_lib_constexpr_complex``\ for P0415R1","Prague","","" "`3350 `__","Simplify return type of ``lexicographical_compare_three_way``\ ","Prague","","" "`3351 `__","``ranges::enable_safe_range``\ should not be constrained","Prague","","" "`3352 `__","``strong_equality``\ isn't a thing","Prague","","" "`3354 `__","``has_strong_structural_equality``\ has a meaningless definition","Prague","","" "`3355 `__","The memory algorithms should support move-only input iterators introduced by P1207","Prague","","" -"`3356 `__","``__cpp_lib_nothrow_convertible``\ should be ``__cpp_lib_is_nothrow_convertible``\ ","Prague","","" +"`3356 `__","``__cpp_lib_nothrow_convertible``\ should be ``__cpp_lib_is_nothrow_convertible``\ ","Prague","|Complete|","12.0" "`3358 `__","|sect|\ [span.cons] is mistaken that ``to_address``\ can throw","Prague","","" "`3359 `__","````\ leap second support should allow for negative leap seconds","Prague","","" "`3360 `__","``three_way_comparable_with``\ is inconsistent with similar concepts","Prague","","" @@ -275,7 +275,7 @@ "`3364 `__","Initialize data members of ranges and their iterators","Prague","","" "`3367 `__","Integer-class conversions should not throw","Prague","","" "`3369 `__","``span``\ 's deduction-guide for built-in arrays doesn't work","Prague","","" -"`3371 `__","``visit_format_arg``\ and ``make_format_args``\ are not hidden friends","Prague","","" +"`3371 `__","``visit_format_arg``\ and ``make_format_args``\ are not hidden friends","Prague","|Complete|","14.0" "`3372 `__","``vformat_to``\ should not try to deduce ``Out``\ twice","Prague","","" "`3373 `__","``{to,from}_chars_result``\ and ``format_to_n_result``\ need the ""we really mean what we say"" wording","Prague","","" "`3374 `__","P0653 + P1006 should have made the other ``std::to_address``\ overload ``constexpr``\ ","Prague","|Complete|","12.0" diff --git a/libcxx/docs/Status/Cxx2b.rst b/libcxx/docs/Status/Cxx2b.rst index 1f5730c6576da..de891629300dd 100644 --- a/libcxx/docs/Status/Cxx2b.rst +++ b/libcxx/docs/Status/Cxx2b.rst @@ -46,5 +46,3 @@ Library Working Group Issues Status :file: Cxx2bIssues.csv :header-rows: 1 :widths: auto - -Last Updated: 22-July-2021 diff --git a/libcxx/docs/Status/Format.rst b/libcxx/docs/Status/Format.rst index 948b1b744ae45..35d8adfcaaa87 100644 --- a/libcxx/docs/Status/Format.rst +++ b/libcxx/docs/Status/Format.rst @@ -39,10 +39,6 @@ Misc. Items and TODOs (Please mark all Format-related TODO comments with the string ``TODO FMT``, so we can find them easily.) - * C++23 may break the ABI with `P2216 `_. - This ABI break may be backported to C++20. Therefore the library will not - be available on platforms where the ABI break is an issue. - Paper and Issue Status ====================== diff --git a/libcxx/include/CMakeLists.txt b/libcxx/include/CMakeLists.txt index 07faed956dfc6..33bc1ec0a6141 100644 --- a/libcxx/include/CMakeLists.txt +++ b/libcxx/include/CMakeLists.txt @@ -128,7 +128,11 @@ set(files __config __debug __errc + __format/format_arg.h + __format/format_args.h + __format/format_context.h __format/format_error.h + __format/format_fwd.h __format/format_parse_context.h __function_like.h __functional_base diff --git a/libcxx/include/__availability b/libcxx/include/__availability index 13d11950fd67a..87d43ed414bfb 100644 --- a/libcxx/include/__availability +++ b/libcxx/include/__availability @@ -139,9 +139,9 @@ // # define _LIBCPP_AVAILABILITY_DISABLE_FTM___cpp_lib_semaphore // This controls the availability of the C++20 format library. - // The library is in development and not ABI stable yet. Currently - // P2216 is aiming to be retroactively accepted in C++20. This paper - // contains ABI breaking changes. + // The library is in development and not ABI stable yet. P2216 is + // retroactively accepted in C++20. This paper contains ABI breaking + // changes. # define _LIBCPP_AVAILABILITY_FORMAT // # define _LIBCPP_AVAILABILITY_DISABLE_FTM___cpp_lib_format @@ -238,9 +238,9 @@ # endif // This controls the availability of the C++20 format library. - // The library is in development and not ABI stable yet. Currently - // P2216 is aiming to be retroactively accepted in C++20. This paper - // contains ABI breaking changes. + // The library is in development and not ABI stable yet. P2216 is + // retroactively accepted in C++20. This paper contains ABI breaking + // changes. # define _LIBCPP_AVAILABILITY_FORMAT \ __attribute__((unavailable)) # define _LIBCPP_AVAILABILITY_DISABLE_FTM___cpp_lib_format diff --git a/libcxx/include/__concepts/arithmetic.h b/libcxx/include/__concepts/arithmetic.h index 4568f79bb7f83..9a1383904db62 100644 --- a/libcxx/include/__concepts/arithmetic.h +++ b/libcxx/include/__concepts/arithmetic.h @@ -34,6 +34,13 @@ concept unsigned_integral = integral<_Tp> && !signed_integral<_Tp>; template concept floating_point = is_floating_point_v<_Tp>; +// Concept helpers for the internal type traits for the fundamental types. + +template +concept __libcpp_unsigned_integer = __libcpp_is_unsigned_integer<_Tp>::value; +template +concept __libcpp_signed_integer = __libcpp_is_signed_integer<_Tp>::value; + #endif // _LIBCPP_STD_VER > 17 && !defined(_LIBCPP_HAS_NO_CONCEPTS) _LIBCPP_END_NAMESPACE_STD diff --git a/libcxx/include/__config b/libcxx/include/__config index 1b56dc59c4c0b..2275bcc706d0d 100644 --- a/libcxx/include/__config +++ b/libcxx/include/__config @@ -24,16 +24,6 @@ #ifdef __cplusplus -#ifdef __GNUC__ -# define _GNUC_VER (__GNUC__ * 100 + __GNUC_MINOR__) -// The _GNUC_VER_NEW macro better represents the new GCC versioning scheme -// introduced in GCC 5.0. -# define _GNUC_VER_NEW (_GNUC_VER * 10 + __GNUC_PATCHLEVEL__) -#else -# define _GNUC_VER 0 -# define _GNUC_VER_NEW 0 -#endif - #define _LIBCPP_VERSION 14000 #ifndef _LIBCPP_ABI_VERSION @@ -509,22 +499,8 @@ typedef __char32_t char32_t; #define _LIBCPP_DISABLE_UBSAN_UNSIGNED_INTEGER_CHECK __attribute__((__no_sanitize__("unsigned-integer-overflow"))) #endif -#if __has_builtin(__builtin_launder) -#define _LIBCPP_COMPILER_HAS_BUILTIN_LAUNDER -#endif - -#if __has_builtin(__builtin_constant_p) -#define _LIBCPP_COMPILER_HAS_BUILTIN_CONSTANT_P -#endif - #define _LIBCPP_ALWAYS_INLINE __attribute__ ((__always_inline__)) -// Literal operators ""d and ""y are supported starting with LLVM Clang 8 and AppleClang 10.0.1 -#if (defined(_LIBCPP_CLANG_VER) && _LIBCPP_CLANG_VER < 800) || \ - (defined(_LIBCPP_APPLE_CLANG_VER) && _LIBCPP_APPLE_CLANG_VER < 1001) -#define _LIBCPP_HAS_NO_CXX20_CHRONO_LITERALS -#endif - #define _LIBCPP_DISABLE_EXTENSION_WARNING __extension__ #elif defined(_LIBCPP_COMPILER_GCC) @@ -547,11 +523,6 @@ typedef __char32_t char32_t; #define _LIBCPP_HAS_NO_ASAN #endif -#if _GNUC_VER >= 700 -#define _LIBCPP_COMPILER_HAS_BUILTIN_LAUNDER -#define _LIBCPP_COMPILER_HAS_BUILTIN_CONSTANT_P -#endif - #define _LIBCPP_ALWAYS_INLINE __attribute__ ((__always_inline__)) #define _LIBCPP_DISABLE_EXTENSION_WARNING __extension__ @@ -1275,7 +1246,7 @@ extern "C" _LIBCPP_FUNC_VIS void __sanitizer_annotate_contiguous_container( # define _LIBCPP_FALLTHROUGH() [[fallthrough]] #elif __has_cpp_attribute(clang::fallthrough) # define _LIBCPP_FALLTHROUGH() [[clang::fallthrough]] -#elif __has_attribute(fallthrough) || _GNUC_VER >= 700 +#elif __has_attribute(__fallthrough__) # define _LIBCPP_FALLTHROUGH() __attribute__((__fallthrough__)) #else # define _LIBCPP_FALLTHROUGH() ((void)0) @@ -1287,12 +1258,6 @@ extern "C" _LIBCPP_FUNC_VIS void __sanitizer_annotate_contiguous_container( #define _LIBCPP_NODEBUG #endif -#if __has_attribute(__nodebug__) && (defined(_LIBCPP_CLANG_VER) && _LIBCPP_CLANG_VER >= 900) -# define _LIBCPP_NODEBUG_TYPE __attribute__((nodebug)) -#else -# define _LIBCPP_NODEBUG_TYPE -#endif - #if __has_attribute(__standalone_debug__) #define _LIBCPP_STANDALONE_DEBUG __attribute__((__standalone_debug__)) #else @@ -1386,12 +1351,6 @@ extern "C" _LIBCPP_FUNC_VIS void __sanitizer_annotate_contiguous_container( # define _LIBCPP_FOPEN_CLOEXEC_MODE #endif -#ifdef _LIBCPP_COMPILER_HAS_BUILTIN_CONSTANT_P -#define _LIBCPP_BUILTIN_CONSTANT_P(x) __builtin_constant_p(x) -#else -#define _LIBCPP_BUILTIN_CONSTANT_P(x) false -#endif - // Support for _FILE_OFFSET_BITS=64 landed gradually in Android, so the full set // of functions used in cstdio may not be available for low API levels when // using 64-bit file offsets on LP32. diff --git a/libcxx/include/__format/format_arg.h b/libcxx/include/__format/format_arg.h new file mode 100644 index 0000000000000..a9a8c1f0da031 --- /dev/null +++ b/libcxx/include/__format/format_arg.h @@ -0,0 +1,256 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FORMAT_FORMAT_ARG_H +#define _LIBCPP___FORMAT_FORMAT_ARG_H + +#include <__concepts/arithmetic.h> +#include <__config> +#include <__format/format_error.h> +#include <__format/format_fwd.h> +#include <__functional_base> +#include <__variant/monostate.h> +#include +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 17 + +// TODO FMT Remove this once we require compilers with proper C++20 support. +// If the compiler has no concepts support, the format header will be disabled. +// Without concepts support enable_if needs to be used and that too much effort +// to support compilers with partial C++20 support. +#if !defined(_LIBCPP_HAS_NO_CONCEPTS) + +namespace __format { +/** The type stored in @ref basic_format_arg. */ +enum class _LIBCPP_ENUM_VIS __arg_t : uint8_t { + __none, + __boolean, + __char_type, + __int, + __long_long, +#ifndef _LIBCPP_HAS_NO_INT128 + __i128, +#endif + __unsigned, + __unsigned_long_long, +#ifndef _LIBCPP_HAS_NO_INT128 + __u128, +#endif + __float, + __double, + __long_double, + __const_char_type_ptr, + __string_view, + __ptr +}; +} // namespace __format + +template +_LIBCPP_HIDE_FROM_ABI _LIBCPP_AVAILABILITY_FORMAT decltype(auto) +visit_format_arg(_Visitor&& __vis, basic_format_arg<_Context> __arg) { + switch (__arg.__type_) { + case __format::__arg_t::__none: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), monostate{}); + case __format::__arg_t::__boolean: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__boolean); + case __format::__arg_t::__char_type: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__char_type); + case __format::__arg_t::__int: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__int); + case __format::__arg_t::__long_long: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__long_long); +#ifndef _LIBCPP_HAS_NO_INT128 + case __format::__arg_t::__i128: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__i128); +#endif + case __format::__arg_t::__unsigned: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__unsigned); + case __format::__arg_t::__unsigned_long_long: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), + __arg.__unsigned_long_long); +#ifndef _LIBCPP_HAS_NO_INT128 + case __format::__arg_t::__u128: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__u128); +#endif + case __format::__arg_t::__float: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__float); + case __format::__arg_t::__double: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__double); + case __format::__arg_t::__long_double: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__long_double); + case __format::__arg_t::__const_char_type_ptr: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), + __arg.__const_char_type_ptr); + case __format::__arg_t::__string_view: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__string_view); + case __format::__arg_t::__ptr: + return _VSTD::invoke(_VSTD::forward<_Visitor>(__vis), __arg.__ptr); + } + _LIBCPP_UNREACHABLE(); +} + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_AVAILABILITY_FORMAT basic_format_arg { +public: + // TODO FMT Define the handle class. + class handle; + + _LIBCPP_HIDE_FROM_ABI basic_format_arg() noexcept + : __type_{__format::__arg_t::__none} {} + + _LIBCPP_HIDE_FROM_ABI explicit operator bool() const noexcept { + return __type_ != __format::__arg_t::__none; + } + +private: + using char_type = typename _Context::char_type; + + // TODO FMT Implement constrain [format.arg]/4 + // Constraints: The template specialization + // typename Context::template formatter_type + // meets the Formatter requirements ([formatter.requirements]). The extent + // to which an implementation determines that the specialization meets the + // Formatter requirements is unspecified, except that as a minimum the + // expression + // typename Context::template formatter_type() + // .format(declval(), declval()) + // shall be well-formed when treated as an unevaluated operand. + + template + _LIBCPP_HIDE_FROM_ABI + _LIBCPP_AVAILABILITY_FORMAT friend __format_arg_store<_Ctx, _Args...> + _VSTD::make_format_args(const _Args&...); + + template + _LIBCPP_HIDE_FROM_ABI _LIBCPP_AVAILABILITY_FORMAT friend decltype(auto) + _VSTD::visit_format_arg(_Visitor&& __vis, basic_format_arg<_Ctx> __arg); + + union { + bool __boolean; + char_type __char_type; + int __int; + unsigned __unsigned; + long long __long_long; + unsigned long long __unsigned_long_long; +#ifndef _LIBCPP_HAS_NO_INT128 + __int128_t __i128; + __uint128_t __u128; +#endif + float __float; + double __double; + long double __long_double; + const char_type* __const_char_type_ptr; + basic_string_view __string_view; + const void* __ptr; + // TODO FMT Add the handle. + }; + __format::__arg_t __type_; + + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(bool __v) noexcept + : __boolean(__v), __type_(__format::__arg_t::__boolean) {} + + template + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(_Tp __v) noexcept + requires(same_as<_Tp, char_type> || + (same_as<_Tp, char> && same_as)) + : __char_type(__v), __type_(__format::__arg_t::__char_type) {} + + template <__libcpp_signed_integer _Tp> + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(_Tp __v) noexcept { + if constexpr (sizeof(_Tp) <= sizeof(int)) { + __int = static_cast(__v); + __type_ = __format::__arg_t::__int; + } else if constexpr (sizeof(_Tp) <= sizeof(long long)) { + __long_long = static_cast(__v); + __type_ = __format::__arg_t::__long_long; + } +#ifndef _LIBCPP_HAS_NO_INT128 + else if constexpr (sizeof(_Tp) == sizeof(__int128_t)) { + __i128 = __v; + __type_ = __format::__arg_t::__i128; + } +#endif + else + static_assert(sizeof(_Tp) == 0, "An unsupported signed integer was used"); + } + + template <__libcpp_unsigned_integer _Tp> + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(_Tp __v) noexcept { + if constexpr (sizeof(_Tp) <= sizeof(unsigned)) { + __unsigned = static_cast(__v); + __type_ = __format::__arg_t::__unsigned; + } else if constexpr (sizeof(_Tp) <= sizeof(unsigned long long)) { + __unsigned_long_long = static_cast(__v); + __type_ = __format::__arg_t::__unsigned_long_long; + } +#ifndef _LIBCPP_HAS_NO_INT128 + else if constexpr (sizeof(_Tp) == sizeof(__int128_t)) { + __u128 = __v; + __type_ = __format::__arg_t::__u128; + } +#endif + else + static_assert(sizeof(_Tp) == 0, + "An unsupported unsigned integer was used"); + } + + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(float __v) noexcept + : __float(__v), __type_(__format::__arg_t::__float) {} + + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(double __v) noexcept + : __double(__v), __type_(__format::__arg_t::__double) {} + + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(long double __v) noexcept + : __long_double(__v), __type_(__format::__arg_t::__long_double) {} + + // Note not a 'noexcept' function. + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg(const char_type* __s) + : __const_char_type_ptr(__s), + __type_(__format::__arg_t::__const_char_type_ptr) { + _LIBCPP_ASSERT(__s, "Used a nullptr argument to initialize a C-string"); + } + + template + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg( + basic_string_view __s) noexcept + : __string_view{__s.data(), __s.size()}, + __type_(__format::__arg_t::__string_view) {} + + template + _LIBCPP_HIDE_FROM_ABI explicit basic_format_arg( + const basic_string& __s) noexcept + : __string_view{__s.data(), __s.size()}, + __type_(__format::__arg_t::__string_view) {} + + _LIBCPP_HIDE_FROM_ABI + explicit basic_format_arg(nullptr_t) noexcept + : __ptr(nullptr), __type_(__format::__arg_t::__ptr) {} + + // TODO FMT Implement the _Tp* constructor. +}; + +#endif // !defined(_LIBCPP_HAS_NO_CONCEPTS) + +#endif //_LIBCPP_STD_VER > 17 + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___FORMAT_FORMAT_ARG_H diff --git a/libcxx/include/__format/format_args.h b/libcxx/include/__format/format_args.h new file mode 100644 index 0000000000000..0a26b95d1b476 --- /dev/null +++ b/libcxx/include/__format/format_args.h @@ -0,0 +1,71 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FORMAT_FORMAT_ARGS_H +#define _LIBCPP___FORMAT_FORMAT_ARGS_H + +#include <__availability> +#include <__config> +#include <__format/format_fwd.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 17 + +// TODO FMT Remove this once we require compilers with proper C++20 support. +// If the compiler has no concepts support, the format header will be disabled. +// Without concepts support enable_if needs to be used and that too much effort +// to support compilers with partial C++20 support. +#if !defined(_LIBCPP_HAS_NO_CONCEPTS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_AVAILABILITY_FORMAT basic_format_args { +public: + // TODO FMT Implement [format.args]/5 + // [Note 1: Implementations are encouraged to optimize the representation of + // basic_format_args for small number of formatting arguments by storing + // indices of type alternatives separately from values and packing the + // former. - end note] + // Note: Change __format_arg_store to use a built-in array. + _LIBCPP_HIDE_FROM_ABI basic_format_args() noexcept = default; + + template + _LIBCPP_HIDE_FROM_ABI basic_format_args( + const __format_arg_store<_Context, _Args...>& __store) noexcept + : __size_(sizeof...(_Args)), __data_(__store.__args.data()) {} + + _LIBCPP_HIDE_FROM_ABI + basic_format_arg<_Context> get(size_t __id) const noexcept { + return __id < __size_ ? __data_[__id] : basic_format_arg<_Context>{}; + } + + _LIBCPP_HIDE_FROM_ABI size_t __size() const noexcept { return __size_; } + +private: + size_t __size_{0}; + const basic_format_arg<_Context>* __data_{nullptr}; +}; + +#endif // !defined(_LIBCPP_HAS_NO_CONCEPTS) + +#endif //_LIBCPP_STD_VER > 17 + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___FORMAT_FORMAT_ARGS_H diff --git a/libcxx/include/__format/format_context.h b/libcxx/include/__format/format_context.h new file mode 100644 index 0000000000000..e277aa0f9dea7 --- /dev/null +++ b/libcxx/include/__format/format_context.h @@ -0,0 +1,160 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FORMAT_FORMAT_CONTEXT_H +#define _LIBCPP___FORMAT_FORMAT_CONTEXT_H + +#include <__availability> +#include <__config> +#include <__format/format_args.h> +#include <__format/format_fwd.h> +#include <__iterator/concepts.h> +#include +#include +#include + +#ifndef _LIBCPP_HAS_NO_LOCALIZATION +#include +#include +#endif + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 17 + +// TODO FMT Remove this once we require compilers with proper C++20 support. +// If the compiler has no concepts support, the format header will be disabled. +// Without concepts support enable_if needs to be used and that too much effort +// to support compilers with partial C++20 support. +#if !defined(_LIBCPP_HAS_NO_CONCEPTS) + +template +requires output_iterator<_OutIt, const _CharT&> +class _LIBCPP_TEMPLATE_VIS _LIBCPP_AVAILABILITY_FORMAT basic_format_context; + +#ifndef _LIBCPP_HAS_NO_LOCALIZATION +/** + * Helper to create a basic_format_context. + * + * This is needed since the constructor is private. + */ +template +_LIBCPP_HIDE_FROM_ABI basic_format_context<_OutIt, _CharT> +__format_context_create( + _OutIt __out_it, + basic_format_args> __args, + optional<_VSTD::locale>&& __loc = nullopt) { + return _VSTD::basic_format_context(_VSTD::move(__out_it), __args, + _VSTD::move(__loc)); +} +#else +template +_LIBCPP_HIDE_FROM_ABI basic_format_context<_OutIt, _CharT> +__format_context_create( + _OutIt __out_it, + basic_format_args> __args) { + return _VSTD::basic_format_context(_VSTD::move(__out_it), __args); +} +#endif + +template +requires output_iterator<_OutIt, const _CharT&> +class _LIBCPP_TEMPLATE_VIS _LIBCPP_AVAILABILITY_FORMAT basic_format_context { +public: + using iterator = _OutIt; + using char_type = _CharT; + template + using formatter_type = formatter<_Tp, _CharT>; + + basic_format_context(const basic_format_context&) = delete; + basic_format_context& operator=(const basic_format_context&) = delete; + + _LIBCPP_HIDE_FROM_ABI basic_format_arg + arg(size_t __id) const { + return __args_.get(__id); + } +#ifndef _LIBCPP_HAS_NO_LOCALIZATION + _LIBCPP_HIDE_FROM_ABI _VSTD::locale locale() { + if (!__loc_) + __loc_ = _VSTD::locale{}; + return *__loc_; + } +#endif + _LIBCPP_HIDE_FROM_ABI iterator out() { return __out_it_; } + _LIBCPP_HIDE_FROM_ABI void advance_to(iterator __it) { __out_it_ = __it; } + +private: + iterator __out_it_; + basic_format_args __args_; +#ifndef _LIBCPP_HAS_NO_LOCALIZATION + + // The Standard doesn't specify how the locale is stored. + // [format.context]/6 + // std::locale locale(); + // Returns: The locale passed to the formatting function if the latter + // takes one, and std::locale() otherwise. + // This is done by storing the locale of the constructor in this optional. If + // locale() is called and the optional has no value the value will be created. + // This allows the implementation to lazily create the locale. + // TODO FMT Validate whether lazy creation is the best solution. + optional<_VSTD::locale> __loc_; + + template + friend _LIBCPP_HIDE_FROM_ABI basic_format_context<__OutIt, __CharT> + _VSTD::__format_context_create( + __OutIt, basic_format_args>, + optional<_VSTD::locale>&&); + + // Note: the Standard doesn't specify the required constructors. + _LIBCPP_HIDE_FROM_ABI + explicit basic_format_context(_OutIt __out_it, + basic_format_args __args, + optional<_VSTD::locale>&& __loc) + : __out_it_(_VSTD::move(__out_it)), __args_(__args), + __loc_(_VSTD::move(__loc)) {} +#else + template + friend _LIBCPP_HIDE_FROM_ABI basic_format_context<__OutIt, __CharT> + _VSTD::__format_context_create( + __OutIt, basic_format_args>); + + _LIBCPP_HIDE_FROM_ABI + explicit basic_format_context(_OutIt __out_it, + basic_format_args __args) + : __out_it_(_VSTD::move(__out_it)), __args_(__args) {} +#endif +}; + +// TODO FMT Implement [format.context]/4 +// [Note 1: For a given type charT, implementations are encouraged to provide a +// single instantiation of basic_format_context for appending to +// basic_string, vector, or any other container with contiguous +// storage by wrapping those in temporary objects with a uniform interface +// (such as a span) and polymorphic reallocation. - end note] + +using format_context = basic_format_context, char>; +using wformat_context = + basic_format_context, wchar_t>; + +#endif // !defined(_LIBCPP_HAS_NO_CONCEPTS) + +#endif //_LIBCPP_STD_VER > 17 + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___FORMAT_FORMAT_CONTEXT_H diff --git a/libcxx/include/__format/format_fwd.h b/libcxx/include/__format/format_fwd.h new file mode 100644 index 0000000000000..7da30aec51884 --- /dev/null +++ b/libcxx/include/__format/format_fwd.h @@ -0,0 +1,56 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FORMAT_FORMAT_FWD_H +#define _LIBCPP___FORMAT_FORMAT_FWD_H + +#include <__availability> +#include <__config> +#include <__iterator/concepts.h> +#include <__utility/forward.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 17 + +// TODO FMT Remove this once we require compilers with proper C++20 support. +// If the compiler has no concepts support, the format header will be disabled. +// Without concepts support enable_if needs to be used and that too much effort +// to support compilers with partial C++20 support. +#if !defined(_LIBCPP_HAS_NO_CONCEPTS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_AVAILABILITY_FORMAT basic_format_arg; + +template +struct _LIBCPP_TEMPLATE_VIS __format_arg_store; + +template +_LIBCPP_HIDE_FROM_ABI __format_arg_store<_Ctx, _Args...> +make_format_args(const _Args&...); + +template +struct _LIBCPP_TEMPLATE_VIS _LIBCPP_AVAILABILITY_FORMAT formatter; + +#endif // !defined(_LIBCPP_HAS_NO_CONCEPTS) + +#endif //_LIBCPP_STD_VER > 17 + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___FORMAT_FORMAT_FWD_H diff --git a/libcxx/include/__functional/function.h b/libcxx/include/__functional/function.h index 386f8aaf075d7..dff44fc674d5f 100644 --- a/libcxx/include/__functional/function.h +++ b/libcxx/include/__functional/function.h @@ -127,8 +127,8 @@ class __alloc_func<_Fp, _Ap, _Rp(_ArgTypes...)> __compressed_pair<_Fp, _Ap> __f_; public: - typedef _LIBCPP_NODEBUG_TYPE _Fp _Target; - typedef _LIBCPP_NODEBUG_TYPE _Ap _Alloc; + typedef _LIBCPP_NODEBUG _Fp _Target; + typedef _LIBCPP_NODEBUG _Ap _Alloc; _LIBCPP_INLINE_VISIBILITY const _Target& __target() const { return __f_.first(); } @@ -205,7 +205,7 @@ class __default_alloc_func<_Fp, _Rp(_ArgTypes...)> { _Fp __f_; public: - typedef _LIBCPP_NODEBUG_TYPE _Fp _Target; + typedef _LIBCPP_NODEBUG _Fp _Target; _LIBCPP_INLINE_VISIBILITY const _Target& __target() const { return __f_; } diff --git a/libcxx/include/__functional/hash.h b/libcxx/include/__functional/hash.h index 95605b3856e80..f8bcda014a5da 100644 --- a/libcxx/include/__functional/hash.h +++ b/libcxx/include/__functional/hash.h @@ -836,29 +836,29 @@ _LIBCPP_SUPPRESS_DEPRECATED_POP #ifndef _LIBCPP_CXX03_LANG template -using __check_hash_requirements _LIBCPP_NODEBUG_TYPE = integral_constant::value && is_move_constructible<_Hash>::value && __invokable_r::value >; template > -using __has_enabled_hash _LIBCPP_NODEBUG_TYPE = integral_constant::value && is_default_constructible<_Hash>::value >; #if _LIBCPP_STD_VER > 14 template -using __enable_hash_helper_imp _LIBCPP_NODEBUG_TYPE = _Type; +using __enable_hash_helper_imp _LIBCPP_NODEBUG = _Type; template -using __enable_hash_helper _LIBCPP_NODEBUG_TYPE = __enable_hash_helper_imp<_Type, +using __enable_hash_helper _LIBCPP_NODEBUG = __enable_hash_helper_imp<_Type, typename enable_if<__all<__has_enabled_hash<_Keys>::value...>::value>::type >; #else template -using __enable_hash_helper _LIBCPP_NODEBUG_TYPE = _Type; +using __enable_hash_helper _LIBCPP_NODEBUG = _Type; #endif #endif // !_LIBCPP_CXX03_LANG diff --git a/libcxx/include/__functional/unwrap_ref.h b/libcxx/include/__functional/unwrap_ref.h index e49adec5f8c1c..dc309add90df3 100644 --- a/libcxx/include/__functional/unwrap_ref.h +++ b/libcxx/include/__functional/unwrap_ref.h @@ -18,13 +18,13 @@ _LIBCPP_BEGIN_NAMESPACE_STD template -struct __unwrap_reference { typedef _LIBCPP_NODEBUG_TYPE _Tp type; }; +struct __unwrap_reference { typedef _LIBCPP_NODEBUG _Tp type; }; template class reference_wrapper; template -struct __unwrap_reference > { typedef _LIBCPP_NODEBUG_TYPE _Tp& type; }; +struct __unwrap_reference > { typedef _LIBCPP_NODEBUG _Tp& type; }; template struct decay; diff --git a/libcxx/include/__functional/weak_result_type.h b/libcxx/include/__functional/weak_result_type.h index 2ee85acf1ef4d..32b1e0b1c6c45 100644 --- a/libcxx/include/__functional/weak_result_type.h +++ b/libcxx/include/__functional/weak_result_type.h @@ -89,7 +89,7 @@ struct __weak_result_type_imp // bool is true : public __maybe_derive_from_unary_function<_Tp>, public __maybe_derive_from_binary_function<_Tp> { - typedef _LIBCPP_NODEBUG_TYPE typename _Tp::result_type result_type; + typedef _LIBCPP_NODEBUG typename _Tp::result_type result_type; }; template @@ -110,19 +110,19 @@ struct __weak_result_type template struct __weak_result_type<_Rp ()> { - typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; + typedef _LIBCPP_NODEBUG _Rp result_type; }; template struct __weak_result_type<_Rp (&)()> { - typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; + typedef _LIBCPP_NODEBUG _Rp result_type; }; template struct __weak_result_type<_Rp (*)()> { - typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; + typedef _LIBCPP_NODEBUG _Rp result_type; }; // 1 argument case diff --git a/libcxx/include/__iterator/concepts.h b/libcxx/include/__iterator/concepts.h index 27474a37293fd..531acdf0a5b2c 100644 --- a/libcxx/include/__iterator/concepts.h +++ b/libcxx/include/__iterator/concepts.h @@ -171,7 +171,6 @@ concept contiguous_iterator = derived_from<_ITER_CONCEPT<_Ip>, contiguous_iterator_tag> && is_lvalue_reference_v> && same_as, remove_cvref_t>> && - (is_pointer_v<_Ip> || requires { sizeof(__pointer_traits_element_type<_Ip>); }) && requires(const _Ip& __i) { { _VSTD::to_address(__i) } -> same_as>>; }; diff --git a/libcxx/include/__iterator/insert_iterator.h b/libcxx/include/__iterator/insert_iterator.h index 9e41319d48772..33117419881bd 100644 --- a/libcxx/include/__iterator/insert_iterator.h +++ b/libcxx/include/__iterator/insert_iterator.h @@ -14,6 +14,7 @@ #include <__iterator/iterator.h> #include <__iterator/iterator_traits.h> #include <__memory/addressof.h> +#include <__ranges/access.h> #include <__utility/move.h> #include @@ -23,6 +24,14 @@ _LIBCPP_BEGIN_NAMESPACE_STD +#if _LIBCPP_STD_VER > 17 && !defined(_LIBCPP_HAS_NO_RANGES) +template +using __insert_iterator_iter_t = ranges::iterator_t<_Container>; +#else +template +using __insert_iterator_iter_t = typename _Container::iterator; +#endif + _LIBCPP_SUPPRESS_DEPRECATED_PUSH template class _LIBCPP_TEMPLATE_VIS insert_iterator @@ -33,7 +42,7 @@ class _LIBCPP_TEMPLATE_VIS insert_iterator _LIBCPP_SUPPRESS_DEPRECATED_POP protected: _Container* container; - typename _Container::iterator iter; // FIXME: `ranges::iterator_t` in C++20 mode + __insert_iterator_iter_t<_Container> iter; public: typedef output_iterator_tag iterator_category; typedef void value_type; @@ -46,7 +55,7 @@ _LIBCPP_SUPPRESS_DEPRECATED_POP typedef void reference; typedef _Container container_type; - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator(_Container& __x, typename _Container::iterator __i) + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator(_Container& __x, __insert_iterator_iter_t<_Container> __i) : container(_VSTD::addressof(__x)), iter(__i) {} _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator=(const typename _Container::value_type& __value_) {iter = container->insert(iter, __value_); ++iter; return *this;} @@ -62,7 +71,7 @@ _LIBCPP_SUPPRESS_DEPRECATED_POP template inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator<_Container> -inserter(_Container& __x, typename _Container::iterator __i) +inserter(_Container& __x, __insert_iterator_iter_t<_Container> __i) { return insert_iterator<_Container>(__x, __i); } diff --git a/libcxx/include/__iterator/istream_iterator.h b/libcxx/include/__iterator/istream_iterator.h index 36d34090b3d45..979d714edf5d1 100644 --- a/libcxx/include/__iterator/istream_iterator.h +++ b/libcxx/include/__iterator/istream_iterator.h @@ -67,12 +67,6 @@ _LIBCPP_SUPPRESS_DEPRECATED_POP bool operator==(const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __x, const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __y); - - template - friend _LIBCPP_INLINE_VISIBILITY - bool - operator==(const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __x, - const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __y); }; template diff --git a/libcxx/include/__memory/allocator_arg_t.h b/libcxx/include/__memory/allocator_arg_t.h index 830c6b8148eb8..fb98c5bfa00ca 100644 --- a/libcxx/include/__memory/allocator_arg_t.h +++ b/libcxx/include/__memory/allocator_arg_t.h @@ -36,7 +36,7 @@ extern _LIBCPP_EXPORTED_FROM_ABI const allocator_arg_t allocator_arg; template struct __uses_alloc_ctor_imp { - typedef _LIBCPP_NODEBUG_TYPE typename __uncvref<_Alloc>::type _RawAlloc; + typedef _LIBCPP_NODEBUG typename __uncvref<_Alloc>::type _RawAlloc; static const bool __ua = uses_allocator<_Tp, _RawAlloc>::value; static const bool __ic = is_constructible<_Tp, allocator_arg_t, _Alloc, _Args...>::value; diff --git a/libcxx/include/__memory/allocator_traits.h b/libcxx/include/__memory/allocator_traits.h index a02af0deafc97..a558d37a00982 100644 --- a/libcxx/include/__memory/allocator_traits.h +++ b/libcxx/include/__memory/allocator_traits.h @@ -36,11 +36,11 @@ template ::type, bool = __has_pointer<_RawAlloc>::value> struct __pointer { - using type _LIBCPP_NODEBUG_TYPE = typename _RawAlloc::pointer; + using type _LIBCPP_NODEBUG = typename _RawAlloc::pointer; }; template struct __pointer<_Tp, _Alloc, _RawAlloc, false> { - using type _LIBCPP_NODEBUG_TYPE = _Tp*; + using type _LIBCPP_NODEBUG = _Tp*; }; // __const_pointer @@ -48,14 +48,14 @@ _LIBCPP_ALLOCATOR_TRAITS_HAS_XXX(__has_const_pointer, const_pointer); template ::value> struct __const_pointer { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::const_pointer; + using type _LIBCPP_NODEBUG = typename _Alloc::const_pointer; }; template struct __const_pointer<_Tp, _Ptr, _Alloc, false> { #ifdef _LIBCPP_CXX03_LANG using type = typename pointer_traits<_Ptr>::template rebind::other; #else - using type _LIBCPP_NODEBUG_TYPE = typename pointer_traits<_Ptr>::template rebind; + using type _LIBCPP_NODEBUG = typename pointer_traits<_Ptr>::template rebind; #endif }; @@ -64,14 +64,14 @@ _LIBCPP_ALLOCATOR_TRAITS_HAS_XXX(__has_void_pointer, void_pointer); template ::value> struct __void_pointer { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::void_pointer; + using type _LIBCPP_NODEBUG = typename _Alloc::void_pointer; }; template struct __void_pointer<_Ptr, _Alloc, false> { #ifdef _LIBCPP_CXX03_LANG - using type _LIBCPP_NODEBUG_TYPE = typename pointer_traits<_Ptr>::template rebind::other; + using type _LIBCPP_NODEBUG = typename pointer_traits<_Ptr>::template rebind::other; #else - using type _LIBCPP_NODEBUG_TYPE = typename pointer_traits<_Ptr>::template rebind; + using type _LIBCPP_NODEBUG = typename pointer_traits<_Ptr>::template rebind; #endif }; @@ -80,14 +80,14 @@ _LIBCPP_ALLOCATOR_TRAITS_HAS_XXX(__has_const_void_pointer, const_void_pointer); template ::value> struct __const_void_pointer { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::const_void_pointer; + using type _LIBCPP_NODEBUG = typename _Alloc::const_void_pointer; }; template struct __const_void_pointer<_Ptr, _Alloc, false> { #ifdef _LIBCPP_CXX03_LANG - using type _LIBCPP_NODEBUG_TYPE = typename pointer_traits<_Ptr>::template rebind::other; + using type _LIBCPP_NODEBUG = typename pointer_traits<_Ptr>::template rebind::other; #else - using type _LIBCPP_NODEBUG_TYPE = typename pointer_traits<_Ptr>::template rebind; + using type _LIBCPP_NODEBUG = typename pointer_traits<_Ptr>::template rebind; #endif }; @@ -97,18 +97,18 @@ template ::value> struct __size_type : make_unsigned<_DiffType> { }; template struct __size_type<_Alloc, _DiffType, true> { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::size_type; + using type _LIBCPP_NODEBUG = typename _Alloc::size_type; }; // __alloc_traits_difference_type _LIBCPP_ALLOCATOR_TRAITS_HAS_XXX(__has_alloc_traits_difference_type, difference_type); template ::value> struct __alloc_traits_difference_type { - using type _LIBCPP_NODEBUG_TYPE = typename pointer_traits<_Ptr>::difference_type; + using type _LIBCPP_NODEBUG = typename pointer_traits<_Ptr>::difference_type; }; template struct __alloc_traits_difference_type<_Alloc, _Ptr, true> { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::difference_type; + using type _LIBCPP_NODEBUG = typename _Alloc::difference_type; }; // __propagate_on_container_copy_assignment @@ -117,7 +117,7 @@ template struct __propagate_on_container_copy_assignment<_Alloc, true> { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::propagate_on_container_copy_assignment; + using type _LIBCPP_NODEBUG = typename _Alloc::propagate_on_container_copy_assignment; }; // __propagate_on_container_move_assignment @@ -126,7 +126,7 @@ template struct __propagate_on_container_move_assignment<_Alloc, true> { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::propagate_on_container_move_assignment; + using type _LIBCPP_NODEBUG = typename _Alloc::propagate_on_container_move_assignment; }; // __propagate_on_container_swap @@ -135,7 +135,7 @@ template ::value> struct __propagate_on_container_swap : false_type { }; template struct __propagate_on_container_swap<_Alloc, true> { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::propagate_on_container_swap; + using type _LIBCPP_NODEBUG = typename _Alloc::propagate_on_container_swap; }; // __is_always_equal @@ -144,7 +144,7 @@ template ::value> struct __is_always_equal : is_empty<_Alloc> { }; template struct __is_always_equal<_Alloc, true> { - using type _LIBCPP_NODEBUG_TYPE = typename _Alloc::is_always_equal; + using type _LIBCPP_NODEBUG = typename _Alloc::is_always_equal; }; // __allocator_traits_rebind @@ -158,15 +158,15 @@ struct __has_rebind_other<_Tp, _Up, typename __void_t< template ::value> struct __allocator_traits_rebind { - using type _LIBCPP_NODEBUG_TYPE = typename _Tp::template rebind<_Up>::other; + using type _LIBCPP_NODEBUG = typename _Tp::template rebind<_Up>::other; }; template