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Rollup merge of rust-lang#88245 - Sl1mb0:s390-asm, r=Amanieu
S390x inline asm This adds register definitions and constraint codes for the s390x general and floating point registers necessary for fixing rust-lang#85931; as well as a few tests. Further testing is needed, but I am a little unsure of what specific tests should be added to `src/test/assembly/asm/s390x.rs` to address this.
2 parents 60abbb6 + 4a9ba65 commit 9920b30

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‎compiler/rustc_codegen_llvm/src/asm.rs

+6
Original file line numberDiff line numberDiff line change
@@ -314,6 +314,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
314314
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {}
315315
InlineAsmArch::Hexagon => {}
316316
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {}
317+
InlineAsmArch::S390x => {}
317318
InlineAsmArch::SpirV => {}
318319
InlineAsmArch::Wasm32 => {}
319320
InlineAsmArch::Bpf => {}
@@ -633,6 +634,8 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
633634
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
634635
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
635636
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
637+
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
638+
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
636639
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
637640
bug!("LLVM backend does not support SPIR-V")
638641
}
@@ -711,6 +714,7 @@ fn modifier_to_llvm(
711714
}
712715
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
713716
InlineAsmRegClass::Bpf(_) => None,
717+
InlineAsmRegClass::S390x(_) => None,
714718
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
715719
bug!("LLVM backend does not support SPIR-V")
716720
}
@@ -769,6 +773,8 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
769773
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
770774
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
771775
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
776+
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
777+
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
772778
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
773779
bug!("LLVM backend does not support SPIR-V")
774780
}

‎compiler/rustc_target/src/asm/mod.rs

+25
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,7 @@ mod mips;
154154
mod nvptx;
155155
mod powerpc;
156156
mod riscv;
157+
mod s390x;
157158
mod spirv;
158159
mod wasm;
159160
mod x86;
@@ -166,6 +167,7 @@ pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass};
166167
pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass};
167168
pub use powerpc::{PowerPCInlineAsmReg, PowerPCInlineAsmRegClass};
168169
pub use riscv::{RiscVInlineAsmReg, RiscVInlineAsmRegClass};
170+
pub use s390x::{S390xInlineAsmReg, S390xInlineAsmRegClass};
169171
pub use spirv::{SpirVInlineAsmReg, SpirVInlineAsmRegClass};
170172
pub use wasm::{WasmInlineAsmReg, WasmInlineAsmRegClass};
171173
pub use x86::{X86InlineAsmReg, X86InlineAsmRegClass};
@@ -184,6 +186,7 @@ pub enum InlineAsmArch {
184186
Mips64,
185187
PowerPC,
186188
PowerPC64,
189+
S390x,
187190
SpirV,
188191
Wasm32,
189192
Bpf,
@@ -206,6 +209,7 @@ impl FromStr for InlineAsmArch {
206209
"hexagon" => Ok(Self::Hexagon),
207210
"mips" => Ok(Self::Mips),
208211
"mips64" => Ok(Self::Mips64),
212+
"s390x" => Ok(Self::S390x),
209213
"spirv" => Ok(Self::SpirV),
210214
"wasm32" => Ok(Self::Wasm32),
211215
"bpf" => Ok(Self::Bpf),
@@ -235,6 +239,7 @@ pub enum InlineAsmReg {
235239
PowerPC(PowerPCInlineAsmReg),
236240
Hexagon(HexagonInlineAsmReg),
237241
Mips(MipsInlineAsmReg),
242+
S390x(S390xInlineAsmReg),
238243
SpirV(SpirVInlineAsmReg),
239244
Wasm(WasmInlineAsmReg),
240245
Bpf(BpfInlineAsmReg),
@@ -252,6 +257,7 @@ impl InlineAsmReg {
252257
Self::PowerPC(r) => r.name(),
253258
Self::Hexagon(r) => r.name(),
254259
Self::Mips(r) => r.name(),
260+
Self::S390x(r) => r.name(),
255261
Self::Bpf(r) => r.name(),
256262
Self::Err => "<reg>",
257263
}
@@ -266,6 +272,7 @@ impl InlineAsmReg {
266272
Self::PowerPC(r) => InlineAsmRegClass::PowerPC(r.reg_class()),
267273
Self::Hexagon(r) => InlineAsmRegClass::Hexagon(r.reg_class()),
268274
Self::Mips(r) => InlineAsmRegClass::Mips(r.reg_class()),
275+
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
269276
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
270277
Self::Err => InlineAsmRegClass::Err,
271278
}
@@ -305,6 +312,9 @@ impl InlineAsmReg {
305312
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
306313
Self::Mips(MipsInlineAsmReg::parse(arch, has_feature, target, &name)?)
307314
}
315+
InlineAsmArch::S390x => {
316+
Self::S390x(S390xInlineAsmReg::parse(arch, has_feature, target, &name)?)
317+
}
308318
InlineAsmArch::SpirV => {
309319
Self::SpirV(SpirVInlineAsmReg::parse(arch, has_feature, target, &name)?)
310320
}
@@ -333,6 +343,7 @@ impl InlineAsmReg {
333343
Self::PowerPC(r) => r.emit(out, arch, modifier),
334344
Self::Hexagon(r) => r.emit(out, arch, modifier),
335345
Self::Mips(r) => r.emit(out, arch, modifier),
346+
Self::S390x(r) => r.emit(out, arch, modifier),
336347
Self::Bpf(r) => r.emit(out, arch, modifier),
337348
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
338349
}
@@ -347,6 +358,7 @@ impl InlineAsmReg {
347358
Self::PowerPC(_) => cb(self),
348359
Self::Hexagon(r) => r.overlapping_regs(|r| cb(Self::Hexagon(r))),
349360
Self::Mips(_) => cb(self),
361+
Self::S390x(_) => cb(self),
350362
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
351363
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
352364
}
@@ -374,6 +386,7 @@ pub enum InlineAsmRegClass {
374386
PowerPC(PowerPCInlineAsmRegClass),
375387
Hexagon(HexagonInlineAsmRegClass),
376388
Mips(MipsInlineAsmRegClass),
389+
S390x(S390xInlineAsmRegClass),
377390
SpirV(SpirVInlineAsmRegClass),
378391
Wasm(WasmInlineAsmRegClass),
379392
Bpf(BpfInlineAsmRegClass),
@@ -392,6 +405,7 @@ impl InlineAsmRegClass {
392405
Self::PowerPC(r) => r.name(),
393406
Self::Hexagon(r) => r.name(),
394407
Self::Mips(r) => r.name(),
408+
Self::S390x(r) => r.name(),
395409
Self::SpirV(r) => r.name(),
396410
Self::Wasm(r) => r.name(),
397411
Self::Bpf(r) => r.name(),
@@ -412,6 +426,7 @@ impl InlineAsmRegClass {
412426
Self::PowerPC(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::PowerPC),
413427
Self::Hexagon(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Hexagon),
414428
Self::Mips(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Mips),
429+
Self::S390x(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::S390x),
415430
Self::SpirV(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::SpirV),
416431
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
417432
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
@@ -439,6 +454,7 @@ impl InlineAsmRegClass {
439454
Self::PowerPC(r) => r.suggest_modifier(arch, ty),
440455
Self::Hexagon(r) => r.suggest_modifier(arch, ty),
441456
Self::Mips(r) => r.suggest_modifier(arch, ty),
457+
Self::S390x(r) => r.suggest_modifier(arch, ty),
442458
Self::SpirV(r) => r.suggest_modifier(arch, ty),
443459
Self::Wasm(r) => r.suggest_modifier(arch, ty),
444460
Self::Bpf(r) => r.suggest_modifier(arch, ty),
@@ -462,6 +478,7 @@ impl InlineAsmRegClass {
462478
Self::PowerPC(r) => r.default_modifier(arch),
463479
Self::Hexagon(r) => r.default_modifier(arch),
464480
Self::Mips(r) => r.default_modifier(arch),
481+
Self::S390x(r) => r.default_modifier(arch),
465482
Self::SpirV(r) => r.default_modifier(arch),
466483
Self::Wasm(r) => r.default_modifier(arch),
467484
Self::Bpf(r) => r.default_modifier(arch),
@@ -484,6 +501,7 @@ impl InlineAsmRegClass {
484501
Self::PowerPC(r) => r.supported_types(arch),
485502
Self::Hexagon(r) => r.supported_types(arch),
486503
Self::Mips(r) => r.supported_types(arch),
504+
Self::S390x(r) => r.supported_types(arch),
487505
Self::SpirV(r) => r.supported_types(arch),
488506
Self::Wasm(r) => r.supported_types(arch),
489507
Self::Bpf(r) => r.supported_types(arch),
@@ -509,6 +527,7 @@ impl InlineAsmRegClass {
509527
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
510528
Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?)
511529
}
530+
InlineAsmArch::S390x => Self::S390x(S390xInlineAsmRegClass::parse(arch, name)?),
512531
InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmRegClass::parse(arch, name)?),
513532
InlineAsmArch::Wasm32 => Self::Wasm(WasmInlineAsmRegClass::parse(arch, name)?),
514533
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(arch, name)?),
@@ -527,6 +546,7 @@ impl InlineAsmRegClass {
527546
Self::PowerPC(r) => r.valid_modifiers(arch),
528547
Self::Hexagon(r) => r.valid_modifiers(arch),
529548
Self::Mips(r) => r.valid_modifiers(arch),
549+
Self::S390x(r) => r.valid_modifiers(arch),
530550
Self::SpirV(r) => r.valid_modifiers(arch),
531551
Self::Wasm(r) => r.valid_modifiers(arch),
532552
Self::Bpf(r) => r.valid_modifiers(arch),
@@ -695,6 +715,11 @@ pub fn allocatable_registers(
695715
mips::fill_reg_map(arch, has_feature, target, &mut map);
696716
map
697717
}
718+
InlineAsmArch::S390x => {
719+
let mut map = s390x::regclass_map();
720+
s390x::fill_reg_map(arch, has_feature, target, &mut map);
721+
map
722+
}
698723
InlineAsmArch::SpirV => {
699724
let mut map = spirv::regclass_map();
700725
spirv::fill_reg_map(arch, has_feature, target, &mut map);

‎compiler/rustc_target/src/asm/s390x.rs

+106
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,106 @@
1+
use super::{InlineAsmArch, InlineAsmType};
2+
use rustc_macros::HashStable_Generic;
3+
use std::fmt;
4+
5+
def_reg_class! {
6+
S390x S390xInlineAsmRegClass {
7+
reg,
8+
freg,
9+
}
10+
}
11+
12+
impl S390xInlineAsmRegClass {
13+
pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
14+
&[]
15+
}
16+
17+
pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
18+
None
19+
}
20+
21+
pub fn suggest_modifier(
22+
self,
23+
_arch: InlineAsmArch,
24+
_ty: InlineAsmType,
25+
) -> Option<(char, &'static str)> {
26+
None
27+
}
28+
29+
pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
30+
None
31+
}
32+
33+
pub fn supported_types(
34+
self,
35+
arch: InlineAsmArch,
36+
) -> &'static [(InlineAsmType, Option<&'static str>)] {
37+
match (self, arch) {
38+
(Self::reg, _) => types! { _: I8, I16, I32, I64; },
39+
(Self::freg, _) => types! { _: F32, F64; },
40+
}
41+
}
42+
}
43+
44+
def_regs! {
45+
S390x S390xInlineAsmReg S390xInlineAsmRegClass {
46+
r0: reg = ["r0"],
47+
r1: reg = ["r1"],
48+
r2: reg = ["r2"],
49+
r3: reg = ["r3"],
50+
r4: reg = ["r4"],
51+
r5: reg = ["r5"],
52+
r6: reg = ["r6"],
53+
r7: reg = ["r7"],
54+
r8: reg = ["r8"],
55+
r9: reg = ["r9"],
56+
r10: reg = ["r10"],
57+
r12: reg = ["r12"],
58+
r13: reg = ["r13"],
59+
r14: reg = ["r14"],
60+
f0: freg = ["f0"],
61+
f1: freg = ["f1"],
62+
f2: freg = ["f2"],
63+
f3: freg = ["f3"],
64+
f4: freg = ["f4"],
65+
f5: freg = ["f5"],
66+
f6: freg = ["f6"],
67+
f7: freg = ["f7"],
68+
f8: freg = ["f8"],
69+
f9: freg = ["f9"],
70+
f10: freg = ["f10"],
71+
f11: freg = ["f11"],
72+
f12: freg = ["f12"],
73+
f13: freg = ["f13"],
74+
f14: freg = ["f14"],
75+
f15: freg = ["f15"],
76+
#error = ["r11"] =>
77+
"The frame pointer cannot be used as an operand for inline asm",
78+
#error = ["r15"] =>
79+
"The stack pointer cannot be used as an operand for inline asm",
80+
#error = [
81+
"c0", "c1", "c2", "c3",
82+
"c4", "c5", "c6", "c7",
83+
"c8", "c9", "c10", "c11",
84+
"c12", "c13", "c14", "c15"
85+
] =>
86+
"control registers are reserved by the kernel and cannot be used as operands for inline asm",
87+
#error = [
88+
"a0", "a1", "a2", "a3",
89+
"a4", "a5", "a6", "a7",
90+
"a8", "a9", "a10", "a11",
91+
"a12", "a13", "a14", "a15"
92+
] =>
93+
"access registers are not supported and cannot be used as operands for inline asm",
94+
}
95+
}
96+
97+
impl S390xInlineAsmReg {
98+
pub fn emit(
99+
self,
100+
out: &mut dyn fmt::Write,
101+
_arch: InlineAsmArch,
102+
_modifier: Option<char>,
103+
) -> fmt::Result {
104+
write!(out, "%{}", self.name())
105+
}
106+
}

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