|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt < %s -p=indvars -S | FileCheck %s |
| 3 | + |
| 4 | +;; When that when IndVarSimplify simplifies the rem to a cmp and select, we |
| 5 | +;; propagate the rem's source location to both the new instructions. |
| 6 | + |
| 7 | +define i32 @widget() !dbg !5 { |
| 8 | +; CHECK-LABEL: define i32 @widget( |
| 9 | +; CHECK-SAME: ) !dbg [[DBG5:![0-9]+]] { |
| 10 | +; CHECK-NEXT: [[BB:.*:]] |
| 11 | +; CHECK-NEXT: br label %[[BB1:.*]] |
| 12 | +; CHECK: [[BB1_LOOPEXIT:.*]]: |
| 13 | +; CHECK-NEXT: br label %[[BB1]] |
| 14 | +; CHECK: [[BB1]]: |
| 15 | +; CHECK-NEXT: br label %[[BB2:.*]] |
| 16 | +; CHECK: [[BB2]]: |
| 17 | +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[BB1]] ], [ [[ADD:%.*]], %[[BB2]] ] |
| 18 | +; CHECK-NEXT: [[ADD]] = add nuw nsw i32 1, [[PHI]] |
| 19 | +; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[ADD]], 3, !dbg [[DBG8:![0-9]+]] |
| 20 | +; CHECK-NEXT: [[IV_REM:%.*]] = select i1 [[TMP0]], i32 0, i32 [[ADD]], !dbg [[DBG8]] |
| 21 | +; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[IV_REM]] to i64 |
| 22 | +; CHECK-NEXT: br i1 false, label %[[BB2]], label %[[BB1_LOOPEXIT]] |
| 23 | +; |
| 24 | +bb: |
| 25 | + br label %bb1 |
| 26 | + |
| 27 | +bb1: ; preds = %bb2, %bb |
| 28 | + br label %bb2 |
| 29 | + |
| 30 | +bb2: ; preds = %bb2, %bb1 |
| 31 | + %phi = phi i32 [ 0, %bb1 ], [ %add, %bb2 ] |
| 32 | + %add = add i32 1, %phi |
| 33 | + %urem = urem i32 %add, 3, !dbg !8 |
| 34 | + %zext = zext i32 %urem to i64 |
| 35 | + %icmp = icmp ult i32 %phi, 2 |
| 36 | + br i1 %icmp, label %bb2, label %bb1 |
| 37 | +} |
| 38 | + |
| 39 | +!llvm.dbg.cu = !{!0} |
| 40 | +!llvm.debugify = !{!2, !3} |
| 41 | +!llvm.module.flags = !{!4} |
| 42 | + |
| 43 | +!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug) |
| 44 | +!1 = !DIFile(filename: "llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll", directory: "/") |
| 45 | +!2 = !{i32 8} |
| 46 | +!3 = !{i32 0} |
| 47 | +!4 = !{i32 2, !"Debug Info Version", i32 3} |
| 48 | +!5 = distinct !DISubprogram(name: "widget", linkageName: "widget", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0) |
| 49 | +!6 = !DISubroutineType(types: !7) |
| 50 | +!7 = !{} |
| 51 | +!8 = !DILocation(line: 1, column: 1, scope: !5) |
| 52 | +;. |
| 53 | +; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: [[META1:![0-9]+]], producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug) |
| 54 | +; CHECK: [[META1]] = !DIFile(filename: "llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll", directory: {{.*}}) |
| 55 | +; CHECK: [[DBG5]] = distinct !DISubprogram(name: "widget", linkageName: "widget", scope: null, file: [[META1]], line: 1, type: [[META6:![0-9]+]], scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: [[META0]]) |
| 56 | +; CHECK: [[META6]] = !DISubroutineType(types: [[META7:![0-9]+]]) |
| 57 | +; CHECK: [[META7]] = !{} |
| 58 | +; CHECK: [[DBG8]] = !DILocation(line: 1, column: 1, scope: [[DBG5]]) |
| 59 | +;. |
0 commit comments