updaing readme

Author: JeffDeCola

README.md

@@ -63,7 +63,7 @@ This project is separated into 4 main sections,
 
 1. The FPGA
 1. The BACKEND SERVER (Raspberry Pi) to control the I/O of the FPGA
-1. The WEB SERVER (bluehost) providing to control the Raspberry Pi
+1. The WEB SERVER (bluehost) providing the interface between the frontend and backend
 1. The BROWSER to provide a GUI
 
 This may help,
@@ -83,7 +83,7 @@ in the following four sections,
   * [go](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/software/development/languages/go-cheat-sheet)
   * gotests
 * OPERATIONS
-  * [concourse ci](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/software/operations/continuous-integration-continuous-deployment/concourse-cheat-sheet)
+  * [concourse](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/software/operations/continuous-integration-continuous-deployment/concourse-cheat-sheet)
     (optional)
   * [docker](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/software/operations/orchestration/builds-deployment-containers/docker-cheat-sheet)
 * SERVICES
@@ -103,109 +103,54 @@ Where,
 
 ## SECTION I - THE FPGA
 
-My
-[programable-8-bit-microprocessor](https://github.com/JeffDeCola/my-systemverilog-examples/tree/master/systems/microprocessors/programable-8-bit-microprocessor)
-will be used as an example. Please refer to that repo on how to burn a
-FPGA from verilog.
-
-In that repo,
+I burned my
+[programable-8-bit-microprocessor](https://github.com/JeffDeCola/my-systemverilog-examples/tree/master/systems/microprocessors/programable_8_bit_microprocessor) to an FPGA.
+Refer to that repo on how i did that.
 
 * I designed the 8-bit microprocessor in
   [Verilog](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/hardware/development/languages/verilog-cheat-sheet)
   (An HDL language)
 * Used the
   [Xilinx Vivado](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/hardware/tools/synthesis/xilinx-vivado-cheat-sheet)
-  IDE to synthesize and burn/flash on boot the FPGA
+  IDE to synthesize and burn/flash the FPGA
 * Used a
   [Digilent ARTY-S7](https://github.com/JeffDeCola/my-cheat-sheets/tree/master/hardware/development/fpga-development-boards/digilent-arty-s7-cheat-sheet)
   FPGA development board
 
-To operate this microprocessor, the Raspberry Pi will,
+### VERILOG
 
-* Set both inputs [7:0] DATA_IN_A and [7:0] DATA_IN_B
-* Select an [3:0] OPCODE instruction (such as ADD)
-  * 0011: ADD
-  * 0111: SUBTRACT
-  * 1100: MULTIPLY
-  * 1110: DIVIDE
-* Enable the GO_BAR via GO signal
-* Observe the resulting [7:0] DATA_OUT
-
-The number of I/O the Raspberry Pi can control is 26 I/O pins.
-But as shown in the following figure, the microprocessor has 31 pins.
-The next section will go over which 5 pins we hardcoded or will be
-controlled by the FPGA development board,
+This is the structural level of the 8-bit microprocessor I designed in verilog,
 
 ![IMAGE - Top-Level-Block-Diagram-of-the-8-bit-Microprocessor.jpg - IMAGE](https://github.com/JeffDeCola/my-verilog-examples/blob/master/docs/pics/systems/Top-Level-Block-Diagram-of-the-8-bit-Microprocessor.jpg?raw=true)
 
-## SECTION II - THE RASPBERRY PI
-
-The Raspberry Pi shall do two things,
-
-* Control 26 pins of the I/O of the FPGA (GPIO to PMOD)
-* Provide an interface to the webserver (REST JSON API)
-
-### RUN
-
-To
-[run.sh](https://github.com/JeffDeCola/control-fpga-via-raspi-and-webserver/blob/master/control-fpga-via-raspi-and-webserver-code/run.sh),
-
-```bash
-cd control-fpga-via-raspi-and-webserver-code
-go run main.go
-```
-
-As a placeholder, every 2 seconds it will print,
+### ARTY S7-50 FPGA DEVELOPMENT BOARD
 
-```txt
-    INFO[0000] Let's Start this!
-    Hello everyone, count is: 1
-    Hello everyone, count is: 2
-    Hello everyone, count is: 3
-    etc...
-```
+I used an arty S7-50 FPGA development board to burn a Spartan-7 50 FPGA,
 
-### CREATE BINARY
+![IMAGE - digilent-arty-s7-50.jpg - IMAGE](https://github.com/JeffDeCola/my-cheat-sheets/blob/master/docs/pics/digilent-arty-s7-50.jpg?raw=true)
 
-To
-[create-binary.sh](https://github.com/JeffDeCola/control-fpga-via-raspi-and-webserver/blob/master/control-fpga-via-raspi-and-webserver-code/bin/create-binary.sh),
+## SECTION II - THE RASPBERRY PI
 
-```bash
-cd control-fpga-via-raspi-and-webserver-code/bin
-go build -o control-fpga-via-raspi-and-webserver ../main.go
-./control-fpga-via-raspi-and-webserver
-```
+The Raspberry Pi shall do two things,
 
-This binary will not be used during a docker build
-since it creates it's own.
+* Control 28 pins of the I/O of the FPGA (GPIO to PMOD) using GO
+* Provide an interface to the webserver (REST JSON API)
 
 ### RASPBERRY PI TO FPGA DEV BOARD INTERFACE (GPIO to PMOD)
 
-The GPIO (Input/Output) of the Raspberry Pi is connected to the
-Input/Output of the FPGA development board via Pmod connectors.
-On a side note, it may be a good idea to place a 200 Ohm resister in-line.
-
-All of the GPIOs have weak internal pull-ups and downs which may be enabled
-or disabled by software. I control this in my go code.
-
-There are a total of 26 I/O pins that you may use in the Raspberry Pi.
-But I have a total of 31 I would like to use.  So I had to compromise
-and hardcoded 5 of the Inputs (????).
-
-The Raspberry Pi will connect to the processor as follows,
+That is a total of 31 pins, but I only have 28 GPIO pins.
+Hence, I will tie 3 of the DATA_IN_A pins to gnd.
 
 * **OUTPUT (SET)**
   * [3:0] OPCODE
   * GO_BAR
-  * RESET (N/C)
-  * JAM (N/C)
-  * [7:0] DATA_IN_A (Bits 4,5,6 hardcoded to low)
+  * RESET
+  * JAM
+  * [7:0] DATA_IN_A (Bits 4,5,6 hardwired to ground)
   * [7:0] DATA_IN_B
 * **INPUT (GET)**
   * [7:0] DATA_OUT
 
-A go program is used to control and capture the I/O.
-
 The pin list between the Raspberry Pi and the FPGA development
 board is as follows,
 
@@ -245,28 +190,59 @@ board is as follows,
 |                     |                   |                       |
 | **[3:0] OPCODE**    |  JD PMOD          |                       |
 |                     |                   |                       |
-| [3]                 |  1                | 03 (GPIO2)*            |
-| [2]                 |  2                | 05 (GPIO3)*            |
+| [3]                 |  1                | 03 (GPIO2)**          |
+| [2]                 |  2                | 05 (GPIO3)**          |
 | [1]                 |  3                | 07 (GPIO4)            |
 | [0]                 |  4                | 11 (GPIO17)           |
 | GO                  |  7                | 13 (GPIO27)           |
-| **(GND)** RESET     |  8                | N/C                   |
-| **(GND)** JAM       |  9                | N/C                   |
+| RESET               |  8                | 27 (GPIO0)            |
+| JAM                 |  9                | 28 (GPIO1)            |
 | N/C                 |  10               | N/C                   |
 
-**NOTE**: To use pin 3 (GPIO2), pin 5 (GPIO3),
-pin 8 (GPIO14) and pin 10 (GPIO15)
-you must disable
-the serial port using `raspi-config`.
+**NOTE1**: To use pin 8 (GPIO14) and pin 10 (GPIO15)
+you must disable the serial port using `raspi-config`.
 Select `Interfacing Options` and then
 `Serial` and select `No`.
 
+**NOTE2** Pin 3 (GPIO2) and pin 5 (GPIO3) have
+fixed pull-up resistors to 3.3V.
+
 ![IMAGE - arty-s7-50-pmod-to-raspi-gpio-breadboard-connections.jpg - IMAGE](docs/pics/arty-s7-50-pmod-to-raspi-gpio-breadboard-connections.jpg)
 
 The result,
 
 ![IMAGE - breadboard.jpg - IMAGE](docs/pics/breadboard.jpg)
 
+### CONTROL I/O VIA GOLANG
+
+To
+[run.sh](https://github.com/JeffDeCola/section-2-backend-server/blob/master/section-2-backend-server/run.sh),
+
+```bash
+cd section-2-backend-server
+go run main.go
+```
+
+As a placeholder, every 2 seconds it will print,
+
+```txt
+???????
+```
+
+### CREATE BINARY
+
+To
+[create-binary.sh](https://github.com/JeffDeCola/section-2-backend-server/blob/master/section-2-backend-server/bin/create-binary.sh),
+
+```bash
+cd section-2-backend-server/bin
+go build -o section-2-backend-server ../main.go
+./section-2-backend-server
+```
+
+This binary will not be used during a docker build
+since it creates it's own.
+
 ### RASPBERRY PI TO WEBSERVER INTERFACE (REST JSON API)
 
 tbd.