Portenta H7: squashed commits - spi, wire, pins, adc, plus

This is a partial fix for: arduino#68

the spis line was not in the 	zephyr,user {
section of the ovleray file.
I added it with one entry: spis = <&spi2>;

Updated: the GPIO table, that only the LEDS should be defined with GPIO_ACTIVE_LOW.

H7 - ADC hack for D19,D20

Hack the two pins for A4 and A5 to say they are Z pins

This fixes issue where the
constants A4 and A5 were computed as the sum of two pin numbers
as PC_2 and PC_3 pins are duplicated on these boards.

Note: accessing those pins directly by index like 18, 19 will probably not work

Update PinNames.cpp

Remove debug Serial.print

H7: Add in Dual pads into pin names

PinName: digitalRead, analogRead, analogWrite

Added a few more override functions.

Brings up questions, with the analog ones.
More on the PR

Portenta H7: First cut add PinNames to the H7M7 variant

Note: the overload function definitions are in the PinNames.h
PinNames.cpp - duplicates the pin table, as the main pin table is defined static within zephyrCommon.cpp
Not sure if to move some up to there but sort of specific to Portenta H7 maybe X8, maybe GIGA...

Also I sort of still have a lot of the MBED names within the pin names, Probably should be weeded out

Maybe some place should define breakout board specific namings?

Portenta H7M7 - Add Camera and port table

Start of Pin names stuff

Portenta H7M7 support for analogWrite/analogRead

@mjs513 and I added/modified the device tree for this board, with the tables to support PWM (analogWrite) and analogRead on some of the Analog pins.

Note: there are some issues with A4/A5 in that those pins are also on the same pins that support SPI.
And when SPI is enabled, the GPIOC pin configuration is setup by the device tree to be MODER to be set for Alternat function and their AF set to 5.  The analogRead code does not does not update these tables and as
such analogRead fails.

We found that if y ou disable SPI then they work better.

I currently left the SPI enabled.  Probably need to add something that when analogRead is called that it updates the GPIO registers to make it work.

I am ecurrently experimenting with a hack in my test sketch that appears to change the MODER of those pins back to 3, but so far that does not appear to be sufficent:
```
 static const struct gpio_dt_spec arduino_pins[] = {DT_FOREACH_PROP_ELEM_SEP(
   DT_PATH(zephyr_user), digital_pin_gpios, GPIO_DT_SPEC_GET_BY_IDX, (, ))};

  void pinModeAnalog(pin_size_t pinNumber) {
     gpio_pin_configure_dt(&arduino_pins[pinNumber],
                           GPIO_INPUT /*| GPIO_ACTIVE_HIGH */ | GPIO_MODE_ANALOG);
 }
```

On the analogWrites, this code has optionally in place that allows duplicate pins in the device tree GPIO list,  by changing how I read in the PWM table from the Tree, instead of summing all of the matches in the GPIO tree, it instead saves the GPIO Port and pin number and uses them for the compare.

Again this depends on if we wish for the Pin numbers for the functions like digitalRead/digitalWrite to match those used by the MBED version.   I still have the last 3 truncated K5-K7 which are used by the LEDs and fault
but depending on directions, can find other solutions.

enable spi2

Update arduino_portenta_h7_m7.conf to enable memc

resolves: arduino#74

needed to add: CONFIG_MEMC=y
to have the SDRAM enabled and as such not fault if you do anything with the SDRAM library.
Also enabled CONFIG_DMA=y
As not sure if that was needed but is in the GIGA .conf file

Update arduino_portenta_h7_m7.overlay

Add dma sections to remove the build warnings

Portenta H7: update digital-pin-gpios to be same as MBED version

Update arduino_portenta_h7_m7.overlay

Added in the other two Wire objects to match the MBED version.
i2cs = <&i2c3>, <&i2c1>, <&i2c4>;

I checked it out with simple wire scanner sketch that checks Wire, Wire1 and Wire2.
And then tried adding QWIIC Button first to the I2C0 section of breakout board and
it was found on Wire.

Moved it to I2C1 section and found with Wire1 and then moved to I2C2 section and found on Wire2

Author: KurtE

cores/arduino/zephyrCommon.cpp

@@ -140,6 +140,29 @@ const struct pwm_dt_spec arduino_pwm[] =
 	{ DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), pwms, PWM_DT_SPEC) };
 
 /* pwm-pins node provides a mapping digital pin numbers to pwm channels */
+#if 1
+static const struct gpio_dt_spec arduino_pwm_pins[] = {DT_FOREACH_PROP_ELEM_SEP(
+  DT_PATH(zephyr_user), pwm_pin_gpios, GPIO_DT_SPEC_GET_BY_IDX, (, ))};
+
+size_t pwm_pin_index(pin_size_t pinNumber) {
+  printk("pwm_pin_index: %u: ", pinNumber);
+  if (pinNumber >= ARRAY_SIZE(arduino_pins)) {
+    return (size_t)-1;
+  }
+  printk("(%p %u):", arduino_pins[pinNumber].port, arduino_pins[pinNumber].pin);
+  for(size_t i=0; i<ARRAY_SIZE(arduino_pwm_pins); i++) {
+    printk(" [%p,%u]", arduino_pwm_pins[i].port, arduino_pwm_pins[i].pin);
+    if ((arduino_pwm_pins[i].port == arduino_pins[pinNumber].port) && (arduino_pwm_pins[i].pin == arduino_pins[pinNumber].pin)) {
+      printk("\n");
+      return i;
+    }
+  }
+      printk("\n");
+  return (size_t)-1;
+}
+
+
+#else  
 const pin_size_t arduino_pwm_pins[] =
 	{ DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), pwm_pin_gpios, PWM_PINS) };
 
@@ -151,7 +174,7 @@ size_t pwm_pin_index(pin_size_t pinNumber) {
   }
   return (size_t)-1;
 }
-
+#endif
 #endif //CONFIG_PWM
 
 #ifdef CONFIG_ADC
@@ -293,12 +316,13 @@ void delay(unsigned long ms) { k_sleep(K_MSEC(ms)); }
 void delayMicroseconds(unsigned int us) { k_sleep(K_USEC(us)); }
 
 unsigned long micros(void) {
+
 #ifdef CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER
-  return k_cyc_to_us_floor32(k_cycle_get_64());
+   return k_cyc_to_us_floor32(k_cycle_get_64());
 #else
-  return k_cyc_to_us_floor32(k_cycle_get_32());
-#endif
- }
+   return k_cyc_to_us_floor32(k_cycle_get_32());
+#endif   
+}
 
 unsigned long millis(void) { return k_uptime_get_32(); }
 

loader/boards/arduino_portenta_h7_m7.conf

@@ -11,6 +11,9 @@ CONFIG_CDC_ACM_DTE_RATE_CALLBACK_SUPPORT=y
 
 CONFIG_LLEXT_STORAGE_WRITABLE=n
 
+CONFIG_SHARED_MULTI_HEAP=y
+CONFIG_HEAP_MEM_POOL_SIZE=2048
+
 CONFIG_FPU=y
 CONFIG_ICACHE=y
 CONFIG_DCACHE=y
@@ -24,8 +27,12 @@ CONFIG_SHELL_STACK_SIZE=32768
 CONFIG_MAIN_STACK_SIZE=32768
 CONFIG_LLEXT_HEAP_SIZE=128
 
-#CONFIG_ADC=y
-#CONFIG_PWM=y
+CONFIG_ADC=y
+CONFIG_PWM=y
+CONFIG_DMA=y
+CONFIG_MEMC=y
+CONFIG_SPI_ASYNC=y
+CONFIG_SPI_STM32_INTERRUPT=y
 
 CONFIG_NET_CORE_LOG_LEVEL_DBG=y
 
@@ -78,3 +85,15 @@ CONFIG_MBEDTLS_HEAP_SIZE=60000
 CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=7168
 CONFIG_MBEDTLS_HASH_ALL_ENABLED=y
 CONFIG_MBEDTLS_CMAC=y
+
+
+CONFIG_VIDEO=y
+CONFIG_VIDEO_LOG_LEVEL_DBG=y
+CONFIG_VIDEO_STM32_DCMI=y
+CONFIG_VIDEO_BUFFER_POOL_NUM_MAX=3
+CONFIG_VIDEO_BUFFER_POOL_SZ_MAX=614400
+CONFIG_VIDEO_BUFFER_POOL_ALIGN=32
+CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP=y
+CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE=2
+CONFIG_VIDEO_GC2145=y
+CONFIG_FLASH=y