|
| 1 | +From fe32fdaa926c43a8d8cab29193e69fd80423080e Mon Sep 17 00:00:00 2001 |
| 2 | +From: Dom Cobley < [email protected]> |
| 3 | +Date: Wed, 30 Dec 2020 14:51:29 +0000 |
| 4 | +Subject: [PATCH 1/2] bcm2835-dma: Add bcm2835-dma: Add DMA_WIDE_SOURCE and |
| 5 | + DMA_WIDE_DEST flags |
| 6 | + |
| 7 | +Use bits 28 and 29 of the dreq value (the second cell of the DT DMA descriptor) |
| 8 | +to request that wide source reads or wide dest writes are required |
| 9 | + |
| 10 | +Signed-off-by: Dom Cobley < [email protected]> |
| 11 | +--- |
| 12 | + drivers/dma/bcm2835-dma.c | 21 +++++++++++++++++---- |
| 13 | + 1 file changed, 17 insertions(+), 4 deletions(-) |
| 14 | + |
| 15 | +diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c |
| 16 | +index 0cbfa9d559a27..33e44f14aa921 100644 |
| 17 | +--- a/drivers/dma/bcm2835-dma.c |
| 18 | ++++ b/drivers/dma/bcm2835-dma.c |
| 19 | +@@ -171,6 +171,17 @@ struct bcm2835_desc { |
| 20 | + #define WAIT_RESP(x) ((x & BCM2835_DMA_NO_WAIT_RESP) ? \ |
| 21 | + 0 : BCM2835_DMA_WAIT_RESP) |
| 22 | + |
| 23 | ++/* A fake bit to request that the driver requires wide reads */ |
| 24 | ++#define BCM2835_DMA_WIDE_SOURCE BIT(28) |
| 25 | ++#define WIDE_SOURCE(x) ((x & BCM2835_DMA_WIDE_SOURCE) ? \ |
| 26 | ++ BCM2835_DMA_S_WIDTH : 0) |
| 27 | ++ |
| 28 | ++/* A fake bit to request that the driver requires wide writes */ |
| 29 | ++#define BCM2835_DMA_WIDE_DEST BIT(29) |
| 30 | ++#define WIDE_DEST(x) ((x & BCM2835_DMA_WIDE_DEST) ? \ |
| 31 | ++ BCM2835_DMA_D_WIDTH : 0) |
| 32 | ++ |
| 33 | ++ |
| 34 | + /* debug register bits */ |
| 35 | + #define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0) |
| 36 | + #define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1) |
| 37 | +@@ -850,8 +861,9 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_memcpy( |
| 38 | + { |
| 39 | + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); |
| 40 | + struct bcm2835_desc *d; |
| 41 | +- u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC; |
| 42 | +- u32 extra = BCM2835_DMA_INT_EN | WAIT_RESP(c->dreq); |
| 43 | ++ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC | WAIT_RESP(c->dreq) | |
| 44 | ++ WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq); |
| 45 | ++ u32 extra = BCM2835_DMA_INT_EN; |
| 46 | + size_t max_len = bcm2835_dma_max_frame_length(c); |
| 47 | + size_t frames; |
| 48 | + |
| 49 | +@@ -881,7 +893,8 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg( |
| 50 | + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); |
| 51 | + struct bcm2835_desc *d; |
| 52 | + dma_addr_t src = 0, dst = 0; |
| 53 | +- u32 info = WAIT_RESP(c->dreq); |
| 54 | ++ u32 info = WAIT_RESP(c->dreq) | |
| 55 | ++ WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq); |
| 56 | + u32 extra = BCM2835_DMA_INT_EN; |
| 57 | + size_t frames; |
| 58 | + |
| 59 | +@@ -943,7 +956,7 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( |
| 60 | + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); |
| 61 | + struct bcm2835_desc *d; |
| 62 | + dma_addr_t src, dst; |
| 63 | +- u32 info = WAIT_RESP(c->dreq); |
| 64 | ++ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq); |
| 65 | + u32 extra = 0; |
| 66 | + size_t max_len = bcm2835_dma_max_frame_length(c); |
| 67 | + size_t frames; |
| 68 | +-- |
| 69 | +2.20.1 |
| 70 | + |
| 71 | + |
| 72 | +From 0db6b8af120801c123d6066a58110554ee3f3d83 Mon Sep 17 00:00:00 2001 |
| 73 | +From: Dom Cobley < [email protected]> |
| 74 | +Date: Wed, 30 Dec 2020 14:51:00 +0000 |
| 75 | +Subject: [PATCH 2/2] dts: Enable DMA_WIDE_SOURCE for hdmi audio dma |
| 76 | + |
| 77 | +Without this set, DVP_CFG_MAI0_CTL indicates occasional |
| 78 | +DLATE errors when configured to 8 channel 192kHz |
| 79 | +when sdram bandwidth is high (e.g. playing h.264 video) |
| 80 | + |
| 81 | +Signed-off-by: Dom Cobley < [email protected]> |
| 82 | +--- |
| 83 | + arch/arm/boot/dts/bcm2711-rpi.dtsi | 4 ++-- |
| 84 | + arch/arm/boot/dts/bcm2835-common.dtsi | 2 +- |
| 85 | + 2 files changed, 3 insertions(+), 3 deletions(-) |
| 86 | + |
| 87 | +diff --git a/arch/arm/boot/dts/bcm2711-rpi.dtsi b/arch/arm/boot/dts/bcm2711-rpi.dtsi |
| 88 | +index 4f903a787d65e..e67ecf3ae1613 100644 |
| 89 | +--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi |
| 90 | ++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi |
| 91 | +@@ -179,7 +179,7 @@ |
| 92 | + }; |
| 93 | + |
| 94 | + &hdmi0 { |
| 95 | +- dmas = <&dma (10|(1<<27))>; |
| 96 | ++ dmas = <&dma (10|(1<<27)|(1<<28))>; |
| 97 | + status = "disabled"; |
| 98 | + }; |
| 99 | + |
| 100 | +@@ -188,7 +188,7 @@ |
| 101 | + }; |
| 102 | + |
| 103 | + &hdmi1 { |
| 104 | +- dmas = <&dma (17|(1<<27))>; |
| 105 | ++ dmas = <&dma (17|(1<<27)|(1<<28))>; |
| 106 | + status = "disabled"; |
| 107 | + }; |
| 108 | + |
| 109 | +diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi |
| 110 | +index bd77ba3a3562b..12207f96ed9e2 100644 |
| 111 | +--- a/arch/arm/boot/dts/bcm2835-common.dtsi |
| 112 | ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi |
| 113 | +@@ -123,7 +123,7 @@ |
| 114 | + clocks = <&clocks BCM2835_PLLH_PIX>, |
| 115 | + <&clocks BCM2835_CLOCK_HSM>; |
| 116 | + clock-names = "pixel", "hdmi"; |
| 117 | +- dmas = <&dma (17|(1<<27))>; |
| 118 | ++ dmas = <&dma (17|(1<<27)|(1<<28))>; |
| 119 | + dma-names = "audio-rx"; |
| 120 | + status = "disabled"; |
| 121 | + }; |
| 122 | +-- |
| 123 | +2.20.1 |
| 124 | + |
0 commit comments