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| 1 | +// This source file is part of the Swift.org open source project |
| 2 | +// |
| 3 | +// Copyright (c) 2014 - 2015 Apple Inc. and the Swift project authors |
| 4 | +// Licensed under Apache License v2.0 with Runtime Library Exception |
| 5 | +// |
| 6 | +// See http://swift.org/LICENSE.txt for license information |
| 7 | +// See http://swift.org/CONTRIBUTORS.txt for the list of Swift project authors |
| 8 | +// |
| 9 | + |
| 10 | +/* |
| 11 | + File: OpenSwiftUITargetConditionals.h |
| 12 | + |
| 13 | + Contains: Autoconfiguration of TARGET_ conditionals for Mac OS X and iPhone |
| 14 | + |
| 15 | + Note: OpenSwiftUITargetConditionals.h in 3.4 Universal Interfaces works |
| 16 | + with all compilers. This header only recognizes compilers |
| 17 | + known to run on Mac OS X. |
| 18 | + |
| 19 | +*/ |
| 20 | + |
| 21 | +#ifndef __OPENSWIFTUITARGETCONDITIONALS__ |
| 22 | +#define __OPENSWIFTUITARGETCONDITIONALS__ |
| 23 | +/**************************************************************************************************** |
| 24 | +
|
| 25 | + TARGET_CPU_* |
| 26 | + These conditionals specify which microprocessor instruction set is being |
| 27 | + generated. At most one of these is true, the rest are false. |
| 28 | +
|
| 29 | + TARGET_CPU_PPC - Compiler is generating PowerPC instructions for 32-bit mode |
| 30 | + TARGET_CPU_PPC64 - Compiler is generating PowerPC instructions for 64-bit mode |
| 31 | + TARGET_CPU_68K - Compiler is generating 680x0 instructions |
| 32 | + TARGET_CPU_X86 - Compiler is generating x86 instructions |
| 33 | + TARGET_CPU_ARM - Compiler is generating ARM instructions |
| 34 | + TARGET_CPU_MIPS - Compiler is generating MIPS instructions |
| 35 | + TARGET_CPU_SPARC - Compiler is generating Sparc instructions |
| 36 | + TARGET_CPU_ALPHA - Compiler is generating Dec Alpha instructions |
| 37 | + TARGET_CPU_WASM32 - Compiler is generating WebAssembly instructions for 32-bit mode |
| 38 | +
|
| 39 | +
|
| 40 | + TARGET_OS_* |
| 41 | + These conditionals specify in which Operating System the generated code will |
| 42 | + run. Indention is used to show which conditionals are evolutionary subclasses. |
| 43 | + |
| 44 | + The MAC/WIN32/UNIX conditionals are mutually exclusive. |
| 45 | + The IOS/TV/WATCH conditionals are mutually exclusive. |
| 46 | + |
| 47 | + |
| 48 | + TARGET_OS_WIN32 - Generated code will run under 32-bit Windows |
| 49 | + TARGET_OS_UNIX - Generated code will run under some Unix (not OSX) |
| 50 | + TARGET_OS_CYGWIN - Generated code will run under 64-bit Cygwin |
| 51 | + TARGET_OS_WASI - Generated code will run under WebAssembly System Interface |
| 52 | + TARGET_OS_MAC - Generated code will run under Mac OS X variant |
| 53 | + TARGET_OS_IPHONE - Generated code for firmware, devices, or simulator |
| 54 | + TARGET_OS_IOS - Generated code will run under iOS |
| 55 | + TARGET_OS_TV - Generated code will run under Apple TV OS |
| 56 | + TARGET_OS_WATCH - Generated code will run under Apple Watch OS |
| 57 | + TARGET_OS_SIMULATOR - Generated code will run under a simulator |
| 58 | + TARGET_OS_EMBEDDED - Generated code for firmware |
| 59 | + |
| 60 | + TARGET_IPHONE_SIMULATOR - DEPRECATED: Same as TARGET_OS_SIMULATOR |
| 61 | + TARGET_OS_NANO - DEPRECATED: Same as TARGET_OS_WATCH |
| 62 | +
|
| 63 | + TARGET_RT_* |
| 64 | + These conditionals specify in which runtime the generated code will |
| 65 | + run. This is needed when the OS and CPU support more than one runtime |
| 66 | + (e.g. Mac OS X supports CFM and mach-o). |
| 67 | +
|
| 68 | + TARGET_RT_LITTLE_ENDIAN - Generated code uses little endian format for integers |
| 69 | + TARGET_RT_BIG_ENDIAN - Generated code uses big endian format for integers |
| 70 | + TARGET_RT_64_BIT - Generated code uses 64-bit pointers |
| 71 | + TARGET_RT_MAC_CFM - TARGET_OS_MAC is true and CFM68K or PowerPC CFM (TVectors) are used |
| 72 | + TARGET_RT_MAC_MACHO - TARGET_OS_MAC is true and Mach-O/dlyd runtime is used |
| 73 | + |
| 74 | +
|
| 75 | +****************************************************************************************************/ |
| 76 | + |
| 77 | +#if __APPLE__ |
| 78 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 1 |
| 79 | +#define OPENSWIFTUI_TARGET_OS_LINUX 0 |
| 80 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 0 |
| 81 | +#define OPENSWIFTUI_TARGET_OS_BSD 0 |
| 82 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 0 |
| 83 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 0 |
| 84 | +#define OPENSWIFTUI_TARGET_OS_WASI 0 |
| 85 | +#elif __ANDROID__ |
| 86 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 0 |
| 87 | +#define OPENSWIFTUI_TARGET_OS_LINUX 1 |
| 88 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 0 |
| 89 | +#define OPENSWIFTUI_TARGET_OS_BSD 0 |
| 90 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 1 |
| 91 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 0 |
| 92 | +#define OPENSWIFTUI_TARGET_OS_WASI 0 |
| 93 | +#elif __linux__ |
| 94 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 0 |
| 95 | +#define OPENSWIFTUI_TARGET_OS_LINUX 1 |
| 96 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 0 |
| 97 | +#define OPENSWIFTUI_TARGET_OS_BSD 0 |
| 98 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 0 |
| 99 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 0 |
| 100 | +#define OPENSWIFTUI_TARGET_OS_WASI 0 |
| 101 | +#elif __CYGWIN__ |
| 102 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 0 |
| 103 | +#define OPENSWIFTUI_TARGET_OS_LINUX 1 |
| 104 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 0 |
| 105 | +#define OPENSWIFTUI_TARGET_OS_BSD 0 |
| 106 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 0 |
| 107 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 1 |
| 108 | +#define OPENSWIFTUI_TARGET_OS_WASI 0 |
| 109 | +#elif _WIN32 || _WIN64 |
| 110 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 0 |
| 111 | +#define OPENSWIFTUI_TARGET_OS_LINUX 0 |
| 112 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 1 |
| 113 | +#define OPENSWIFTUI_TARGET_OS_BSD 0 |
| 114 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 0 |
| 115 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 0 |
| 116 | +#define OPENSWIFTUI_TARGET_OS_WASI 0 |
| 117 | +#elif __unix__ |
| 118 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 0 |
| 119 | +#define OPENSWIFTUI_TARGET_OS_LINUX 0 |
| 120 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 0 |
| 121 | +#define OPENSWIFTUI_TARGET_OS_BSD 1 |
| 122 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 0 |
| 123 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 0 |
| 124 | +#define OPENSWIFTUI_TARGET_OS_WASI 0 |
| 125 | +#elif __wasi__ |
| 126 | +#define OPENSWIFTUI_TARGET_OS_DARWIN 0 |
| 127 | +#define OPENSWIFTUI_TARGET_OS_LINUX 0 |
| 128 | +#define OPENSWIFTUI_TARGET_OS_WINDOWS 0 |
| 129 | +#define OPENSWIFTUI_TARGET_OS_BSD 0 |
| 130 | +#define OPENSWIFTUI_TARGET_OS_ANDROID 0 |
| 131 | +#define OPENSWIFTUI_TARGET_OS_CYGWIN 0 |
| 132 | +#define OPENSWIFTUI_TARGET_OS_WASI 1 |
| 133 | +#else |
| 134 | +#error unknown operating system |
| 135 | +#endif |
| 136 | + |
| 137 | +#define OPENSWIFTUI_TARGET_OS_WIN32 TARGET_OS_WINDOWS |
| 138 | +#define OPENSWIFTUI_TARGET_OS_MAC TARGET_OS_DARWIN |
| 139 | +#define OPENSWIFTUI_TARGET_OS_OSX TARGET_OS_DARWIN |
| 140 | + |
| 141 | +// iOS, watchOS, and tvOS are not supported |
| 142 | +#define OPENSWIFTUI_TARGET_OS_IPHONE 0 |
| 143 | +#define OPENSWIFTUI_TARGET_OS_IOS 0 |
| 144 | +#define OPENSWIFTUI_TARGET_OS_WATCH 0 |
| 145 | +#define OPENSWIFTUI_TARGET_OS_TV 0 |
| 146 | + |
| 147 | +#if __x86_64__ |
| 148 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 149 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 150 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 151 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 1 |
| 152 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 153 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 154 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 155 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 156 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 157 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 158 | +#elif __arm64__ || __aarch64__ |
| 159 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 160 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 161 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 162 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 163 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 164 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 1 |
| 165 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 166 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 167 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 168 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 169 | +#elif __mips64__ |
| 170 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 171 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 172 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 173 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 174 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 175 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 176 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 177 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 1 |
| 178 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 179 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 180 | +#elif __powerpc64__ |
| 181 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 182 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 1 |
| 183 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 184 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 185 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 186 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 187 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 188 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 189 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 190 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 191 | +#elif __i386__ |
| 192 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 193 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 194 | +#define OPENSWIFTUI_TARGET_CPU_X86 1 |
| 195 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 196 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 197 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 198 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 199 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 200 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 201 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 202 | +#elif __arm__ |
| 203 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 204 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 205 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 206 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 207 | +#define OPENSWIFTUI_TARGET_CPU_ARM 1 |
| 208 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 209 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 210 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 211 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 212 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 213 | +#elif __mips__ |
| 214 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 215 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 216 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 217 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 218 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 219 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 220 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 1 |
| 221 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 222 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 223 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 224 | +#elif __powerpc__ |
| 225 | +#define OPENSWIFTUI_TARGET_CPU_PPC 1 |
| 226 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 227 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 228 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 229 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 230 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 231 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 232 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 233 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 234 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 235 | +#elif __s390x__ |
| 236 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 237 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 238 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 239 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 240 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 241 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 242 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 243 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 244 | +#define OPENSWIFTUI_TARGET_CPU_S390X 1 |
| 245 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 0 |
| 246 | +#elif __wasm32__ |
| 247 | +#define OPENSWIFTUI_TARGET_CPU_PPC 0 |
| 248 | +#define OPENSWIFTUI_TARGET_CPU_PPC64 0 |
| 249 | +#define OPENSWIFTUI_TARGET_CPU_X86 0 |
| 250 | +#define OPENSWIFTUI_TARGET_CPU_X86_64 0 |
| 251 | +#define OPENSWIFTUI_TARGET_CPU_ARM 0 |
| 252 | +#define OPENSWIFTUI_TARGET_CPU_ARM64 0 |
| 253 | +#define OPENSWIFTUI_TARGET_CPU_MIPS 0 |
| 254 | +#define OPENSWIFTUI_TARGET_CPU_MIPS64 0 |
| 255 | +#define OPENSWIFTUI_TARGET_CPU_S390X 0 |
| 256 | +#define OPENSWIFTUI_TARGET_CPU_WASM32 1 |
| 257 | +#else |
| 258 | +#error unknown architecture |
| 259 | +#endif |
| 260 | + |
| 261 | +#if __LITTLE_ENDIAN__ |
| 262 | +#define OPENSWIFTUI_TARGET_RT_LITTLE_ENDIAN 1 |
| 263 | +#define OPENSWIFTUI_TARGET_RT_BIG_ENDIAN 0 |
| 264 | +#elif __BIG_ENDIAN__ |
| 265 | +#define OPENSWIFTUI_TARGET_RT_LITTLE_ENDIAN 0 |
| 266 | +#define OPENSWIFTUI_TARGET_RT_BIG_ENDIAN 1 |
| 267 | +#else |
| 268 | +#error unknown endian |
| 269 | +#endif |
| 270 | + |
| 271 | +#if __LP64__ || __LLP64__ || __POINTER_WIDTH__-0 == 64 |
| 272 | +#define OPENSWIFTUI_TARGET_RT_64_BIT 1 |
| 273 | +#else |
| 274 | +#define OPENSWIFTUI_TARGET_RT_64_BIT 0 |
| 275 | +#endif |
| 276 | + |
| 277 | +#endif /* __OPENSWIFTUITARGETCONDITIONALS__ */ |
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