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| 1 | +/**************************************************************************//** |
| 2 | + * @file startup_<Device>.s |
| 3 | + * @brief CMSIS Cortex-M# Core Device Startup File for |
| 4 | + * Device <Device> |
| 5 | + * @version V3.01 |
| 6 | + * @date 06. March 2012 |
| 7 | + * |
| 8 | + * @note Version CodeSourcery Sourcery G++ Lite (with CS3) |
| 9 | + * Copyright (C) 2012 ARM Limited. All rights reserved. |
| 10 | + * |
| 11 | + * @par |
| 12 | + * ARM Limited (ARM) is supplying this software for use with Cortex-M |
| 13 | + * processor based microcontrollers. This file can be freely distributed |
| 14 | + * within development tools that are supporting such ARM based processors. |
| 15 | + * |
| 16 | + * @par |
| 17 | + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
| 18 | + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
| 19 | + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
| 20 | + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
| 21 | + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
| 22 | + * |
| 23 | + ******************************************************************************/ |
| 24 | +/* |
| 25 | +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ |
| 26 | +*/ |
| 27 | + |
| 28 | + |
| 29 | +/* |
| 30 | +// <h> Stack Configuration |
| 31 | +// <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> |
| 32 | +// </h> |
| 33 | +*/ |
| 34 | + |
| 35 | + .equ Stack_Size, 0x00000400 |
| 36 | + .section ".stack", "w" |
| 37 | + .align 3 |
| 38 | + .globl __cs3_stack_mem |
| 39 | + .globl __cs3_stack_size |
| 40 | +__cs3_stack_mem: |
| 41 | + .if Stack_Size |
| 42 | + .space Stack_Size |
| 43 | + .endif |
| 44 | + .size __cs3_stack_mem, . - __cs3_stack_mem |
| 45 | + .set __cs3_stack_size, . - __cs3_stack_mem |
| 46 | + |
| 47 | + |
| 48 | +/* |
| 49 | +// <h> Heap Configuration |
| 50 | +// <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> |
| 51 | +// </h> |
| 52 | +*/ |
| 53 | + |
| 54 | + .equ Heap_Size, 0x00000100 |
| 55 | + |
| 56 | + .section ".heap", "w" |
| 57 | + .align 3 |
| 58 | + .globl __cs3_heap_start |
| 59 | + .globl __cs3_heap_end |
| 60 | +__cs3_heap_start: |
| 61 | + .if Heap_Size |
| 62 | + .space Heap_Size |
| 63 | + .endif |
| 64 | +__cs3_heap_end: |
| 65 | + |
| 66 | + |
| 67 | +/* Vector Table */ |
| 68 | + |
| 69 | + .section ".cs3.interrupt_vector" |
| 70 | + .globl __cs3_interrupt_vector_cortex_m |
| 71 | + .type __cs3_interrupt_vector_cortex_m, %object |
| 72 | + |
| 73 | +__cs3_interrupt_vector_cortex_m: |
| 74 | + .long __cs3_stack /* Top of Stack */ |
| 75 | + .long __cs3_reset /* Reset Handler */ |
| 76 | + .long NMI_Handler /* NMI Handler */ |
| 77 | + .long HardFault_Handler /* Hard Fault Handler */ |
| 78 | + .long MemManage_Handler /* MPU Fault Handler */ |
| 79 | + .long BusFault_Handler /* Bus Fault Handler */ |
| 80 | + .long UsageFault_Handler /* Usage Fault Handler */ |
| 81 | + .long 0 /* Reserved */ |
| 82 | + .long 0 /* Reserved */ |
| 83 | + .long 0 /* Reserved */ |
| 84 | + .long 0 /* Reserved */ |
| 85 | + .long SVC_Handler /* SVCall Handler */ |
| 86 | + .long DebugMon_Handler /* Debug Monitor Handler */ |
| 87 | + .long 0 /* Reserved */ |
| 88 | + .long PendSV_Handler /* PendSV Handler */ |
| 89 | + .long SysTick_Handler /* SysTick Handler */ |
| 90 | + |
| 91 | + /* External Interrupts */ |
| 92 | +/* ToDo: Add here the vectors for the device specific external interrupts handler */ |
| 93 | + .long CSV_Handler /* 0: Clock Super Visor */ |
| 94 | + .long SWDT_Handler /* 1: Software Watchdog Timer */ |
| 95 | + .long LVD_Handler /* 2: Low Voltage Detector */ |
| 96 | + .long MFT_WG_IRQHandler /* 3: Wave Form Generator / DTIF */ |
| 97 | + .long INT0_7_Handler /* 4: External Interrupt Request ch.0 to ch.7 */ |
| 98 | + .long INT8_15_Handler /* 5: External Interrupt Request ch.8 to ch.15 */ |
| 99 | + .long DT_Handler /* 6: Dual Timer / Quad Decoder */ |
| 100 | + .long MFS0RX_IRQHandler /* 7: MultiFunction Serial ch.0 */ |
| 101 | + .long MFS0TX_IRQHandler /* 8: MultiFunction Serial ch.0 */ |
| 102 | + .long MFS1RX_IRQHandler /* 9: MultiFunction Serial ch.1 */ |
| 103 | + .long MFS1TX_IRQHandler /* 10: MultiFunction Serial ch.1 */ |
| 104 | + .long MFS2RX_IRQHandler /* 11: MultiFunction Serial ch.2 */ |
| 105 | + .long MFS2TX_IRQHandler /* 12: MultiFunction Serial ch.2 */ |
| 106 | + .long MFS3RX_IRQHandler /* 13: MultiFunction Serial ch.3 */ |
| 107 | + .long MFS3TX_IRQHandler /* 14: MultiFunction Serial ch.3 */ |
| 108 | + .long MFS4RX_IRQHandler /* 15: MultiFunction Serial ch.4 */ |
| 109 | + .long MFS4TX_IRQHandler /* 16: MultiFunction Serial ch.4 */ |
| 110 | + .long MFS5RX_IRQHandler /* 17: MultiFunction Serial ch.5 */ |
| 111 | + .long MFS5TX_IRQHandler /* 18: MultiFunction Serial ch.5 */ |
| 112 | + .long MFS6RX_IRQHandler /* 19: MultiFunction Serial ch.6 */ |
| 113 | + .long MFS6TX_IRQHandler /* 20: MultiFunction Serial ch.6 */ |
| 114 | + .long MFS7RX_IRQHandler /* 21: MultiFunction Serial ch.7 */ |
| 115 | + .long MFS7TX_IRQHandler /* 22: MultiFunction Serial ch.7 */ |
| 116 | + .long PPG_Handler /* 23: PPG */ |
| 117 | + .long TIM_IRQHandler /* 24: OSC / PLL / Watch Counter */ |
| 118 | + .long ADC0_IRQHandler /* 25: ADC0 */ |
| 119 | + .long ADC1_IRQHandler /* 26: ADC1 */ |
| 120 | + .long ADC2_IRQHandler /* 27: ADC2 */ |
| 121 | + .long MFT_FRT_IRQHandler /* 28: Free-run Timer */ |
| 122 | + .long MFT_IPC_IRQHandler /* 29: Input Capture */ |
| 123 | + .long MFT_OPC_IRQHandler /* 30: Output Compare */ |
| 124 | + .long BT_IRQHandler /* 31: Base Timer ch.0 to ch.7 */ |
| 125 | + .long CAN0_IRQHandler /* 32: CAN ch.0 */ |
| 126 | + .long CAN1_IRQHandler /* 33: CAN ch.1 */ |
| 127 | + .long USBF_Handler /* 34: USB Function */ |
| 128 | + .long USB_Handler /* 35: USB Function / USB HOST */ |
| 129 | + .long RESERVED_1_IRQHandler /* 36: Reserved */ |
| 130 | + .long RESERVED_2_IRQHandler /* 37: Reserved */ |
| 131 | + .long DMAC0_Handler /* 38: DMAC ch.0 */ |
| 132 | + .long DMAC1_Handler /* 39: DMAC ch.1 */ |
| 133 | + .long DMAC2_Handler /* 40: DMAC ch.2 */ |
| 134 | + .long DMAC3_Handler /* 41: DMAC ch.3 */ |
| 135 | + .long DMAC4_Handler /* 42: DMAC ch.4 */ |
| 136 | + .long DMAC5_Handler /* 43: DMAC ch.5 */ |
| 137 | + .long DMAC6_Handler /* 44: DMAC ch.6 */ |
| 138 | + .long DMAC7_Handler /* 45: DMAC ch.7 */ |
| 139 | + .long RESERVED_3_IRQHandler /* 46: Reserved */ |
| 140 | + .long RESERVED_4_IRQHandler /* 47: Reserved */ |
| 141 | + |
| 142 | + .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m |
| 143 | + |
| 144 | + |
| 145 | + .thumb |
| 146 | + |
| 147 | + |
| 148 | +/* Reset Handler */ |
| 149 | + |
| 150 | + .section .cs3.reset,"x",%progbits |
| 151 | + .thumb_func |
| 152 | + .globl __cs3_reset_cortex_m |
| 153 | + .type __cs3_reset_cortex_m, %function |
| 154 | +__cs3_reset_cortex_m: |
| 155 | + .fnstart |
| 156 | + LDR R0, =SystemInit |
| 157 | + BLX R0 |
| 158 | + LDR R0,=_start |
| 159 | + BX R0 |
| 160 | + .pool |
| 161 | + .cantunwind |
| 162 | + .fnend |
| 163 | + .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m |
| 164 | + |
| 165 | + .section ".text" |
| 166 | + |
| 167 | +/* Exception Handlers */ |
| 168 | + |
| 169 | + .weak NMI_Handler |
| 170 | + .type NMI_Handler, %function |
| 171 | +NMI_Handler: |
| 172 | + B . |
| 173 | + .size NMI_Handler, . - NMI_Handler |
| 174 | + |
| 175 | + .weak HardFault_Handler |
| 176 | + .type HardFault_Handler, %function |
| 177 | +HardFault_Handler: |
| 178 | + B . |
| 179 | + .size HardFault_Handler, . - HardFault_Handler |
| 180 | + |
| 181 | + .weak MemManage_Handler |
| 182 | + .type MemManage_Handler, %function |
| 183 | +MemManage_Handler: |
| 184 | + B . |
| 185 | + .size MemManage_Handler, . - MemManage_Handler |
| 186 | + |
| 187 | + .weak BusFault_Handler |
| 188 | + .type BusFault_Handler, %function |
| 189 | +BusFault_Handler: |
| 190 | + B . |
| 191 | + .size BusFault_Handler, . - BusFault_Handler |
| 192 | + |
| 193 | + .weak UsageFault_Handler |
| 194 | + .type UsageFault_Handler, %function |
| 195 | +UsageFault_Handler: |
| 196 | + B . |
| 197 | + .size UsageFault_Handler, . - UsageFault_Handler |
| 198 | + |
| 199 | + .weak SVC_Handler |
| 200 | + .type SVC_Handler, %function |
| 201 | +SVC_Handler: |
| 202 | + B . |
| 203 | + .size SVC_Handler, . - SVC_Handler |
| 204 | + |
| 205 | + .weak DebugMon_Handler |
| 206 | + .type DebugMon_Handler, %function |
| 207 | +DebugMon_Handler: |
| 208 | + B . |
| 209 | + .size DebugMon_Handler, . - DebugMon_Handler |
| 210 | + |
| 211 | + .weak PendSV_Handler |
| 212 | + .type PendSV_Handler, %function |
| 213 | +PendSV_Handler: |
| 214 | + B . |
| 215 | + .size PendSV_Handler, . - PendSV_Handler |
| 216 | + |
| 217 | + .weak SysTick_Handler |
| 218 | + .type SysTick_Handler, %function |
| 219 | +SysTick_Handler: |
| 220 | + B . |
| 221 | + .size SysTick_Handler, . - SysTick_Handler |
| 222 | + |
| 223 | + |
| 224 | +/* IRQ Handlers */ |
| 225 | + |
| 226 | +/* ToDo: Add here the export definition for the device specific external interrupts handler */ |
| 227 | +/* ToDo: Add here the names for the device specific external interrupts handler */ |
| 228 | + .globl Default_Handler |
| 229 | + .type Default_Handler, %function |
| 230 | +Default_Handler: |
| 231 | + B . |
| 232 | + .size Default_Handler, . - Default_Handler |
| 233 | + |
| 234 | + .macro IRQ handler |
| 235 | + .weak \handler |
| 236 | + .set \handler, Default_Handler |
| 237 | + .endm |
| 238 | + |
| 239 | + IRQ CSV_Handler /* 0: Clock Super Visor */ |
| 240 | + IRQ SWDT_Handler /* 1: Software Watchdog Timer */ |
| 241 | + IRQ LVD_Handler /* 2: Low Voltage Detector */ |
| 242 | + IRQ MFT_WG_IRQHandler /* 3: Wave Form Generator / DTIF */ |
| 243 | + IRQ INT0_7_Handler /* 4: External Interrupt Request ch.0 to ch.7 */ |
| 244 | + IRQ INT8_15_Handler /* 5: External Interrupt Request ch.8 to ch.15 */ |
| 245 | + IRQ DT_Handler /* 6: Dual Timer / Quad Decoder */ |
| 246 | + IRQ MFS0RX_IRQHandler /* 7: MultiFunction Serial ch.0 */ |
| 247 | + IRQ MFS0TX_IRQHandler /* 8: MultiFunction Serial ch.0 */ |
| 248 | + IRQ MFS1RX_IRQHandler /* 9: MultiFunction Serial ch.1 */ |
| 249 | + IRQ MFS1TX_IRQHandler /* 10: MultiFunction Serial ch.1 */ |
| 250 | + IRQ MFS2RX_IRQHandler /* 11: MultiFunction Serial ch.2 */ |
| 251 | + IRQ MFS2TX_IRQHandler /* 12: MultiFunction Serial ch.2 */ |
| 252 | + IRQ MFS3RX_IRQHandler /* 13: MultiFunction Serial ch.3 */ |
| 253 | + IRQ MFS3TX_IRQHandler /* 14: MultiFunction Serial ch.3 */ |
| 254 | + IRQ MFS4RX_IRQHandler /* 15: MultiFunction Serial ch.4 */ |
| 255 | + IRQ MFS4TX_IRQHandler /* 16: MultiFunction Serial ch.4 */ |
| 256 | + IRQ MFS5RX_IRQHandler /* 17: MultiFunction Serial ch.5 */ |
| 257 | + IRQ MFS5TX_IRQHandler /* 18: MultiFunction Serial ch.5 */ |
| 258 | + IRQ MFS6RX_IRQHandler /* 19: MultiFunction Serial ch.6 */ |
| 259 | + IRQ MFS6TX_IRQHandler /* 20: MultiFunction Serial ch.6 */ |
| 260 | + IRQ MFS7RX_IRQHandler /* 21: MultiFunction Serial ch.7 */ |
| 261 | + IRQ MFS7TX_IRQHandler /* 22: MultiFunction Serial ch.7 */ |
| 262 | + IRQ PPG_Handler /* 23: PPG */ |
| 263 | + IRQ TIM_IRQHandler /* 24: OSC / PLL / Watch Counter */ |
| 264 | + IRQ ADC0_IRQHandler /* 25: ADC0 */ |
| 265 | + IRQ ADC1_IRQHandler /* 26: ADC1 */ |
| 266 | + IRQ ADC2_IRQHandler /* 27: ADC2 */ |
| 267 | + IRQ MFT_FRT_IRQHandler /* 28: Free-run Timer */ |
| 268 | + IRQ MFT_IPC_IRQHandler /* 29: Input Capture */ |
| 269 | + IRQ MFT_OPC_IRQHandler /* 30: Output Compare */ |
| 270 | + IRQ BT_IRQHandler /* 31: Base Timer ch.0 to ch.7 */ |
| 271 | + IRQ CAN0_IRQHandler /* 32: CAN ch.0 */ |
| 272 | + IRQ CAN1_IRQHandler /* 33: CAN ch.1 */ |
| 273 | + IRQ USBF_Handler /* 34: USB Function */ |
| 274 | + IRQ USB_Handler /* 35: USB Function / USB HOST */ |
| 275 | + IRQ RESERVED_1_IRQHandler /* 36: Reserved */ |
| 276 | + IRQ RESERVED_2_IRQHandler /* 37: Reserved */ |
| 277 | + IRQ DMAC0_Handler /* 38: DMAC ch.0 */ |
| 278 | + IRQ DMAC1_Handler /* 39: DMAC ch.1 */ |
| 279 | + IRQ DMAC2_Handler /* 40: DMAC ch.2 */ |
| 280 | + IRQ DMAC3_Handler /* 41: DMAC ch.3 */ |
| 281 | + IRQ DMAC4_Handler /* 42: DMAC ch.4 */ |
| 282 | + IRQ DMAC5_Handler /* 43: DMAC ch.5 */ |
| 283 | + IRQ DMAC6_Handler /* 44: DMAC ch.6 */ |
| 284 | + IRQ DMAC7_Handler /* 45: DMAC ch.7 */ |
| 285 | + IRQ RESERVED_3_IRQHandler /* 46: Reserved */ |
| 286 | + IRQ RESERVED_4_IRQHandler /* 47: Reserved */ |
| 287 | + |
| 288 | + .end |
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