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[bsp][stm32] hardware i2c driver add support for STM32F1 series
1 parent 74b2d3d commit 02a1149

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5 files changed

+266
-118
lines changed

5 files changed

+266
-118
lines changed

‎bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/dma_config.h

+46-2
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,13 @@ extern "C" {
1919
#endif
2020

2121
/* DMA1 channel1 */
22+
#if defined(BSP_ADC1_USING_DMA) && !defined(ADC1_DMA_INSTANCE)
23+
#define ADC1_DMA_IRQHandler DMA1_Channel1_IRQHandler
24+
#define ADC1_DMA_RCC RCC_AHBENR_DMA1EN
25+
#define ADC1_DMA_INSTANCE DMA1_Channel1
26+
#define ADC1_DMA_IRQ DMA1_Channel1_IRQn
27+
#endif
28+
2229
/* DMA1 channel2 */
2330
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
2431
#define SPI1_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
@@ -56,6 +63,11 @@ extern "C" {
5663
#define UART1_TX_DMA_RCC RCC_AHBENR_DMA1EN
5764
#define UART1_TX_DMA_INSTANCE DMA1_Channel4
5865
#define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn
66+
#elif defined(BSP_I2C2_TX_USING_DMA) && !defined(I2C2_TX_DMA_INSTANCE)
67+
#define I2C2_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler
68+
#define I2C2_TX_DMA_RCC RCC_AHBENR_DMA1EN
69+
#define I2C2_TX_DMA_INSTANCE DMA1_Channel4
70+
#define I2C2_TX_DMA_IRQ DMA1_Channel4_IRQn
5971
#endif
6072

6173
/* DMA1 channel5 */
@@ -64,12 +76,16 @@ extern "C" {
6476
#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
6577
#define SPI2_TX_DMA_INSTANCE DMA1_Channel5
6678
#define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn
67-
6879
#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
6980
#define UART1_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler
7081
#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
7182
#define UART1_RX_DMA_INSTANCE DMA1_Channel5
7283
#define UART1_RX_DMA_IRQ DMA1_Channel5_IRQn
84+
#elif defined(BSP_I2C2_RX_USING_DMA) && !defined(I2C2_RX_DMA_INSTANCE)
85+
#define I2C2_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler
86+
#define I2C2_RX_DMA_RCC RCC_AHBENR_DMA1EN
87+
#define I2C2_RX_DMA_INSTANCE DMA1_Channel5
88+
#define I2C2_RX_DMA_IRQ DMA1_Channel5_IRQn
7389
#endif
7490

7591
/* DMA1 channel6 */
@@ -78,6 +94,11 @@ extern "C" {
7894
#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
7995
#define UART2_RX_DMA_INSTANCE DMA1_Channel6
8096
#define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn
97+
#elif defined(BSP_I2C1_TX_USING_DMA) && !defined(I2C1_TX_DMA_INSTANCE)
98+
#define I2C1_DMA_TX_IRQHandler DMA1_Channel6_IRQHandler
99+
#define I2C1_TX_DMA_RCC RCC_AHBENR_DMA1EN
100+
#define I2C1_TX_DMA_INSTANCE DMA1_Channel6
101+
#define I2C1_TX_DMA_IRQ DMA1_Channel6_IRQn
81102
#endif
82103

83104
/* DMA1 channel7 */
@@ -86,6 +107,11 @@ extern "C" {
86107
#define UART2_TX_DMA_RCC RCC_AHBENR_DMA1EN
87108
#define UART2_TX_DMA_INSTANCE DMA1_Channel7
88109
#define UART2_TX_DMA_IRQ DMA1_Channel7_IRQn
110+
#elif defined(BSP_I2C1_RX_USING_DMA) && !defined(I2C1_RX_DMA_INSTANCE)
111+
#define I2C1_DMA_RX_IRQHandler DMA1_Channel7_IRQHandler
112+
#define I2C1_RX_DMA_RCC RCC_AHBENR_DMA1EN
113+
#define I2C1_RX_DMA_INSTANCE DMA1_Channel7
114+
#define I2C1_RX_DMA_IRQ DMA1_Channel7_IRQn
89115
#endif
90116

91117
/* DMA2 channel1 */
@@ -111,9 +137,27 @@ extern "C" {
111137
#define UART4_RX_DMA_INSTANCE DMA2_Channel3
112138
#define UART4_RX_DMA_IRQ DMA2_Channel3_IRQn
113139
#endif
140+
114141
/* DMA2 channel4 */
142+
#if defined(BSP_SDIO_TX_USING_DMA) && !defined(SDIO_TX_DMA_INSTANCE)
143+
#define SDIO_DMA_TX_IRQHandler DMA2_Channel4_5_IRQHandler
144+
#define SDIO_TX_DMA_RCC RCC_AHBENR_DMA2EN
145+
#define SDIO_TX_DMA_INSTANCE DMA2_Channel4
146+
#define SDIO_TX_DMA_IRQ DMA2_Channel4_5_IRQn
147+
#elif defined(BSP_SDIO_RX_USING_DMA) && !defined(SDIO_RX_DMA_INSTANCE)
148+
#define SDIO_DMA_RX_IRQHandler DMA2_Channel4_5_IRQHandler
149+
#define SDIO_RX_DMA_RCC RCC_AHBENR_DMA2EN
150+
#define SDIO_RX_DMA_INSTANCE DMA2_Channel4
151+
#define SDIO_RX_DMA_IRQ DMA2_Channel4_5_IRQn
152+
#endif
153+
115154
/* DMA2 channel5 */
116-
#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
155+
#if defined(BSP_ADC3_USING_DMA) && !defined(ADC3_DMA_INSTANCE)
156+
#define ADC3_DMA_IRQHandler DMA2_Channel4_5_IRQHandler
157+
#define ADC3_DMA_RCC RCC_AHBENR_DMA2EN
158+
#define ADC3_DMA_INSTANCE DMA2_Channel5
159+
#define ADC3_DMA_IRQ DMA2_Channel4_5_IRQn
160+
#elif defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
117161
#define UART4_DMA_TX_IRQHandler DMA2_Channel4_5_IRQHandler
118162
#define UART4_TX_DMA_RCC RCC_AHBENR_DMA2EN
119163
#define UART4_TX_DMA_INSTANCE DMA2_Channel5

‎bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/i2c_hard_config.h

+129
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,129 @@
1+
/*
2+
* Copyright (c) 2006-2023, RT-Thread Development Team
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2024-02-06 Dyyt587 first version
9+
* 2024-04-23 Zeidan Add I2Cx_xx_DMA_CONFIG
10+
*/
11+
#ifndef __I2C_HARD_CONFIG_H__
12+
#define __I2C_HARD_CONFIG_H__
13+
14+
#include <rtthread.h>
15+
16+
#ifdef __cplusplus
17+
extern "C" {
18+
#endif
19+
20+
#ifdef BSP_USING_HARD_I2C1
21+
#ifndef I2C1_BUS_CONFIG
22+
#define I2C1_BUS_CONFIG \
23+
{ \
24+
.Instance = I2C1, \
25+
.timeout=0x1000, \
26+
.name = "hwi2c1", \
27+
.evirq_type = I2C1_EV_IRQn, \
28+
.erirq_type = I2C1_ER_IRQn, \
29+
}
30+
#endif /* I2C1_BUS_CONFIG */
31+
#endif /* BSP_USING_HARD_I2C1 */
32+
33+
#ifdef BSP_I2C1_TX_USING_DMA
34+
#ifndef I2C1_TX_DMA_CONFIG
35+
#define I2C1_TX_DMA_CONFIG \
36+
{ \
37+
.dma_rcc = I2C1_TX_DMA_RCC, \
38+
.Instance = I2C1_TX_DMA_INSTANCE, \
39+
.dma_irq = I2C1_TX_DMA_IRQ, \
40+
}
41+
#endif /* I2C1_TX_DMA_CONFIG */
42+
#endif /* BSP_I2C1_TX_USING_DMA */
43+
44+
#ifdef BSP_I2C1_RX_USING_DMA
45+
#ifndef I2C1_RX_DMA_CONFIG
46+
#define I2C1_RX_DMA_CONFIG \
47+
{ \
48+
.dma_rcc = I2C1_RX_DMA_RCC, \
49+
.Instance = I2C1_RX_DMA_INSTANCE, \
50+
.dma_irq = I2C1_RX_DMA_IRQ, \
51+
}
52+
#endif /* I2C1_RX_DMA_CONFIG */
53+
#endif /* BSP_I2C1_RX_USING_DMA */
54+
55+
#ifdef BSP_USING_HARD_I2C2
56+
#ifndef I2C2_BUS_CONFIG
57+
#define I2C2_BUS_CONFIG \
58+
{ \
59+
.Instance = I2C2, \
60+
.timeout=0x1000, \
61+
.name = "hwi2c2", \
62+
.evirq_type = I2C2_EV_IRQn, \
63+
.erirq_type = I2C2_ER_IRQn, \
64+
}
65+
#endif /* I2C2_BUS_CONFIG */
66+
#endif /* BSP_USING_HARD_I2C2 */
67+
68+
#ifdef BSP_I2C2_TX_USING_DMA
69+
#ifndef I2C2_TX_DMA_CONFIG
70+
#define I2C2_TX_DMA_CONFIG \
71+
{ \
72+
.dma_rcc = I2C2_TX_DMA_RCC, \
73+
.Instance = I2C2_TX_DMA_INSTANCE, \
74+
.dma_irq = I2C2_TX_DMA_IRQ, \
75+
}
76+
#endif /* I2C2_TX_DMA_CONFIG */
77+
#endif /* BSP_I2C2_TX_USING_DMA */
78+
79+
#ifdef BSP_I2C2_RX_USING_DMA
80+
#ifndef I2C2_RX_DMA_CONFIG
81+
#define I2C2_RX_DMA_CONFIG \
82+
{ \
83+
.dma_rcc = I2C2_RX_DMA_RCC, \
84+
.Instance = I2C2_RX_DMA_INSTANCE, \
85+
.dma_irq = I2C2_RX_DMA_IRQ, \
86+
}
87+
#endif /* I2C2_RX_DMA_CONFIG */
88+
#endif /* BSP_I2C2_RX_USING_DMA */
89+
90+
#ifdef BSP_USING_HARD_I2C3
91+
#ifndef I2C3_BUS_CONFIG
92+
#define I2C3_BUS_CONFIG \
93+
{ \
94+
.Instance = I2C3, \
95+
.timeout=0x1000, \
96+
.name = "hwi2c3", \
97+
.evirq_type = I2C3_EV_IRQn, \
98+
.erirq_type = I2C3_ER_IRQn, \
99+
}
100+
#endif /* I2C3_BUS_CONFIG */
101+
#endif /* BSP_USING_HARD_I2C3 */
102+
103+
#ifdef BSP_I2C3_TX_USING_DMA
104+
#ifndef I2C3_TX_DMA_CONFIG
105+
#define I2C3_TX_DMA_CONFIG \
106+
{ \
107+
.dma_rcc = I2C3_TX_DMA_RCC, \
108+
.Instance = I2C3_TX_DMA_INSTANCE, \
109+
.dma_irq = I2C3_TX_DMA_IRQ, \
110+
}
111+
#endif /* I2C3_TX_DMA_CONFIG */
112+
#endif /* BSP_I2C3_TX_USING_DMA */
113+
114+
#ifdef BSP_I2C3_RX_USING_DMA
115+
#ifndef I2C3_RX_DMA_CONFIG
116+
#define I2C3_RX_DMA_CONFIG \
117+
{ \
118+
.dma_rcc = I2C3_RX_DMA_RCC, \
119+
.Instance = I2C3_RX_DMA_INSTANCE, \
120+
.dma_irq = I2C3_RX_DMA_IRQ, \
121+
}
122+
#endif /* I2C3_RX_DMA_CONFIG */
123+
#endif /* BSP_I2C3_RX_USING_DMA */
124+
125+
#ifdef __cplusplus
126+
}
127+
#endif
128+
129+
#endif /*__I2C_HARD_CONFIG_H__ */

‎bsp/stm32/libraries/HAL_Drivers/drivers/drv_config.h

+1
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ extern "C" {
3535
#include "f1/sdio_config.h"
3636
#include "f1/pwm_config.h"
3737
#include "f1/usbd_config.h"
38+
#include "f1/i2c_hard_config.h"
3839
#include "f1/pulse_encoder_config.h"
3940
#elif defined(SOC_SERIES_STM32F2)
4041
#include "f2/dma_config.h"

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