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BernardXiongBernardXiong
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Merge pull request #3799 from OpenNuvoton/m480
[nuvoton] Sync drivers of Nuvoton-M480 platform.
2 parents 6e797c9 + f0fc569 commit 0bcfe89

27 files changed

+458
-346
lines changed

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_eadc.h

+12-8
Original file line numberDiff line numberDiff line change
@@ -433,11 +433,12 @@ extern "C"
433433
u32ModuleNum,\
434434
u32Condition,\
435435
u16CMPData,\
436-
u32MatchCount) ((eadc)->CMP[0] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
436+
u32MatchCount) ((eadc)->CMP[0] = (((eadc)->CMP[0] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
437+
(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
437438
(u32Condition) |\
438439
((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
439440
(((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
440-
EADC_CMP_ADCMPEN_Msk))
441+
EADC_CMP_ADCMPEN_Msk)))
441442

442443
/**
443444
* @brief Configure the comparator 1 and enable it.
@@ -458,11 +459,12 @@ extern "C"
458459
u32ModuleNum,\
459460
u32Condition,\
460461
u16CMPData,\
461-
u32MatchCount) ((eadc)->CMP[1] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
462+
u32MatchCount) ((eadc)->CMP[1] = (((eadc)->CMP[1] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
463+
(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
462464
(u32Condition) |\
463465
((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
464466
(((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
465-
EADC_CMP_ADCMPEN_Msk))
467+
EADC_CMP_ADCMPEN_Msk)))
466468

467469
/**
468470
* @brief Configure the comparator 2 and enable it.
@@ -483,11 +485,12 @@ extern "C"
483485
u32ModuleNum,\
484486
u32Condition,\
485487
u16CMPData,\
486-
u32MatchCount) ((eadc)->CMP[2] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
488+
u32MatchCount) ((eadc)->CMP[2] = (((eadc)->CMP[2] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
489+
(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
487490
(u32Condition) |\
488491
((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
489492
(((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
490-
EADC_CMP_ADCMPEN_Msk))
493+
EADC_CMP_ADCMPEN_Msk)))
491494

492495
/**
493496
* @brief Configure the comparator 3 and enable it.
@@ -508,11 +511,12 @@ extern "C"
508511
u32ModuleNum,\
509512
u32Condition,\
510513
u16CMPData,\
511-
u32MatchCount) ((eadc)->CMP[3] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
514+
u32MatchCount) ((eadc)->CMP[3] = (((eadc)->CMP[3] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
515+
(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
512516
(u32Condition) |\
513517
((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
514518
(((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
515-
EADC_CMP_ADCMPEN_Msk))
519+
EADC_CMP_ADCMPEN_Msk)))
516520

517521
/**
518522
* @brief Enable the compare window mode.

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_qspi.h

+18
Original file line numberDiff line numberDiff line change
@@ -95,6 +95,15 @@ extern "C"
9595
*/
9696
#define QSPI_TRIGGER_TX_PDMA(qspi) ((qspi)->PDMACTL |= QSPI_PDMACTL_TXPDMAEN_Msk)
9797

98+
/**
99+
* @brief Trigger TX and RX PDMA function.
100+
* @param[in] qspi The pointer of the specified QSPI module.
101+
* @return None.
102+
* @details Set TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to enable TX and RX PDMA transfer function.
103+
* \hideinitializer
104+
*/
105+
#define QSPI_TRIGGER_TX_RX_PDMA(qspi) ((qspi)->PDMACTL |= (QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk))
106+
98107
/**
99108
* @brief Disable RX PDMA transfer.
100109
* @param[in] qspi The pointer of the specified QSPI module.
@@ -113,6 +122,15 @@ extern "C"
113122
*/
114123
#define QSPI_DISABLE_TX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_TXPDMAEN_Msk )
115124

125+
/**
126+
* @brief Disable TX and RX PDMA transfer.
127+
* @param[in] qspi The pointer of the specified QSPI module.
128+
* @return None.
129+
* @details Clear TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to disable TX and RX PDMA transfer function.
130+
* \hideinitializer
131+
*/
132+
#define QSPI_DISABLE_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~(QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) )
133+
116134
/**
117135
* @brief Get the count of available data in RX FIFO.
118136
* @param[in] qspi The pointer of the specified QSPI module.

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_spi.h

+18
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,15 @@ extern "C"
133133
*/
134134
#define SPI_TRIGGER_TX_PDMA(spi) ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk)
135135

136+
/**
137+
* @brief Trigger TX and RX PDMA function.
138+
* @param[in] spi The pointer of the specified SPI module.
139+
* @return None.
140+
* @details Set TXPDMAEN bit and RXPDMAEN bit of SPI_PDMACTL register to enable TX and RX PDMA transfer function.
141+
* \hideinitializer
142+
*/
143+
#define SPI_TRIGGER_TX_RX_PDMA(spi) ((spi)->PDMACTL |= (SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RXPDMAEN_Msk))
144+
136145
/**
137146
* @brief Disable RX PDMA transfer.
138147
* @param[in] spi The pointer of the specified SPI module.
@@ -151,6 +160,15 @@ extern "C"
151160
*/
152161
#define SPI_DISABLE_TX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )
153162

163+
/**
164+
* @brief Disable TX and RX PDMA transfer.
165+
* @param[in] spi The pointer of the specified SPI module.
166+
* @return None.
167+
* @details Clear TXPDMAEN bit and RXPDMAEN bit of SPI_PDMACTL register to disable TX and RX PDMA transfer function.
168+
* \hideinitializer
169+
*/
170+
#define SPI_DISABLE_TX_RX_PDMA(spi) ( (spi)->PDMACTL &= ~(SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RXPDMAEN_Msk) )
171+
154172
/**
155173
* @brief Get the count of available data in RX FIFO.
156174
* @param[in] spi The pointer of the specified SPI module.

‎bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_spi.h

+18
Original file line numberDiff line numberDiff line change
@@ -361,6 +361,15 @@ extern "C"
361361
*/
362362
#define USPI_TRIGGER_TX_PDMA(uspi) ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
363363

364+
/**
365+
* @brief Trigger TX and RX PDMA function.
366+
* @param[in] uspi The pointer of the specified USCI_SPI module.
367+
* @return None.
368+
* @details Set TXPDMAEN bit and RXPDMAEN bit of USPI_PDMACTL register to enable TX and RX PDMA transfer function.
369+
* \hideinitializer
370+
*/
371+
#define USPI_TRIGGER_TX_RX_PDMA(uspi) ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_RXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
372+
364373
/**
365374
* @brief Disable RX PDMA transfer.
366375
* @param[in] uspi The pointer of the specified USCI_SPI module.
@@ -379,6 +388,15 @@ extern "C"
379388
*/
380389
#define USPI_DISABLE_TX_PDMA(uspi) ( (uspi)->PDMACTL &= ~USPI_PDMACTL_TXPDMAEN_Msk )
381390

391+
/**
392+
* @brief Disable TX and RX PDMA transfer.
393+
* @param[in] uspi The pointer of the specified USCI_SPI module.
394+
* @return None.
395+
* @details Clear TXPDMAEN bit and RXPDMAEN bit of USPI_PDMACTL register to disable TX and RX PDMA transfer function.
396+
* \hideinitializer
397+
*/
398+
#define USPI_DISABLE_TX_RX_PDMA(uspi) ( (uspi)->PDMACTL &= ~(USPI_PDMACTL_TXPDMAEN_Msk | USPI_PDMACTL_RXPDMAEN_Msk))
399+
382400
uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock);
383401
void USPI_Close(USPI_T *uspi);
384402
void USPI_ClearRxBuf(USPI_T *uspi);

‎bsp/nuvoton/libraries/m480/rtt_port/Kconfig

+27-17
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ config SOC_SERIES_M480
5757
select RT_USING_NETDEV
5858

5959
config NU_EMAC_PDMA_MEMCOPY
60-
bool "Use PDMA for data tranferring"
60+
bool "Use PDMA for data transferring"
6161
select BSP_USING_PDMA
6262
depends on BSP_USING_EMAC
6363
default y
@@ -82,14 +82,15 @@ config SOC_SERIES_M480
8282

8383
menuconfig BSP_USING_EADC
8484
bool "Enable Enhanced Analog-to-Digital Converter(EADC)"
85+
select RT_USING_ADC
8586

86-
config BSP_USING_EADC0
87-
bool "Enable EADC0"
88-
depends on BSP_USING_EADC && RT_USING_ADC
87+
if BSP_USING_EADC
88+
config BSP_USING_EADC0
89+
bool "Enable EADC0"
8990

90-
config BSP_USING_EADC1
91-
bool "Enable EADC1"
92-
depends on BSP_USING_EADC && RT_USING_ADC
91+
config BSP_USING_EADC1
92+
bool "Enable EADC1"
93+
endif
9394

9495
menuconfig BSP_USING_TMR
9596
bool "Enable Timer Controller(TIMER)"
@@ -371,12 +372,14 @@ config SOC_SERIES_M480
371372

372373
config BSP_USING_UI2C0
373374
select RT_USING_I2C
375+
select BSP_USING_UI2C
374376
bool "UI2C0"
375377
help
376378
Choose this option if you need I2C function mode.
377379

378380
config BSP_USING_USPI0
379381
select RT_USING_SPI
382+
select BSP_USING_USPI
380383
bool "USPI0"
381384
help
382385
Choose this option if you need SPI function mode.
@@ -391,7 +394,7 @@ config SOC_SERIES_M480
391394
depends on BSP_USING_UUART0 && RT_SERIAL_USING_DMA
392395

393396
config BSP_USING_USPI0_PDMA
394-
bool "Use PDMA for data tranferring"
397+
bool "Use PDMA for data transferring"
395398
select BSP_USING_USPI_PDMA
396399
depends on BSP_USING_USPI0
397400
endif
@@ -405,21 +408,21 @@ config SOC_SERIES_M480
405408

406409
config BSP_USING_UUART1
407410
select RT_USING_SERIAL
408-
select BSP_USING_UUART
411+
select BSP_USING_UUART
409412
bool "UUART1"
410413
help
411414
Choose this option if you need UART function mode.
412415

413416
config BSP_USING_UI2C1
414417
select RT_USING_I2C
415-
select BSP_USING_UI2C
418+
select BSP_USING_UI2C
416419
bool "UI2C1"
417420
help
418421
Choose this option if you need I2C function mode.
419422

420423
config BSP_USING_USPI1
421424
select RT_USING_SPI
422-
select BSP_USING_USPI
425+
select BSP_USING_USPI
423426
bool "USPI1"
424427
help
425428
Choose this option if you need SPI function mode.
@@ -434,7 +437,7 @@ config SOC_SERIES_M480
434437
depends on BSP_USING_UUART1 && RT_SERIAL_USING_DMA
435438

436439
config BSP_USING_USPI1_PDMA
437-
bool "Use PDMA for data tranferring"
440+
bool "Use PDMA for data transferring"
438441
select BSP_USING_USPI_PDMA
439442
depends on BSP_USING_USPI1
440443
endif
@@ -459,6 +462,10 @@ config SOC_SERIES_M480
459462
config NU_SDH_HOTPLUG
460463
bool "Using HOTPLUG"
461464
default y
465+
466+
config NU_SDH_MOUNT_ON_ROOT
467+
bool "Mount on root"
468+
462469
endif
463470

464471
menuconfig BSP_USING_CAN
@@ -652,7 +659,7 @@ config SOC_SERIES_M480
652659
select BSP_USING_SPI_PDMA
653660
depends on BSP_USING_SPI1
654661
endif
655-
662+
656663
choice
657664
prompt "Select SPI2 function mode"
658665
config BSP_USING_SPI2_NONE
@@ -686,7 +693,7 @@ config SOC_SERIES_M480
686693
bool "NONE"
687694
help
688695
Choose this option if you need not SPI3.
689-
696+
690697
config BSP_USING_SPI3
691698
bool "Enable SPI3"
692699
help
@@ -724,20 +731,23 @@ config SOC_SERIES_M480
724731
bool "Enable Quad Serial Peripheral Interface(QSPI)"
725732
select RT_USING_SPI
726733
select RT_USING_QSPI
734+
select BSP_USING_SPI
727735

728-
if BSP_USING_QSPI
736+
if BSP_USING_QSPI
729737
config BSP_USING_QSPI0
730738
bool "Enable QSPI0"
731739

732740
config BSP_USING_QSPI0_PDMA
733741
bool "Enable PDMA for QSPI0"
742+
select BSP_USING_SPI_PDMA
734743
depends on BSP_USING_QSPI0
735744

736745
config BSP_USING_QSPI1
737746
bool "Enable QSPI1"
738747

739748
config BSP_USING_QSPI1_PDMA
740-
bool "Enable PDMA for QSPI1"
749+
bool "Enable PDMA for QSPI1"
750+
select BSP_USING_SPI_PDMA
741751
depends on BSP_USING_QSPI1
742752
endif
743753

@@ -857,7 +867,7 @@ config SOC_SERIES_M480
857867

858868
if BSP_USING_CRC
859869
config NU_CRC_USE_PDMA
860-
bool "Use PDMA for data tranferring."
870+
bool "Use PDMA for data transferring."
861871
select BSP_USING_PDMA
862872
default y
863873
endif

‎bsp/nuvoton/libraries/m480/rtt_port/drv_can.c

+10-9
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@ static struct nu_can nu_can_arr[] =
9797
},
9898
#endif
9999
{0}
100-
}; /* usart nu_usart */
100+
}; /* struct nu_can */
101101

102102
/* Public functions ------------------------------------------------------------*/
103103

@@ -112,7 +112,7 @@ static const struct rt_can_ops nu_can_ops =
112112

113113
static const struct can_configure nu_can_default_config = NU_CAN_CONFIG_DEFAULT;
114114

115-
/* Interrupt Handle Funtion ----------------------------------------------------*/
115+
/* Interrupt Handle Function ----------------------------------------------------*/
116116
#if defined(BSP_USING_CAN0)
117117
/* CAN0 interrupt entry */
118118
void CAN0_IRQHandler(void)
@@ -238,7 +238,7 @@ static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure
238238
RT_ASSERT(can != RT_NULL);
239239
RT_ASSERT(cfg != RT_NULL);
240240

241-
/* Get base address of uart register */
241+
/* Get base address of CAN register */
242242
CAN_T *can_base = ((nu_can_t)can)->can_base;
243243

244244
RT_ASSERT(can_base != RT_NULL);
@@ -312,7 +312,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
312312
#ifdef RT_CAN_USING_HDR
313313
struct rt_can_filter_config *filter_cfg;
314314
#endif
315-
/* Get base address of uart register */
315+
/* Get base address of CAN register */
316316
CAN_T *can_base = ((nu_can_t)can)->can_base;
317317

318318
RT_ASSERT(can_base != RT_NULL);
@@ -346,7 +346,6 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
346346
{
347347
/* Enable Status Change Interrupt */
348348
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
349-
NVIC_SetPriority(((nu_can_t)can)->can_irq_n, (1 << __NVIC_PRIO_BITS) - 2);
350349
/* Enable NVIC interrupt. */
351350
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
352351

@@ -355,7 +354,6 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
355354
{
356355
/* Enable Error Status and Status Change Interrupt */
357356
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
358-
NVIC_SetPriority(((nu_can_t)can)->can_irq_n, (1 << __NVIC_PRIO_BITS) - 2);
359357
/* Enable NVIC interrupt. */
360358
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
361359
}
@@ -440,6 +438,9 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
440438
rt_memcpy(arg, &can->status, sizeof(can->status));
441439
}
442440
break;
441+
default:
442+
return -(RT_EINVAL);
443+
443444
}
444445

445446
return RT_EOK;
@@ -449,7 +450,7 @@ static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_
449450
{
450451
STR_CANMSG_T tMsg;
451452
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
452-
/* Get base address of uart register */
453+
/* Get base address of CAN register */
453454
CAN_T *can_base = ((nu_can_t)can)->can_base;
454455

455456
RT_ASSERT(can_base != RT_NULL);
@@ -495,7 +496,7 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
495496
{
496497
STR_CANMSG_T tMsg;
497498
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
498-
/* Get base address of uart register */
499+
/* Get base address of CAN register */
499500
CAN_T *can_base = ((nu_can_t)can)->can_base;
500501

501502
RT_ASSERT(can_base != RT_NULL);
@@ -558,7 +559,7 @@ static int rt_hw_can_init(void)
558559
RT_ASSERT(ret == RT_EOK);
559560
}
560561

561-
return ret;
562+
return (int)ret;
562563
}
563564
INIT_DEVICE_EXPORT(rt_hw_can_init);
564565
#endif //#if defined(BSP_USING_CAN)

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