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bsp:cvitek: add pinmux for spi
Board level pin available info: duo & duo256: NAME SPI CV1800B/GPIO <PINNAME>__<FUNCNAME> ---- --- ------------ --------------------- GP6 SPI2_SCK PWR_GPIO[23] SD1_CLK__SPI2_SCK GP7 SPI2_SDO PWR_GPIO[22] SD1_CMD__SPI2_SDO GP8 SPI2_SDI PWR_GPIO[21] SD1_D0__SPI2_SDI GP9 SPI2_CS_X PWR_GPIO[18] SD1_D3__SPI2_CS_X Signed-off-by: Chen Wang <[email protected]>
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‎bsp/cvitek/c906_little/board/Kconfig

+78
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,84 @@ menu "General Drivers Configuration"
164164
select RT_USING_SPI
165165
default n
166166

167+
if BSP_USING_SPI
168+
config BSP_USING_SPI0
169+
bool "Enable SPI 0"
170+
default n
171+
172+
if BSP_USING_SPI0
173+
config BSP_SPI0_SCK_PINNAME
174+
string "spi0 sck pin name"
175+
default ""
176+
config BSP_SPI0_SDO_PINNAME
177+
string "spi0 sdo pin name"
178+
default ""
179+
config BSP_SPI0_SDI_PINNAME
180+
string "spi0 sdi pin name"
181+
default ""
182+
config BSP_SPI0_CS_PINNAME
183+
string "spi0 cs pin name"
184+
default ""
185+
endif
186+
187+
config BSP_USING_SPI1
188+
bool "Enable SPI 1"
189+
default n
190+
191+
if BSP_USING_SPI1
192+
config BSP_SPI1_SCK_PINNAME
193+
string "spi1 sck pin name"
194+
default ""
195+
config BSP_SPI1_SDO_PINNAME
196+
string "spi1 sdo pin name"
197+
default ""
198+
config BSP_SPI1_SDI_PINNAME
199+
string "spi1 sdi pin name"
200+
default ""
201+
config BSP_SPI1_CS_PINNAME
202+
string "spi1 cs pin name"
203+
default ""
204+
endif
205+
206+
config BSP_USING_SPI2
207+
bool "Enable SPI 2"
208+
default n
209+
210+
if BSP_USING_SPI2
211+
config BSP_SPI2_SCK_PINNAME
212+
string "spi2 sck pin name"
213+
default ""
214+
config BSP_SPI2_SDO_PINNAME
215+
string "spi2 sdo pin name"
216+
default ""
217+
config BSP_SPI2_SDI_PINNAME
218+
string "spi2 sdi pin name"
219+
default ""
220+
config BSP_SPI2_CS_PINNAME
221+
string "spi2 cs pin name"
222+
default ""
223+
endif
224+
225+
config BSP_USING_SPI3
226+
bool "Enable SPI 3"
227+
default n
228+
229+
if BSP_USING_SPI3
230+
config BSP_SPI3_SCK_PINNAME
231+
string "spi3 sck pin name"
232+
default ""
233+
config BSP_SPI3_SDO_PINNAME
234+
string "spi3 sdo pin name"
235+
default ""
236+
config BSP_SPI3_SDI_PINNAME
237+
string "spi3 sdi pin name"
238+
default ""
239+
config BSP_SPI3_CS_PINNAME
240+
string "spi3 cs pin name"
241+
default ""
242+
endif
243+
endif
244+
167245
menuconfig BSP_USING_WDT
168246
bool "Enable Watchdog Timer"
169247
select RT_USING_WDT

‎bsp/cvitek/cv18xx_risc-v/board/Kconfig

+78
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,84 @@ menu "General Drivers Configuration"
164164
select RT_USING_SPI
165165
default n
166166

167+
if BSP_USING_SPI
168+
config BSP_USING_SPI0
169+
bool "Enable SPI 0"
170+
default n
171+
172+
if BSP_USING_SPI0
173+
config BSP_SPI0_SCK_PINNAME
174+
string "spi0 sck pin name"
175+
default ""
176+
config BSP_SPI0_SDO_PINNAME
177+
string "spi0 sdo pin name"
178+
default ""
179+
config BSP_SPI0_SDI_PINNAME
180+
string "spi0 sdi pin name"
181+
default ""
182+
config BSP_SPI0_CS_PINNAME
183+
string "spi0 cs pin name"
184+
default ""
185+
endif
186+
187+
config BSP_USING_SPI1
188+
bool "Enable SPI 1"
189+
default n
190+
191+
if BSP_USING_SPI1
192+
config BSP_SPI1_SCK_PINNAME
193+
string "spi1 sck pin name"
194+
default ""
195+
config BSP_SPI1_SDO_PINNAME
196+
string "spi1 sdo pin name"
197+
default ""
198+
config BSP_SPI1_SDI_PINNAME
199+
string "spi1 sdi pin name"
200+
default ""
201+
config BSP_SPI1_CS_PINNAME
202+
string "spi1 cs pin name"
203+
default ""
204+
endif
205+
206+
config BSP_USING_SPI2
207+
bool "Enable SPI 2"
208+
default n
209+
210+
if BSP_USING_SPI2
211+
config BSP_SPI2_SCK_PINNAME
212+
string "spi2 sck pin name"
213+
default ""
214+
config BSP_SPI2_SDO_PINNAME
215+
string "spi2 sdo pin name"
216+
default ""
217+
config BSP_SPI2_SDI_PINNAME
218+
string "spi2 sdi pin name"
219+
default ""
220+
config BSP_SPI2_CS_PINNAME
221+
string "spi2 cs pin name"
222+
default ""
223+
endif
224+
225+
config BSP_USING_SPI3
226+
bool "Enable SPI 3"
227+
default n
228+
229+
if BSP_USING_SPI3
230+
config BSP_SPI3_SCK_PINNAME
231+
string "spi3 sck pin name"
232+
default ""
233+
config BSP_SPI3_SDO_PINNAME
234+
string "spi3 sdo pin name"
235+
default ""
236+
config BSP_SPI3_SDI_PINNAME
237+
string "spi3 sdi pin name"
238+
default ""
239+
config BSP_SPI3_CS_PINNAME
240+
string "spi3 cs pin name"
241+
default ""
242+
endif
243+
endif
244+
167245
menuconfig BSP_USING_WDT
168246
bool "Enable Watchdog Timer"
169247
select RT_USING_WDT

‎bsp/cvitek/drivers/drv_spi.c

+104
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
*/
1010

1111
#include "drv_spi.h"
12+
#include "drv_pinmux.h"
1213

1314
#define DBG_TAG "drv.spi"
1415
#define DBG_LVL DBG_INFO
@@ -209,11 +210,114 @@ const static struct rt_spi_ops drv_spi_ops =
209210
spixfer,
210211
};
211212

213+
#if defined(BOARD_TYPE_MILKV_DUO) || defined(BOARD_TYPE_MILKV_DUO_SPINOR) || defined(BOARD_TYPE_MILKV_DUO256M) || defined(BOARD_TYPE_MILKV_DUO256M_SPINOR)
214+
215+
#ifdef BSP_USING_SPI0
216+
static const char *pinname_whitelist_spi0_sck[] = {
217+
NULL,
218+
};
219+
static const char *pinname_whitelist_spi0_sdo[] = {
220+
NULL,
221+
};
222+
static const char *pinname_whitelist_spi0_sdi[] = {
223+
NULL,
224+
};
225+
static const char *pinname_whitelist_spi0_cs[] = {
226+
NULL,
227+
};
228+
#endif
229+
230+
#ifdef BSP_USING_SPI1
231+
static const char *pinname_whitelist_spi1_sck[] = {
232+
NULL,
233+
};
234+
static const char *pinname_whitelist_spi1_sdo[] = {
235+
NULL,
236+
};
237+
static const char *pinname_whitelist_spi1_sdi[] = {
238+
NULL,
239+
};
240+
static const char *pinname_whitelist_spi1_cs[] = {
241+
NULL,
242+
};
243+
#endif
244+
245+
#ifdef BSP_USING_SPI2
246+
static const char *pinname_whitelist_spi2_sck[] = {
247+
"SD1_CLK",
248+
NULL,
249+
};
250+
static const char *pinname_whitelist_spi2_sdo[] = {
251+
"SD1_CMD",
252+
NULL,
253+
};
254+
static const char *pinname_whitelist_spi2_sdi[] = {
255+
"SD1_D0",
256+
NULL,
257+
};
258+
static const char *pinname_whitelist_spi2_cs[] = {
259+
"SD1_D3",
260+
NULL,
261+
};
262+
#endif
263+
264+
#ifdef BSP_USING_SPI3
265+
static const char *pinname_whitelist_spi3_sck[] = {
266+
NULL,
267+
};
268+
static const char *pinname_whitelist_spi3_sdo[] = {
269+
NULL,
270+
};
271+
static const char *pinname_whitelist_spi3_sdi[] = {
272+
NULL,
273+
};
274+
static const char *pinname_whitelist_spi3_cs[] = {
275+
NULL,
276+
};
277+
#endif
278+
279+
#else
280+
#error "Unsupported board type!"
281+
#endif
282+
283+
static void rt_hw_spi_pinmux_config()
284+
{
285+
#ifdef BSP_USING_SPI0
286+
pinmux_config(BSP_SPI0_SCK_PINNAME, SPI0_SCK, pinname_whitelist_spi0_sck);
287+
pinmux_config(BSP_SPI0_SDO_PINNAME, SPI0_SDO, pinname_whitelist_spi0_sdo);
288+
pinmux_config(BSP_SPI0_SDI_PINNAME, SPI0_SDI, pinname_whitelist_spi0_sdi);
289+
pinmux_config(BSP_SPI0_CS_PINNAME, SPI0_CS_X, pinname_whitelist_spi0_cs);
290+
#endif /* BSP_USING_SPI0 */
291+
292+
#ifdef BSP_USING_SPI1
293+
pinmux_config(BSP_SPI1_SCK_PINNAME, SPI1_SCK, pinname_whitelist_spi1_sck);
294+
pinmux_config(BSP_SPI1_SDO_PINNAME, SPI1_SDO, pinname_whitelist_spi1_sdo);
295+
pinmux_config(BSP_SPI1_SDI_PINNAME, SPI1_SDI, pinname_whitelist_spi1_sdi);
296+
pinmux_config(BSP_SPI1_CS_PINNAME, SPI1_CS_X, pinname_whitelist_spi1_cs);
297+
#endif /* BSP_USING_SPI1 */
298+
299+
#ifdef BSP_USING_SPI2
300+
pinmux_config(BSP_SPI2_SCK_PINNAME, SPI2_SCK, pinname_whitelist_spi2_sck);
301+
pinmux_config(BSP_SPI2_SDO_PINNAME, SPI2_SDO, pinname_whitelist_spi2_sdo);
302+
pinmux_config(BSP_SPI2_SDI_PINNAME, SPI2_SDI, pinname_whitelist_spi2_sdi);
303+
pinmux_config(BSP_SPI2_CS_PINNAME, SPI2_CS_X, pinname_whitelist_spi2_cs);
304+
#endif /* BSP_USING_SPI2 */
305+
306+
#ifdef BSP_USING_SPI3
307+
pinmux_config(BSP_SPI3_SCK_PINNAME, SPI3_SCK, pinname_whitelist_spi3_sck);
308+
pinmux_config(BSP_SPI3_SDO_PINNAME, SPI3_SDO, pinname_whitelist_spi3_sdo);
309+
pinmux_config(BSP_SPI3_SDI_PINNAME, SPI3_SDI, pinname_whitelist_spi3_sdi);
310+
pinmux_config(BSP_SPI3_CS_PINNAME, SPI3_CS_X, pinname_whitelist_spi3_cs);
311+
#endif /* BSP_USING_SPI3 */
312+
}
313+
212314
int rt_hw_spi_init(void)
213315
{
214316
rt_err_t ret = RT_EOK;
215317
struct spi_regs *reg = NULL;
216318

319+
rt_hw_spi_pinmux_config();
320+
217321
for (rt_size_t i = 0; i < sizeof(cv1800_spi_obj) / sizeof(struct cv1800_spi); i++) {
218322
/* set reg base addr */
219323
reg = get_spi_base(cv1800_spi_obj[i].spi_id);

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