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| 1 | +/* |
| 2 | + * Copyright (c) 2006-2024, RT-Thread Development Team |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Change Logs: |
| 7 | + * Date Author Notes |
| 8 | + * 2024/04/23 sakumisu first version |
| 9 | + */ |
| 10 | +#ifndef CHERRYUSB_CONFIG_H |
| 11 | +#define CHERRYUSB_CONFIG_H |
| 12 | + |
| 13 | +#define CHERRYUSB_VERSION 0x010200 |
| 14 | +#define CHERRYUSB_VERSION_STR "v1.2.0" |
| 15 | + |
| 16 | +/* ================ USB common Configuration ================ */ |
| 17 | +#include <rtthread.h> |
| 18 | + |
| 19 | +#define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__) |
| 20 | + |
| 21 | +#define usb_malloc(size) rt_malloc(size) |
| 22 | +#define usb_free(ptr) rt_free(ptr) |
| 23 | + |
| 24 | +#ifndef CONFIG_USB_DBG_LEVEL |
| 25 | +#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO |
| 26 | +#endif |
| 27 | + |
| 28 | +/* Enable print with color */ |
| 29 | +#define CONFIG_USB_PRINTF_COLOR_ENABLE |
| 30 | + |
| 31 | +/* data align size when use dma */ |
| 32 | +#ifndef CONFIG_USB_ALIGN_SIZE |
| 33 | +#define CONFIG_USB_ALIGN_SIZE 4 |
| 34 | +#endif |
| 35 | + |
| 36 | +/* attribute data into no cache ram */ |
| 37 | +#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) |
| 38 | + |
| 39 | +/* ================= USB Device Stack Configuration ================ */ |
| 40 | + |
| 41 | +/* Ep0 in and out transfer buffer */ |
| 42 | +#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN |
| 43 | +#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512 |
| 44 | +#endif |
| 45 | + |
| 46 | +/* Setup packet log for debug */ |
| 47 | +// #define CONFIG_USBDEV_SETUP_LOG_PRINT |
| 48 | + |
| 49 | +/* Check if the input descriptor is correct */ |
| 50 | +// #define CONFIG_USBDEV_DESC_CHECK |
| 51 | + |
| 52 | +/* Enable test mode */ |
| 53 | +// #define CONFIG_USBDEV_TEST_MODE |
| 54 | + |
| 55 | +#ifndef CONFIG_USBDEV_MSC_MAX_LUN |
| 56 | +#define CONFIG_USBDEV_MSC_MAX_LUN 1 |
| 57 | +#endif |
| 58 | + |
| 59 | +#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE |
| 60 | +#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512 |
| 61 | +#endif |
| 62 | + |
| 63 | +#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING |
| 64 | +#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING "" |
| 65 | +#endif |
| 66 | + |
| 67 | +#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING |
| 68 | +#define CONFIG_USBDEV_MSC_PRODUCT_STRING "" |
| 69 | +#endif |
| 70 | + |
| 71 | +#ifndef CONFIG_USBDEV_MSC_VERSION_STRING |
| 72 | +#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01" |
| 73 | +#endif |
| 74 | + |
| 75 | +// #define CONFIG_USBDEV_MSC_THREAD |
| 76 | + |
| 77 | +#ifndef CONFIG_USBDEV_MSC_PRIO |
| 78 | +#define CONFIG_USBDEV_MSC_PRIO 4 |
| 79 | +#endif |
| 80 | + |
| 81 | +#ifndef CONFIG_USBDEV_MSC_STACKSIZE |
| 82 | +#define CONFIG_USBDEV_MSC_STACKSIZE 2048 |
| 83 | +#endif |
| 84 | + |
| 85 | +#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE |
| 86 | +#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 |
| 87 | +#endif |
| 88 | + |
| 89 | +#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE |
| 90 | +#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1536 |
| 91 | +#endif |
| 92 | + |
| 93 | +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID |
| 94 | +#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff |
| 95 | +#endif |
| 96 | + |
| 97 | +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC |
| 98 | +#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB" |
| 99 | +#endif |
| 100 | + |
| 101 | +#define CONFIG_USBDEV_RNDIS_USING_LWIP |
| 102 | + |
| 103 | +/* ================ USB HOST Stack Configuration ================== */ |
| 104 | + |
| 105 | +#define CONFIG_USBHOST_MAX_RHPORTS 1 |
| 106 | +#define CONFIG_USBHOST_MAX_EXTHUBS 1 |
| 107 | +#define CONFIG_USBHOST_MAX_EHPORTS 4 |
| 108 | +#define CONFIG_USBHOST_MAX_INTERFACES 8 |
| 109 | +#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8 |
| 110 | +#define CONFIG_USBHOST_MAX_ENDPOINTS 4 |
| 111 | + |
| 112 | +#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4 |
| 113 | +#define CONFIG_USBHOST_MAX_HID_CLASS 4 |
| 114 | +#define CONFIG_USBHOST_MAX_MSC_CLASS 2 |
| 115 | +#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1 |
| 116 | +#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1 |
| 117 | + |
| 118 | +#define CONFIG_USBHOST_DEV_NAMELEN 16 |
| 119 | + |
| 120 | +#ifndef CONFIG_USBHOST_PSC_PRIO |
| 121 | +#define CONFIG_USBHOST_PSC_PRIO 0 |
| 122 | +#endif |
| 123 | +#ifndef CONFIG_USBHOST_PSC_STACKSIZE |
| 124 | +#define CONFIG_USBHOST_PSC_STACKSIZE 2048 |
| 125 | +#endif |
| 126 | + |
| 127 | +//#define CONFIG_USBHOST_GET_STRING_DESC |
| 128 | + |
| 129 | +// #define CONFIG_USBHOST_MSOS_ENABLE |
| 130 | +#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE |
| 131 | +#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00 |
| 132 | +#endif |
| 133 | + |
| 134 | +/* Ep0 max transfer buffer */ |
| 135 | +#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN |
| 136 | +#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512 |
| 137 | +#endif |
| 138 | + |
| 139 | +#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT |
| 140 | +#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500 |
| 141 | +#endif |
| 142 | + |
| 143 | +#ifndef CONFIG_USBHOST_MSC_TIMEOUT |
| 144 | +#define CONFIG_USBHOST_MSC_TIMEOUT 5000 |
| 145 | +#endif |
| 146 | + |
| 147 | +/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, |
| 148 | + * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS |
| 149 | + */ |
| 150 | +#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE |
| 151 | +#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048) |
| 152 | +#endif |
| 153 | +#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE |
| 154 | +#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048) |
| 155 | +#endif |
| 156 | + |
| 157 | +#define CONFIG_USBHOST_BLUETOOTH_HCI_H4 |
| 158 | +// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG |
| 159 | + |
| 160 | +#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE |
| 161 | +#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048 |
| 162 | +#endif |
| 163 | +#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE |
| 164 | +#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048 |
| 165 | +#endif |
| 166 | + |
| 167 | +/* ================ USB Device Port Configuration ================*/ |
| 168 | + |
| 169 | +#ifndef CONFIG_USBDEV_MAX_BUS |
| 170 | +#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip |
| 171 | +#endif |
| 172 | + |
| 173 | +#ifndef CONFIG_USBDEV_EP_NUM |
| 174 | +#define CONFIG_USBDEV_EP_NUM 4 |
| 175 | +#endif |
| 176 | + |
| 177 | +/* ---------------- FSDEV Configuration ---------------- */ |
| 178 | +//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference |
| 179 | + |
| 180 | +/* ---------------- DWC2 Configuration ---------------- */ |
| 181 | +// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (320) |
| 182 | +// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) |
| 183 | +// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4) |
| 184 | +// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) |
| 185 | +// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) |
| 186 | +// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) |
| 187 | +// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4) |
| 188 | +// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4) |
| 189 | +// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) |
| 190 | +// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) |
| 191 | + |
| 192 | +/* ---------------- MUSB Configuration ---------------- */ |
| 193 | +// #define CONFIG_USB_MUSB_SUNXI |
| 194 | + |
| 195 | +/* ================ USB Host Port Configuration ==================*/ |
| 196 | +#ifndef CONFIG_USBHOST_MAX_BUS |
| 197 | +#define CONFIG_USBHOST_MAX_BUS 1 |
| 198 | +#endif |
| 199 | + |
| 200 | +#ifndef CONFIG_USBHOST_PIPE_NUM |
| 201 | +#define CONFIG_USBHOST_PIPE_NUM 10 |
| 202 | +#endif |
| 203 | + |
| 204 | +/* ---------------- EHCI Configuration ---------------- */ |
| 205 | + |
| 206 | +#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0) |
| 207 | +#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 |
| 208 | +#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM |
| 209 | +#define CONFIG_USB_EHCI_QTD_NUM 3 |
| 210 | +#define CONFIG_USB_EHCI_ITD_NUM 20 |
| 211 | +#define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE |
| 212 | +// #define CONFIG_USB_EHCI_CONFIGFLAG |
| 213 | +// #define CONFIG_USB_EHCI_ISO |
| 214 | +// #define CONFIG_USB_EHCI_WITH_OHCI |
| 215 | + |
| 216 | +/* ---------------- OHCI Configuration ---------------- */ |
| 217 | +#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) |
| 218 | + |
| 219 | +/* ---------------- XHCI Configuration ---------------- */ |
| 220 | +#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) |
| 221 | + |
| 222 | +/* ---------------- DWC2 Configuration ---------------- */ |
| 223 | +/* largest non-periodic USB packet used / 4 */ |
| 224 | +// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4) |
| 225 | +/* largest periodic USB packet used / 4 */ |
| 226 | +// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4) |
| 227 | +/* |
| 228 | + * (largest USB packet used / 4) + 1 for status information + 1 transfer complete + |
| 229 | + * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario |
| 230 | + */ |
| 231 | +// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE) / 4) |
| 232 | + |
| 233 | +/* ---------------- MUSB Configuration ---------------- */ |
| 234 | +// #define CONFIG_USB_MUSB_SUNXI |
| 235 | + |
| 236 | +#endif |
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