feat: low level, bringup

Author: polarvid

libcpu/risc-v/t-head/c906/SConscript

@@ -1,11 +1,13 @@
 # RT-Thread building script for component
 
 from building import *
-
 cwd     = GetCurrentDir()
 src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
 CPPPATH = [cwd]
 
+if not GetDepend('ARCH_USING_ASID'):
+    SrcRemove(src, ['asid.c'])
+
 group = DefineGroup('libcpu', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

libcpu/risc-v/t-head/c906/sbi.c

@@ -68,8 +68,8 @@ static struct sbi_ret sbi_get_impl_version(void)
 
 void sbi_print_version(void)
 {
-    unsigned int major;
-    unsigned int minor;
+    uint32_t major;
+    uint32_t minor;
 
     /* For legacy SBI implementations. */
     if (sbi_spec_version == 0)

libcpu/risc-v/t-head/c906/sbi.h

@@ -48,6 +48,7 @@
 #ifndef _MACHINE_SBI_H_
 #define _MACHINE_SBI_H_
 
+#include <stdint.h>
 #include <rtdef.h>
 
 /* SBI Specification Version */
@@ -140,7 +141,7 @@ struct sbi_ret
     long value;
 };
 
-static inline struct sbi_ret
+rt_inline struct sbi_ret
 sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1,
          uint64_t arg2, uint64_t arg3, uint64_t arg4)
 {

libcpu/risc-v/t-head/c906/startup_gcc.S

@@ -75,6 +75,8 @@ _start:
     li x31,0
 
     /* set to disable FPU */
+    li t0, SSTATUS_FS + SSTATUS_VS
+    csrc sstatus, t0
     li t0, SSTATUS_SUM
     csrs sstatus, t0
 

libcpu/risc-v/t-head/c906/syscall_c.c

@@ -26,7 +26,7 @@
 #include "riscv_mmu.h"
 #include "stack.h"
 
-typedef rt_size_t (*syscallfunc_t)(rt_size_t, rt_size_t, rt_size_t, rt_size_t, rt_size_t, rt_size_t, rt_size_t);
+typedef rt_ubase_t (*syscallfunc_t)(rt_ubase_t, rt_ubase_t, rt_ubase_t, rt_ubase_t, rt_ubase_t, rt_ubase_t, rt_ubase_t);
 
 void syscall_handler(struct rt_hw_stack_frame *regs)
 {

libcpu/risc-v/virt64/SConscript

@@ -1,14 +1,16 @@
 # RT-Thread building script for component
 
 from building import *
-
-Import('rtconfig')
-
 cwd     = GetCurrentDir()
 src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
-src     = src + ['../common/atomic_riscv.c']
 CPPPATH = [cwd]
 
+if not GetDepend('ARCH_USING_ASID'):
+    SrcRemove(src, ['asid.c'])
+
+if not GetDepend('ARCH_RISCV_VECTOR'):
+    SrcRemove(src, ['vector_gcc.S'])
+
 group = DefineGroup('libcpu', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

libcpu/risc-v/virt64/sbi.h

@@ -141,7 +141,7 @@ struct sbi_ret
     long value;
 };
 
-static __inline struct sbi_ret
+rt_inline struct sbi_ret
 sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1,
          uint64_t arg2, uint64_t arg3, uint64_t arg4)
 {

libcpu/risc-v/virt64/startup_gcc.S

@@ -8,14 +8,15 @@
  * 2018/10/01     Bernard      The first version
  * 2018/12/27     Jesven       Add SMP support
  * 2020/6/12      Xim          Port to QEMU and remove SMP support
+ * 2024-06-30     Shell        Support of kernel remapping
  */
 
 #include <encoding.h>
 #include <cpuport.h>
 
     .data
     .global boot_hartid    /* global varible rt_boot_hartid in .data section */
-boot_hartid:                          
+boot_hartid:
     .word 0xdeadbeef
 
     .global         _start