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Merge pull request #107 from penzn/memop-semantics
Add Python pseudocode to memory operations
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proposals/simd/SIMD.md

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@@ -701,6 +701,11 @@ natural alignment.
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Load a `v128` vector from the given heap address.
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```python
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def S.load(memarg):
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return S.from_bytes(memory[memarg.offset:memarg.offset + 16])
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```
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### Load and Splat
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* `v8x16.load_splat(memarg) -> v128`
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Load a single element and splat to all lanes of a `v128` vector.
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```python
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def S.load_splat(memarg):
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val_bytes = memory[memarg.offset:memarg.offset + S.LaneBytes])
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return S.splat(S.LaneType.from_bytes(val_bytes))
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```
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### Load and Extend
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* `i16x8.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane
@@ -721,12 +732,32 @@ Load a single element and splat to all lanes of a `v128` vector.
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Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up to 64 bits.
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```python
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def S.load_extend(ext, memarg):
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result = S.New()
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bytes = memory[memarg.offset:memarg.offset + 8])
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for i in range(S.Lanes):
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result[i] = ext(S.LaneType.from_bytes(bytes[(i * S.LaneBytes/2):((i+1) * S.LaneBytes/2)]))
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return result
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def S.load_extend_s(memarg):
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return S.load_extend(Sext, memarg)
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def S.load_extend_u(memarg):
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return S.load_extend(Zext, memarg)
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```
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### Store
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* `v128.store(memarg, data: v128)`
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Store a `v128` vector to the given heap address.
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```python
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def S.store(memarg, a):
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memory[memarg.offset:memarg.offset + 16] = bytes(a)
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```
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## Floating-point sign bit operations
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These floating point operations are simple manipulations of the sign bit. No

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