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Add syntax for SIMD instructions
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‎document/core/syntax/instructions.rst

Lines changed: 143 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,16 @@ The following sections group instructions into a number of different categories.
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.. _syntax-fbinop:
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.. _syntax-ftestop:
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.. _syntax-frelop:
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.. _syntax-vunop:
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.. _syntax-vbinop:
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.. _syntax-vternop:
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.. _syntax-vtestop:
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.. _syntax-vshiftop:
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.. _syntax-viunop:
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.. _syntax-vibinop:
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.. _syntax-vsatbinop:
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.. _syntax-vfunop:
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.. _syntax-vfbinop:
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.. _syntax-instr-numeric:
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Numeric Instructions
@@ -47,15 +57,27 @@ These operations closely match respective operations available in hardware.
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\begin{array}{llcl}
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\production{width} & \X{nn}, \X{mm} &::=&
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\K{32} ~|~ \K{64} \\
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\production{simdwidth} & \X{sss} &::=&
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\K{128} \\
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\production{signedness} & \sx &::=&
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\K{u} ~|~ \K{s} \\
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\production{ishape} & \X{ixx} &::=&
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\K{i8x16} ~|~ \K{i16x8} ~|~ \K{i32x4} ~|~ \K{i64x2} \\
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\production{fshape} & \X{fxx} &::=&
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\K{f32x4} ~|~ \K{f64x2} \\
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\production{vshape} & \X{vxx} &::=&
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\X{ixx} ~|~ \X{fxx} \\
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\production{instruction} & \instr &::=&
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\K{i}\X{nn}\K{.}\CONST~\xref{syntax/values}{syntax-int}{\iX{\X{nn}}} ~|~
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\K{f}\X{nn}\K{.}\CONST~\xref{syntax/values}{syntax-float}{\fX{\X{nn}}} \\&&|&
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\K{f}\X{nn}\K{.}\CONST~\xref{syntax/values}{syntax-float}{\fX{\X{nn}}} ~|~
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\K{v}\X{sss}\K{.}\CONST~\xref{syntax/values}{syntax-simd}{\vX{\X{sss}}} \\&&|&
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\K{i}\X{nn}\K{.}\iunop ~|~
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\K{f}\X{nn}\K{.}\funop \\&&|&
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\K{f}\X{nn}\K{.}\funop ~|~
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\K{v}\X{sss}\K{.}\vunop \\&&|&
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\K{i}\X{nn}\K{.}\ibinop ~|~
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\K{f}\X{nn}\K{.}\fbinop \\&&|&
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\K{f}\X{nn}\K{.}\fbinop ~|~
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\K{v}\X{sss}\K{.}\vbinop \\&&|&
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\K{v}\X{sss}\K{.}\vternop \\&&|&
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\K{i}\X{nn}\K{.}\itestop \\&&|&
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\K{i}\X{nn}\K{.}\irelop ~|~
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\K{f}\X{nn}\K{.}\frelop \\&&|&
@@ -71,6 +93,49 @@ These operations closely match respective operations available in hardware.
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\K{f}\X{nn}\K{.}\CONVERT\K{\_i}\X{mm}\K{\_}\sx \\&&|&
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\K{i}\X{nn}\K{.}\REINTERPRET\K{\_f}\X{nn} ~|~
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\K{f}\X{nn}\K{.}\REINTERPRET\K{\_i}\X{nn} \\&&|&
96+
\K{v8x16.}\SHUFFLE ~|~ \K{v8x16.}\SWIZZLE \\&&|&
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\X{vxx}\K{.}\SPLAT \\&&|&
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\K{i8x16.}\EXTRACTLANE\K{\_}\sx ~|~
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\K{i16x8.}\EXTRACTLANE\K{\_}\sx \\&&|&
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\K{i32x4.}\EXTRACTLANE ~|~
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\K{i64x2.}\EXTRACTLANE \\&&|&
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\X{fxx}\K{.}\EXTRACTLANE \\&&|&
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\X{vxx}\K{.}\REPLACELANE \\&&|&
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\X{ixx}\K{.}\irelop \\&&|&
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\X{fxx}\K{.}\frelop \\&&|&
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\K{i8x16.}\viunop ~|~
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\K{i16x8.}\viunop ~|~
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\K{i32x4.}\viunop \\&&|&
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\K{i64x2.}\NEG \\&&|&
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\X{fxx.}\vfunop \\&&|&
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\K{i8x16.}\vtestop ~|~
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\K{i16x8.}\vtestop ~|~
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\K{i32x4.}\vtestop \\&&|&
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\K{i8x16.}\BITMASK ~|~
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\K{i16x8.}\BITMASK ~|~
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\K{i32x4.}\BITMASK \\&&|&
117+
\K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~
118+
\K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|&
119+
\K{i16x8.}\WIDEN\K{\_low}\K{\_i8x16\_}\sx ~|~
120+
\K{i32x4.}\WIDEN\K{\_low}\K{\_i16x8\_}\sx \\&&|&
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\K{i16x8.}\WIDEN\K{\_high}\K{\_i8x16\_}\sx ~|~
122+
\K{i32x4.}\WIDEN\K{\_high}\K{\_i16x8\_}\sx \\&&|&
123+
\X{ixx}\K{.}\vshiftop \\&&|&
124+
\K{i8x16.}\vibinop ~|~
125+
\K{i16x8.}\vibinop ~|~
126+
\K{i32x4.}\vibinop \\&&|&
127+
\K{i64x2.}\ADD ~|~
128+
\K{i64x2.}\SUB \\&&|&
129+
\K{i8x16.}\vsatbinop ~|~
130+
\K{i16x8.}\vsatbinop \\&&|&
131+
\K{i16x8.}\K{mul} ~|~
132+
\K{i32x4.}\K{mul} ~|~
133+
\K{i64x2.}\K{mul} \\&&|&
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\K{i8x16.}\AVGRU ~|~
135+
\K{i16x8.}\AVGRU \\&&|&
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\X{fxx.}\vfbinop \\&&|&
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\K{i32x4.}\TRUNC\K{\_sat\_f32x4\_}\sx ~|~
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\K{f32x4.}\CONVERT\K{\_i32x4\_}\sx \\&&|&
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\dots \\
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\production{integer unary operator} & \iunop &::=&
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\K{clz} ~|~
@@ -105,8 +170,20 @@ These operations closely match respective operations available in hardware.
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\K{min} ~|~
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\K{max} ~|~
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\K{copysign} \\
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\production{SIMD unary operator} & \vunop &::=&
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\K{not} \\
175+
\production{SIMD binary operator} & \vbinop &::=&
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\K{and} ~|~
177+
\K{andnot} ~|~
178+
\K{or} ~|~
179+
\K{xor} \\
180+
\production{SIMD unary operator} & \vternop &::=&
181+
\K{bitselect} \\
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\production{integer test operator} & \itestop &::=&
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\K{eqz} \\
184+
\production{SIMD test operator} & \vtestop &::=&
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\K{any\_true} ~|~
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\K{all\_true} \\
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\production{integer relational operator} & \irelop &::=&
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\K{eq} ~|~
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\K{ne} ~|~
@@ -121,6 +198,32 @@ These operations closely match respective operations available in hardware.
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\K{gt} ~|~
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\K{le} ~|~
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\K{ge} \\
201+
\production{SIMD integer shift operator} & \vshiftop &::=&
202+
\K{shl} ~|~
203+
\K{shr\_s} ~|~
204+
\K{shr\_u} \\
205+
\production{SIMD integer unary operator} & \viunop &::=&
206+
\K{abs} ~|~
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\K{neg} \\
208+
\production{SIMD integer binary operator} & \vibinop &::=&
209+
\K{add} ~|~
210+
\K{sub} ~|~
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\K{min\_}\sx ~|~
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\K{max\_}\sx \\
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\production{SIMD integer saturating binary operator} & \vsatbinop &::=&
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\K{add\_sat\_}\sx ~|~
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\K{sub\_sat\_}\sx \\
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\production{SIMD floating-point unary operator} & \vfunop &::=&
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\K{abs} ~|~
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\K{neg} ~|~
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\K{sqrt} \\
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\production{SIMD floating-point binary operator} & \vfbinop &::=&
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\K{add} ~|~
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\K{sub} ~|~
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\K{mul} ~|~
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\K{div} ~|~
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\K{min} ~|~
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\K{max} \\
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\end{array}
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Numeric instructions are divided by :ref:`value type <syntax-valtype>`.
@@ -134,15 +237,25 @@ For each type, several subcategories can be distinguished:
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* *Tests*: consume one operand of the respective type and produce a Boolean integer result.
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137-
* *Comparisons*: consume two operands of the respective type and produce a Boolean integer result.
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* *Comparisons*: consume two operands of the respective type and produce a Boolean integer result or a result of the respective type.
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* *Conversions*: consume a value of one type and produce a result of another
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(the source type of the conversion is the one after the ":math:`\K{\_}`").
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.. todo::
246+
Do these subcategories have to cover every instruction? E.g. simd shifts don't fit anywhere here, since they take 128-bit int and a 32-bit int.
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Some integer instructions come in two flavors,
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where a signedness annotation |sx| distinguishes whether the operands are to be :ref:`interpreted <aux-signed>` as :ref:`unsigned <syntax-uint>` or :ref:`signed <syntax-sint>` integers.
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For the other integer instructions, the use of two's complement for the signed interpretation means that they behave the same regardless of signedness.
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Instructions that operate on |V128| operands have a naming convention that
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determines how those operands will be interpreted. An instruction beginning with :math:`\K{i32x4}`
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will interpret its operands as four |i32|, packed side-by-side into a |i128|.
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Similarly, and instruction beginning with :math:`\K{f64x2}` interprets its operands as two |f64|, packed side-by-side into a |i128|.
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.. todo::
258+
write up runtime interpretation for the lane shapes
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Conventions
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...........
@@ -154,9 +267,22 @@ Occasionally, it is convenient to group operators together according to the foll
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\production{unary operator} & \unop &::=&
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\iunop ~|~
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\funop ~|~
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\vunop ~|~
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\viunop ~|~
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\vfunop ~|~
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\EXTEND{N}\K{\_s} \\
158-
\production{binary operator} & \binop &::=& \ibinop ~|~ \fbinop \\
159-
\production{test operator} & \testop &::=& \itestop \\
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\production{binary operator} & \binop &::=&
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\ibinop ~|~
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\fbinop ~|~
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\vbinop ~|~
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\vibinop ~|~
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\vsatbinop ~|~
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\vfbinop ~|~
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\AVGRU
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\\
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\production{test operator} & \testop &::=&
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\itestop ~|~
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\vtestop \\
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\production{relational operator} & \relop &::=& \irelop ~|~ \frelop \\
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\production{conversion operator} & \cvtop &::=&
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\WRAP ~|~
@@ -166,7 +292,9 @@ Occasionally, it is convenient to group operators together according to the foll
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\CONVERT ~|~
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\DEMOTE ~|~
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\PROMOTE ~|~
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\REINTERPRET \\
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\REINTERPRET ~|~
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\NARROW ~|~
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\WIDEN \\
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\end{array}
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@@ -235,15 +363,21 @@ Instructions in this group are concerned with linear :ref:`memory <syntax-mem>`.
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\production{instruction} & \instr &::=&
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\dots \\&&|&
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\K{i}\X{nn}\K{.}\LOAD~\memarg ~|~
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\K{f}\X{nn}\K{.}\LOAD~\memarg \\&&|&
366+
\K{f}\X{nn}\K{.}\LOAD~\memarg ~|~
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\K{v}\X{sss}\K{.}\LOAD~\memarg \\&&|&
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\K{i}\X{nn}\K{.}\STORE~\memarg ~|~
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\K{f}\X{nn}\K{.}\STORE~\memarg \\&&|&
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\K{f}\X{nn}\K{.}\STORE~\memarg ~|~
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\K{v}\X{sss}\K{.}\STORE~\memarg \\&&|&
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\K{i}\X{nn}\K{.}\LOAD\K{8\_}\sx~\memarg ~|~
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\K{i}\X{nn}\K{.}\LOAD\K{16\_}\sx~\memarg ~|~
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\K{i64.}\LOAD\K{32\_}\sx~\memarg \\&&|&
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\K{i}\X{nn}\K{.}\STORE\K{8}~\memarg ~|~
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\K{i}\X{nn}\K{.}\STORE\K{16}~\memarg ~|~
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\K{i64.}\STORE\K{32}~\memarg \\&&|&
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\K{i16x8.}\LOAD\K{8x8}\_\sx ~|~
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\K{i32x4.}\LOAD\K{16x4}\_\sx ~|~
379+
\K{i64x2.}\LOAD\K{32x2}\_\sx \\&&|&
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\K{v}\X{ixx}\K{.}\LOAD\K{\_splat} \\&&|&
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\MEMORYSIZE \\&&|&
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\MEMORYGROW \\
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\end{array}

‎document/core/util/macros.def

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Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@
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.. |sX#1| mathdef:: {\X{s#1}}
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.. |iX#1| mathdef:: {\X{i#1}}
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.. |fX#1| mathdef:: {\X{f#1}}
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.. |vX#1| mathdef:: {\X{v#1}}
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.. |uN| mathdef:: \xref{syntax/values}{syntax-int}{\X{u}N}
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.. |uM| mathdef:: \xref{syntax/values}{syntax-int}{\X{u}M}
@@ -378,6 +379,16 @@
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.. |DEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{demote}}
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.. |REINTERPRET| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{reinterpret}}
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382+
.. |SHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{shuffle}}
383+
.. |SWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{swizzle}}
384+
.. |SPLAT| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{splat}}
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.. |EXTRACTLANE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{extract\_lane}}
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.. |REPLACELANE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{replace\_lane}}
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.. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{bitmask}}
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.. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{narrow}}
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.. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{widen}}
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.. |AVGRU| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{avgr\_u}}
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.. Instructions, non-terminals
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@@ -397,6 +408,17 @@
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.. |ftestop| mathdef:: \xref{syntax/instructions}{syntax-ftestop}{\X{ftestop}}
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.. |frelop| mathdef:: \xref{syntax/instructions}{syntax-frelop}{\X{frelop}}
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411+
.. |vunop| mathdef:: \xref{syntax/instructions}{syntax-vunop}{\X{vunop}}
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.. |vbinop| mathdef:: \xref{syntax/instructions}{syntax-vbinop}{\X{vbinop}}
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.. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}}
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.. |vtestop| mathdef:: \xref{syntax/instructions}{syntax-vtestop}{\X{vtestop}}
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.. |vshiftop| mathdef:: \xref{syntax/instructions}{syntax-vshiftop}{\X{vshiftop}}
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.. |viunop| mathdef:: \xref{syntax/instructions}{syntax-viunop}{\X{viunop}}
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.. |vibinop| mathdef:: \xref{syntax/instructions}{syntax-vibinop}{\X{vibinop}}
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.. |vsatbinop| mathdef:: \xref{syntax/instructions}{syntax-vsatbinop}{\X{vsatbinop}}
419+
.. |vfunop| mathdef:: \xref{syntax/instructions}{syntax-vfunop}{\X{vfunop}}
420+
.. |vfbinop| mathdef:: \xref{syntax/instructions}{syntax-vfbinop}{\X{vfbinop}}
421+
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.. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}}
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.. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}}
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