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src/alu.sv

+4-3
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
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// > In this minimal implementation, the ALU supports the 4 basic arithmetic operations
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// > Each thread in each core has it's own ALU
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// > ADD, SUB, MUL, DIV instructions are all executed here
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//本模块定义了ALU的行为,包括对寄存器值的计算,支持4种基本算术运算,每个核心的每个线程都有自己的ALU,ADD,SUB,MUL,DIV指令都在这里执行
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module alu (
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input wire clk,
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input wire reset,
@@ -20,7 +21,7 @@ module alu (
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input reg [7:0] rt,
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output wire [7:0] alu_out
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);
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localparam ADD = 2'b00,
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localparam ADD = 2'b00, //定义了4种基本算术运算对应的编码,且采用了本地参数
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SUB = 2'b01,
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MUL = 2'b10,
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DIV = 2'b11;
@@ -36,9 +37,9 @@ module alu (
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if (core_state == 3'b101) begin
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if (decoded_alu_output_mux == 1) begin
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// Set values to compare with NZP register in alu_out[2:0]
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alu_out_reg <= {5'b0, (rs - rt > 0), (rs - rt == 0), (rs - rt < 0)};
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alu_out_reg <= {5'b0, (rs - rt > 0), (rs - rt == 0), (rs - rt < 0)}; //alu_out的低3位分别存储了NZP寄存器的值
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end else begin
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// Execute the specified arithmetic instruction
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// Execute the specified arithmetic instruction //执行指定的算术指令
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case (decoded_alu_arithmetic_mux)
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ADD: begin
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alu_out_reg <= rs + rt;

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