Skip to content

Commit 02e8c01

Browse files
author
Alexander Batashev
committed
Merge remote-tracking branch 'upstream/sycl' into sycl2020_interop_pt3
* upstream/sycl: (39 commits) [CI] Switch to default clang-format version. (intel#3540) [Driver][NFC] Cleanup some option setting for SYCL offload (intel#3542) [GitHub Actions] Update main branch sync schedule [SYCL][NFC] Fix potential namespace conflicts with PSTL in tuple.hpp (intel#3541) [SYCL] Bump sycl library minor version (intel#3538) [SYCL][CUDA] Implemented cuda_piextUSMEnqueueMemAdvise (intel#3365) [SYCL][FPGA] Add mutual diagnostic of max_concurrency attribute in conjunction of disable_loop_pipelining attribute (intel#3512) [SYCL] [MATRIX] Enable joint_matrix_load, joint_matrix_store, and joint_matrix_mad for AMX (intel#3503) [ESIMD] Skip rewriting functions used through function pointers (intel#3527) [SYCL] Fix address space for spec constants buffer (intel#3521) [SYCL] Correct the tablegen for checking mutually exclusive stmt attrs (intel#3519) [SYCL][PI][L0][NFC] Refactor setting of LastCommandEvent (intel#3528) [SYCL] Fix group local memory sharing issue (intel#3489) [SYCL][NFC] Fix post-commit failure (intel#3532) [SYCL][Doc] Remove extension mechanism (intel#3526) [SYCL] Move sycl.hpp in install directory and adjust driver to match (intel#3523) [SYCL][ESIMD] Update ESIMD docs to address recent user comments: (intel#3516) [NFCI][SYCL] Correct -fdeclare-spirv-builtins to use marshalling (intel#3515) [SYCL] Rework MarkDevice and children (intel#3475) [SYCL] Fix StringLiteral Ctor issue from intel#3504. (intel#3520) ...
2 parents abd610c + c0c2389 commit 02e8c01

File tree

140 files changed

+4340
-1970
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

140 files changed

+4340
-1970
lines changed

.github/workflows/clang-format.yml

+1-1
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ jobs:
1010
runs-on: ubuntu-latest
1111
steps:
1212
- name: Get clang-format first
13-
run: sudo apt-get install -yqq clang-format-9
13+
run: sudo apt-get install -yqq clang-format
1414

1515
- uses: actions/checkout@v2
1616
with:

.github/workflows/sync-main.yml

+1-1
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ name: automatic sync main branch from llvm-project to llvm
22

33
on:
44
schedule:
5-
- cron: '*/10 * * * *'
5+
- cron: '0 */1 * * *'
66
jobs:
77
sync:
88
runs-on: ubuntu-latest

clang/include/clang/Basic/Attr.td

+34-11
Original file line numberDiff line numberDiff line change
@@ -1925,6 +1925,7 @@ def SYCLIntelFPGAMaxConcurrency : DeclOrStmtAttr {
19251925
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
19261926
let HasCustomTypeTransform = 1;
19271927
let Documentation = [SYCLIntelFPGAMaxConcurrencyAttrDocs];
1928+
let SupportsNonconformingLambdaSyntax = 1;
19281929
}
19291930

19301931
def SYCLIntelFPGALoopCoalesce : StmtAttr {
@@ -1949,6 +1950,15 @@ def SYCLIntelFPGADisableLoopPipelining : DeclOrStmtAttr {
19491950
let Documentation = [SYCLIntelFPGADisableLoopPipeliningAttrDocs];
19501951
let SupportsNonconformingLambdaSyntax = 1;
19511952
}
1953+
def : MutualExclusions<[SYCLIntelFPGAInitiationInterval,
1954+
SYCLIntelFPGADisableLoopPipelining]>;
1955+
def : MutualExclusions<[SYCLIntelFPGAIVDep,
1956+
SYCLIntelFPGADisableLoopPipelining]>;
1957+
def : MutualExclusions<[SYCLIntelFPGAMaxConcurrency,
1958+
SYCLIntelFPGADisableLoopPipelining]>;
1959+
1960+
def : MutualExclusions<[SYCLIntelFPGAMaxConcurrency,
1961+
SYCLIntelFPGADisableLoopPipelining]>;
19521962

19531963
def SYCLIntelFPGAMaxInterleaving : StmtAttr {
19541964
let Spellings = [CXX11<"intelfpga","max_interleaving">,
@@ -1960,6 +1970,8 @@ def SYCLIntelFPGAMaxInterleaving : StmtAttr {
19601970
let HasCustomTypeTransform = 1;
19611971
let Documentation = [SYCLIntelFPGAMaxInterleavingAttrDocs];
19621972
}
1973+
def : MutualExclusions<[SYCLIntelFPGADisableLoopPipelining,
1974+
SYCLIntelFPGAMaxInterleaving]>;
19631975

19641976
def SYCLIntelFPGASpeculatedIterations : StmtAttr {
19651977
let Spellings = [CXX11<"intelfpga","speculated_iterations">,
@@ -1971,6 +1983,8 @@ def SYCLIntelFPGASpeculatedIterations : StmtAttr {
19711983
let HasCustomTypeTransform = 1;
19721984
let Documentation = [SYCLIntelFPGASpeculatedIterationsAttrDocs];
19731985
}
1986+
def : MutualExclusions<[SYCLIntelFPGADisableLoopPipelining,
1987+
SYCLIntelFPGASpeculatedIterations]>;
19741988

19751989
def SYCLIntelFPGANofusion : StmtAttr {
19761990
let Spellings = [CXX11<"intel","nofusion">];
@@ -1998,12 +2012,12 @@ def IntelFPGAConstVar : SubsetSubject<Var,
19982012
LangAS::opencl_constant)}],
19992013
"constant variables">;
20002014

2001-
def IntelFPGALocalStaticSlaveMemVar : SubsetSubject<Var,
2015+
def IntelFPGALocalStaticAgentMemVar : SubsetSubject<Var,
20022016
[{S->getKind() != Decl::ImplicitParam &&
20032017
S->getKind() != Decl::NonTypeTemplateParm &&
2004-
(S->getStorageClass() == SC_Static ||
2005-
S->hasLocalStorage())}],
2006-
"local variables, static variables, slave memory arguments">;
2018+
(S->getStorageClass() == SC_Static ||
2019+
S->hasLocalStorage())}],
2020+
"local variables, static variables, agent memory arguments">;
20072021

20082022
def IntelFPGALocalOrStaticVar : SubsetSubject<Var,
20092023
[{S->getKind() != Decl::ImplicitParam &&
@@ -2046,7 +2060,7 @@ def IntelFPGAMemory : Attr {
20462060
}
20472061
}
20482062
}];
2049-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2063+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
20502064
Field], ErrorDiag>;
20512065
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
20522066
let Documentation = [IntelFPGAMemoryAttrDocs];
@@ -2060,23 +2074,26 @@ def IntelFPGARegister : Attr {
20602074
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
20612075
let Documentation = [IntelFPGARegisterAttrDocs];
20622076
}
2077+
def : MutualExclusions<[IntelFPGADoublePump, IntelFPGASinglePump,
2078+
IntelFPGARegister]>;
20632079

20642080
// One integral argument.
20652081
def IntelFPGABankWidth : Attr {
20662082
let Spellings = [CXX11<"intelfpga","bankwidth">,
20672083
CXX11<"intel","bankwidth">];
20682084
let Args = [ExprArgument<"Value">];
2069-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2085+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
20702086
Field], ErrorDiag>;
20712087
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
20722088
let Documentation = [IntelFPGABankWidthAttrDocs];
20732089
}
2090+
def : MutualExclusions<[IntelFPGARegister, IntelFPGABankWidth]>;
20742091

20752092
def IntelFPGANumBanks : Attr {
20762093
let Spellings = [CXX11<"intelfpga","numbanks">,
20772094
CXX11<"intel","numbanks">];
20782095
let Args = [ExprArgument<"Value">];
2079-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2096+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
20802097
Field], ErrorDiag>;
20812098
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
20822099
let Documentation = [IntelFPGANumBanksAttrDocs];
@@ -2090,6 +2107,7 @@ def IntelFPGAPrivateCopies : InheritableAttr {
20902107
let Subjects = SubjectList<[IntelFPGALocalNonConstVar, Field], ErrorDiag>;
20912108
let Documentation = [IntelFPGAPrivateCopiesAttrDocs];
20922109
}
2110+
def : MutualExclusions<[IntelFPGARegister, IntelFPGAPrivateCopies]>;
20932111

20942112
// Two string arguments.
20952113
def IntelFPGAMerge : Attr {
@@ -2101,25 +2119,28 @@ def IntelFPGAMerge : Attr {
21012119
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
21022120
let Documentation = [IntelFPGAMergeAttrDocs];
21032121
}
2122+
def : MutualExclusions<[IntelFPGARegister, IntelFPGAMerge]>;
21042123

21052124
def IntelFPGAMaxReplicates : InheritableAttr {
21062125
let Spellings = [CXX11<"intelfpga","max_replicates">,
21072126
CXX11<"intel","max_replicates">];
21082127
let Args = [ExprArgument<"Value">];
2109-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2128+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
21102129
Field], ErrorDiag>;
21112130
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
21122131
let Documentation = [IntelFPGAMaxReplicatesAttrDocs];
21132132
}
2133+
def : MutualExclusions<[IntelFPGARegister, IntelFPGAMaxReplicates]>;
21142134

21152135
def IntelFPGASimpleDualPort : Attr {
21162136
let Spellings = [CXX11<"intelfpga","simple_dual_port">,
21172137
CXX11<"intel","simple_dual_port">];
2118-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2138+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
21192139
Field], ErrorDiag>;
21202140
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
21212141
let Documentation = [IntelFPGASimpleDualPortAttrDocs];
21222142
}
2143+
def : MutualExclusions<[IntelFPGARegister, IntelFPGASimpleDualPort]>;
21232144

21242145
def SYCLFPGAPipe : TypeAttr {
21252146
let Spellings = [GNU<"pipe">];
@@ -2141,21 +2162,23 @@ def IntelFPGABankBits : Attr {
21412162
let Spellings = [CXX11<"intelfpga", "bank_bits">,
21422163
CXX11<"intel", "bank_bits">];
21432164
let Args = [VariadicExprArgument<"Args">];
2144-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2165+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
21452166
Field], ErrorDiag>;
21462167
let LangOpts = [SYCLIsDevice, SYCLIsHost];
21472168
let Documentation = [IntelFPGABankBitsDocs];
21482169
}
2170+
def : MutualExclusions<[IntelFPGARegister, IntelFPGABankBits]>;
21492171

21502172
def IntelFPGAForcePow2Depth : InheritableAttr {
21512173
let Spellings = [CXX11<"intelfpga","force_pow2_depth">,
21522174
CXX11<"intel","force_pow2_depth">];
21532175
let Args = [ExprArgument<"Value">];
2154-
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticSlaveMemVar,
2176+
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
21552177
Field], ErrorDiag>;
21562178
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
21572179
let Documentation = [IntelFPGAForcePow2DepthAttrDocs];
21582180
}
2181+
def : MutualExclusions<[IntelFPGARegister, IntelFPGAForcePow2Depth]>;
21592182

21602183
def Naked : InheritableAttr {
21612184
let Spellings = [GCC<"naked">, Declspec<"naked">];

clang/include/clang/Basic/AttrDocs.td

+6-5
Original file line numberDiff line numberDiff line change
@@ -2869,7 +2869,7 @@ This attribute applies to a loop or a function. It indicates that the
28692869
loop/function should allow no more than N threads or iterations to execute it
28702870
simultaneously. N must be a non negative integer. '0' indicates the
28712871
max_concurrency case to be unbounded. Cannot be applied multiple times to the
2872-
same loop.
2872+
same loop or function, or in conjunction with ``disable_loop_pipelining``.
28732873

28742874
.. code-block:: c++
28752875

@@ -2935,17 +2935,18 @@ def SYCLIntelFPGADisableLoopPipeliningAttrDocs : Documentation {
29352935
This attribute applies to a loop or a function. Takes no arguments and
29362936
disables pipelining of the loop or function data path, causing the loop
29372937
or function to be executed serially. Cannot be used on the same loop or
2938-
function in conjunction with max_interleaving, speculated_iterations,
2939-
max_concurrency, initiation_interval, or ivdep.
2938+
function, or in conjunction with ``max_interleaving``,
2939+
``speculated_iterations``, ``max_concurrency``, ``initiation_interval``,
2940+
or ``ivdep``.
29402941

29412942
.. code-block:: c++
29422943

29432944
void foo() {
29442945
int var = 0;
2945-
[[intel::disable_loop_pipelining] for (int i = 0; i < 10; ++i) var++;
2946+
[[intel::disable_loop_pipelining]] for (int i = 0; i < 10; ++i) var++;
29462947
}
29472948

2948-
[[intel::disable_loop_pipelining] void foo1() { }
2949+
[[intel::disable_loop_pipelining]] void foo1() { }
29492950

29502951
}];
29512952
}

clang/include/clang/Basic/DiagnosticSemaKinds.td

-3
Original file line numberDiff line numberDiff line change
@@ -11299,9 +11299,6 @@ def warn_sycl_implicit_decl
1129911299
"declaration for a kernel type name; your program may not "
1130011300
"be portable">,
1130111301
InGroup<SyclStrict>, ShowInSystemHeader, DefaultIgnore;
11302-
def warn_sycl_restrict_recursion
11303-
: Warning<"SYCL kernel cannot call a recursive function">,
11304-
InGroup<SyclStrict>, DefaultError;
1130511302
def err_ivdep_duplicate_arg : Error<
1130611303
"duplicate argument to 'ivdep'; attribute requires one or both of a safelen "
1130711304
"and array">;

clang/include/clang/Basic/LangOptions.def

+1-1
Original file line numberDiff line numberDiff line change
@@ -259,7 +259,7 @@ LANGOPT(DeclareSPIRVBuiltins, 1, 0, "Declare SPIR-V builtin functions")
259259
LANGOPT(SYCLExplicitSIMD , 1, 0, "SYCL compilation with explicit SIMD extension")
260260
LANGOPT(EnableDAEInSpirKernels , 1, 0, "Enable Dead Argument Elimination in SPIR kernels")
261261
LANGOPT(
262-
SYCLValueFitInMaxInt, 1, 0,
262+
SYCLValueFitInMaxInt, 1, 1,
263263
"SYCL compiler assumes value fits within MAX_INT for member function of "
264264
"get/operator[], get_id/operator[] and get_global_id/get_global_linear_id "
265265
"in SYCL class id, iterm and nd_iterm")

clang/include/clang/Basic/LangOptions.h

+6
Original file line numberDiff line numberDiff line change
@@ -354,6 +354,12 @@ class LangOptions : public LangOptionsBase {
354354
/// SYCL integration footer to be generated by the device compiler
355355
std::string SYCLIntFooter;
356356

357+
/// A driver-provided unique string for this translation unit that is used to
358+
/// generate unique names for SYCL names. This is provided by the driver so
359+
/// that the case of multiple-offload can have each device compilation share a
360+
/// name.
361+
std::string SYCLUniquePrefix;
362+
357363
LangOptions();
358364

359365
// Define accessors/mutators for language options of enumeration type.

clang/include/clang/Driver/Driver.h

+15
Original file line numberDiff line numberDiff line change
@@ -648,6 +648,11 @@ class Driver {
648648
/// Track filename used for the FPGA dependency info.
649649
mutable llvm::StringMap<const std::string> FPGATempDepFiles;
650650

651+
/// A list of inputs and their corresponding integration headers. These
652+
/// files are generated during the device compilation and are consumed
653+
/// by the host compilation.
654+
mutable llvm::StringMap<StringRef> IntegrationFileList;
655+
651656
public:
652657
/// GetReleaseVersion - Parse (([0-9]+)(.([0-9]+)(.([0-9]+)?))?)? and
653658
/// return the grouped values as integers. Numbers which are not
@@ -684,6 +689,16 @@ class Driver {
684689
const std::string getFPGATempDepFile(const std::string &FileName) const {
685690
return FPGATempDepFiles[FileName];
686691
}
692+
693+
/// addIntegrationFiles - Add the integration files that will be populated
694+
/// by the device compilation and used by the host compile.
695+
void addIntegrationFiles(StringRef IntHeaderName, StringRef FileName) const {
696+
IntegrationFileList.insert({FileName, IntHeaderName});
697+
}
698+
/// getIntegrationHeader - Get the integration header file
699+
StringRef getIntegrationHeader(StringRef FileName) const {
700+
return IntegrationFileList[FileName];
701+
}
687702
};
688703

689704
/// \return True if the last defined optimization level is -Ofast.

clang/include/clang/Driver/Options.td

+15-7
Original file line numberDiff line numberDiff line change
@@ -2493,7 +2493,7 @@ def fsycl_instrument_device_code : Flag<["-"], "fsycl-instrument-device-code">,
24932493
HelpText<"Add ITT instrumentation intrinsics calls">,
24942494
MarshallingInfoFlag<CodeGenOpts<"SPIRITTAnnotations">>;
24952495
defm sycl_id_queries_fit_in_int: BoolFOption<"sycl-id-queries-fit-in-int",
2496-
LangOpts<"SYCLValueFitInMaxInt">, DefaultFalse,
2496+
LangOpts<"SYCLValueFitInMaxInt">, DefaultTrue,
24972497
PosFlag<SetTrue, [], "Assume">, NegFlag<SetFalse, [], "Do not assume">,
24982498
BothFlags<[CC1Option, CoreOption], " that SYCL ID queries fit within MAX_INT.">>;
24992499
def fsycl_use_bitcode : Flag<["-"], "fsycl-use-bitcode">,
@@ -4377,10 +4377,11 @@ def fsycl : Flag<["-"], "fsycl">, Flags<[NoXarchOption, CoreOption]>, Group<sycl
43774377
HelpText<"Enables SYCL kernels compilation for device">;
43784378
def fno_sycl : Flag<["-"], "fno-sycl">, Flags<[NoXarchOption, CoreOption]>, Group<sycl_Group>,
43794379
HelpText<"Disables SYCL kernels compilation for device">;
4380-
defm sycl_esimd: BoolFOption<"sycl-explicit-simd",
4381-
LangOpts<"SYCLExplicitSIMD">, DefaultFalse,
4382-
PosFlag<SetTrue, [CC1Option], "Enable">, NegFlag<SetFalse, [], "Disable">,
4383-
BothFlags<[NoArgumentUnused, CoreOption], "SYCL explicit SIMD extension.">>;
4380+
// FIXME: -fsycl-explicit-simd is deprecated. remove it when support is dropped.
4381+
def : Flag<["-"], "fsycl-explicit-simd">, Flags<[CoreOption]>, Group<clang_ignored_legacy_options_Group>,
4382+
HelpText<"Enable SYCL explicit SIMD extension. (deprecated)">;
4383+
def : Flag<["-"], "fno-sycl-explicit-simd">, Flags<[CoreOption]>, Group<clang_ignored_legacy_options_Group>,
4384+
HelpText<"Disable SYCL explicit SIMD extension. (deprecated)">;
43844385
defm sycl_early_optimizations : OptOutFFlag<"sycl-early-optimizations", "Enable", "Disable", " standard optimization pipeline for SYCL device compiler", [CoreOption]>;
43854386
def fsycl_dead_args_optimization : Flag<["-"], "fsycl-dead-args-optimization">,
43864387
Group<sycl_Group>, Flags<[NoArgumentUnused, CoreOption]>, HelpText<"Enables "
@@ -5558,8 +5559,10 @@ def finclude_default_header : Flag<["-"], "finclude-default-header">,
55585559
HelpText<"Include default header file for OpenCL">;
55595560
def fdeclare_opencl_builtins : Flag<["-"], "fdeclare-opencl-builtins">,
55605561
HelpText<"Add OpenCL builtin function declarations (experimental)">;
5561-
def fdeclare_spirv_builtins : Flag<["-"], "fdeclare-spirv-builtins">,
5562-
HelpText<"Add SPIR-V builtin function declarations (experimental)">;
5562+
def fdeclare_spirv_builtins
5563+
: Flag<["-"], "fdeclare-spirv-builtins">,
5564+
HelpText<"Add SPIR-V builtin function declarations (experimental)">,
5565+
MarshallingInfoFlag<LangOpts<"DeclareSPIRVBuiltins">>;
55635566

55645567
def fpreserve_vec3_type : Flag<["-"], "fpreserve-vec3-type">,
55655568
HelpText<"Preserve 3-component vector type">,
@@ -5697,6 +5700,11 @@ def fsycl_int_footer : Separate<["-"], "fsycl-int-footer">,
56975700
MarshallingInfoString<LangOpts<"SYCLIntFooter">>;
56985701
def fsycl_int_footer_EQ : Joined<["-"], "fsycl-int-footer=">,
56995702
Alias<fsycl_int_footer>;
5703+
def fsycl_unique_prefix_EQ
5704+
: Joined<["-"], "fsycl-unique-prefix=">,
5705+
HelpText<"A unique prefix for this translation unit across devices, used "
5706+
"to generate a unique name for local variables.">,
5707+
MarshallingInfoString<LangOpts<"SYCLUniquePrefix">>;
57005708
def fsycl_std_layout_kernel_params: Flag<["-"], "fsycl-std-layout-kernel-params">,
57015709
HelpText<"Enable standard layout requirement for SYCL kernel parameters.">,
57025710
MarshallingInfoFlag<LangOpts<"SYCLStdLayoutKernelParams">>;

clang/include/clang/Driver/Types.def

-1
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,6 @@ TYPE("dependencies", Dependencies, INVALID, "d", phases
101101
TYPE("cuda-fatbin", CUDA_FATBIN, INVALID, "fatbin", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
102102
TYPE("hip-fatbin", HIP_FATBIN, INVALID, "hipfb", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
103103
TYPE("spirv", SPIRV, INVALID, "spv", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
104-
TYPE("sycl-header", SYCL_Header, INVALID, "h", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
105104
TYPE("sycl-fatbin", SYCL_FATBIN, INVALID, nullptr, phases::Compile, phases::Backend, phases::Assemble, phases::Link)
106105
TYPE("tempfilelist", Tempfilelist, INVALID, "txt", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
107106
TYPE("tempfiletable", Tempfiletable,INVALID, "table", phases::Compile, phases::Backend, phases::Assemble, phases::Link)

clang/include/clang/Sema/ParsedAttr.h

+6-7
Original file line numberDiff line numberDiff line change
@@ -95,12 +95,6 @@ struct ParsedAttrInfo {
9595
const Decl *D) const {
9696
return true;
9797
}
98-
/// Check if the given attribute is mutually exclusive with other attributes
99-
/// already applied to the given statement.
100-
virtual bool diagMutualExclusion(Sema &S, const ParsedAttr &A,
101-
const Stmt *St) const {
102-
return true;
103-
}
10498
/// Check if this attribute is allowed by the language we are compiling, and
10599
/// issue a diagnostic if not.
106100
virtual bool diagLangOpts(Sema &S, const ParsedAttr &Attr) const {
@@ -615,7 +609,12 @@ class ParsedAttr final
615609
bool diagnoseAppertainsTo(class Sema &S, const Decl *D) const;
616610
bool diagnoseAppertainsTo(class Sema &S, const Stmt *St) const;
617611
bool diagnoseMutualExclusion(class Sema &S, const Decl *D) const;
618-
bool diagnoseMutualExclusion(class Sema &S, const Stmt *St) const;
612+
// This function stub exists for parity with the declaration checking code so
613+
// that checkCommonAttributeFeatures() can work generically on declarations
614+
// or statements.
615+
bool diagnoseMutualExclusion(class Sema &S, const Stmt *St) const {
616+
return true;
617+
}
619618
bool appliesToDecl(const Decl *D, attr::SubjectMatchRule MatchRule) const;
620619
void getMatchRules(const LangOptions &LangOpts,
621620
SmallVectorImpl<std::pair<attr::SubjectMatchRule, bool>>

clang/include/clang/Sema/Sema.h

+9-1
Original file line numberDiff line numberDiff line change
@@ -434,10 +434,13 @@ class SYCLIntegrationFooter {
434434
public:
435435
SYCLIntegrationFooter(Sema &S) : S(S) {}
436436
bool emit(StringRef MainSrc);
437+
void addVarDecl(const VarDecl *VD);
437438

438439
private:
439440
bool emit(raw_ostream &O);
440441
Sema &S;
442+
llvm::SmallVector<const VarDecl *> SpecConstants;
443+
void emitSpecIDName(raw_ostream &O, const VarDecl *VD);
441444
};
442445

443446
/// Tracks expected type during expression parsing, for use in code completion.
@@ -13162,6 +13165,11 @@ class Sema final {
1316213165
return *SyclIntFooter.get();
1316313166
}
1316413167

13168+
void addSyclVarDecl(VarDecl *VD) {
13169+
if (LangOpts.SYCLIsDevice && !LangOpts.SYCLIntFooter.empty())
13170+
getSyclIntegrationFooter().addVarDecl(VD);
13171+
}
13172+
1316513173
enum SYCLRestrictKind {
1316613174
KernelGlobalVariable,
1316713175
KernelRTTI,
@@ -13182,7 +13190,7 @@ class Sema final {
1318213190
void checkSYCLDeviceVarDecl(VarDecl *Var);
1318313191
void copySYCLKernelAttrs(const CXXRecordDecl *KernelObj);
1318413192
void ConstructOpenCLKernel(FunctionDecl *KernelCallerFunc, MangleContext &MC);
13185-
void MarkDevice();
13193+
void MarkDevices();
1318613194

1318713195
/// Emit a diagnostic about the given attribute having a deprecated name, and
1318813196
/// also emit a fixit hint to generate the new attribute name.

0 commit comments

Comments
 (0)