Skip to content

Commit 7e702d1

Browse files
jiazhang0KAGA-KOKO
authored andcommitted
x86/microcode/intel: Extend BDW late-loading further with LLC size check
Commit b94b737 ("x86/microcode/intel: Extend BDW late-loading with a revision check") reduced the impact of erratum BDF90 for Broadwell model 79. The impact can be reduced further by checking the size of the last level cache portion per core. Tony: "The erratum says the problem only occurs on the large-cache SKUs. So we only need to avoid the update if we are on a big cache SKU that is also running old microcode." For more details, see erratum BDF90 in document #334165 (Intel Xeon Processor E7-8800/4800 v4 Product Family Specification Update) from September 2017. Fixes: b94b737 ("x86/microcode/intel: Extend BDW late-loading with a revision check") Signed-off-by: Jia Zhang <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Tony Luck <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected]
1 parent 40d4071 commit 7e702d1

File tree

1 file changed

+18
-2
lines changed
  • arch/x86/kernel/cpu/microcode

1 file changed

+18
-2
lines changed

arch/x86/kernel/cpu/microcode/intel.c

Lines changed: 18 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,9 @@ static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
4545
/* Current microcode patch used in early patching on the APs. */
4646
static struct microcode_intel *intel_ucode_patch;
4747

48+
/* last level cache size per core */
49+
static int llc_size_per_core;
50+
4851
static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
4952
unsigned int s2, unsigned int p2)
5053
{
@@ -912,12 +915,14 @@ static bool is_blacklisted(unsigned int cpu)
912915

913916
/*
914917
* Late loading on model 79 with microcode revision less than 0x0b000021
915-
* may result in a system hang. This behavior is documented in item
916-
* BDF90, #334165 (Intel Xeon Processor E7-8800/4800 v4 Product Family).
918+
* and LLC size per core bigger than 2.5MB may result in a system hang.
919+
* This behavior is documented in item BDF90, #334165 (Intel Xeon
920+
* Processor E7-8800/4800 v4 Product Family).
917921
*/
918922
if (c->x86 == 6 &&
919923
c->x86_model == INTEL_FAM6_BROADWELL_X &&
920924
c->x86_mask == 0x01 &&
925+
llc_size_per_core > 2621440 &&
921926
c->microcode < 0x0b000021) {
922927
pr_err_once("Erratum BDF90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode);
923928
pr_err_once("Please consider either early loading through initrd/built-in or a potential BIOS update.\n");
@@ -975,6 +980,15 @@ static struct microcode_ops microcode_intel_ops = {
975980
.apply_microcode = apply_microcode_intel,
976981
};
977982

983+
static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c)
984+
{
985+
u64 llc_size = c->x86_cache_size * 1024;
986+
987+
do_div(llc_size, c->x86_max_cores);
988+
989+
return (int)llc_size;
990+
}
991+
978992
struct microcode_ops * __init init_intel_microcode(void)
979993
{
980994
struct cpuinfo_x86 *c = &boot_cpu_data;
@@ -985,5 +999,7 @@ struct microcode_ops * __init init_intel_microcode(void)
985999
return NULL;
9861000
}
9871001

1002+
llc_size_per_core = calc_llc_size_per_core(c);
1003+
9881004
return &microcode_intel_ops;
9891005
}

0 commit comments

Comments
 (0)