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Merge branch 'drm-next-analogix-dp-v2' of github.com:yakir-Yang/linux into drm-next
This pull request want to land the analogix_dp driver into drm/bridge directory, which reused the Exynos DP code, and add Rockchip DP support. And those patches have been: * 'drm-next-analogix-dp-v2' of github.com:yakir-Yang/linux: drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time drm: bridge: analogix/dp: add edid modes parse in get_modes method drm: bridge: analogix/dp: move hpd detect to connector detect function drm: bridge: analogix/dp: try force hpd after plug in lookup failed drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 drm: bridge: analogix/dp: add some rk3288 special registers setting dt-bindings: add document for rockchip variant of analogix_dp drm: rockchip: dp: add rockchip platform dp driver ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver dt-bindings: add document for analogix display port driver drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count drm: bridge: analogix/dp: fix some obvious code style drm: bridge: analogix/dp: rename register constants drm/exynos: dp: rename implementation specific driver part drm: bridge: analogix/dp: split exynos dp driver to bridge directory
2 parents 85bd5ac + 7b4b7a8 commit d00b39c

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Analogix Display Port bridge bindings
2+
3+
Required properties for dp-controller:
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-compatible:
5+
platform specific such as:
6+
* "samsung,exynos5-dp"
7+
* "rockchip,rk3288-dp"
8+
-reg:
9+
physical base address of the controller and length
10+
of memory mapped region.
11+
-interrupts:
12+
interrupt combiner values.
13+
-clocks:
14+
from common clock binding: handle to dp clock.
15+
-clock-names:
16+
from common clock binding: Shall be "dp".
17+
-interrupt-parent:
18+
phandle to Interrupt combiner node.
19+
-phys:
20+
from general PHY binding: the phandle for the PHY device.
21+
-phy-names:
22+
from general PHY binding: Should be "dp".
23+
24+
Optional properties for dp-controller:
25+
-force-hpd:
26+
Indicate driver need force hpd when hpd detect failed, this
27+
is used for some eDP screen which don't have hpd signal.
28+
-hpd-gpios:
29+
Hotplug detect GPIO.
30+
Indicates which GPIO should be used for hotplug detection
31+
-port@[X]: SoC specific port nodes with endpoint definitions as defined
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in Documentation/devicetree/bindings/media/video-interfaces.txt,
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please refer to the SoC specific binding document:
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* Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
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* Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
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[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
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-------------------------------------------------------------------------------
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Example:
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42+
dp-controller {
43+
compatible = "samsung,exynos5-dp";
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reg = <0x145b0000 0x10000>;
45+
interrupts = <10 3>;
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interrupt-parent = <&combiner>;
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clocks = <&clock 342>;
48+
clock-names = "dp";
49+
50+
phys = <&dp_phy>;
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phy-names = "dp";
52+
};

Documentation/devicetree/bindings/display/exynos/exynos_dp.txt

Lines changed: 27 additions & 66 deletions
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@@ -1,20 +1,3 @@
1-
Device-Tree bindings for Samsung Exynos Embedded DisplayPort Transmitter(eDP)
2-
3-
DisplayPort is industry standard to accommodate the growing board adoption
4-
of digital display technology within the PC and CE industries.
5-
It consolidates the internal and external connection methods to reduce device
6-
complexity and cost. It also supports necessary features for important cross
7-
industry applications and provides performance scalability to enable the next
8-
generation of displays that feature higher color depths, refresh rates, and
9-
display resolutions.
10-
11-
eDP (embedded display port) device is compliant with Embedded DisplayPort
12-
standard as follows,
13-
- DisplayPort standard 1.1a for Exynos5250 and Exynos5260.
14-
- DisplayPort standard 1.3 for Exynos5422s and Exynos5800.
15-
16-
eDP resides between FIMD and panel or FIMD and bridge such as LVDS.
17-
181
The Exynos display port interface should be configured based on
192
the type of panel connected to it.
203

@@ -48,26 +31,6 @@ Required properties for dp-controller:
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from general PHY binding: the phandle for the PHY device.
4932
-phy-names:
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from general PHY binding: Should be "dp".
51-
-samsung,color-space:
52-
input video data format.
53-
COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
54-
-samsung,dynamic-range:
55-
dynamic range for input video data.
56-
VESA = 0, CEA = 1
57-
-samsung,ycbcr-coeff:
58-
YCbCr co-efficients for input video.
59-
COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
60-
-samsung,color-depth:
61-
number of bits per colour component.
62-
COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
63-
-samsung,link-rate:
64-
link rate supported by the panel.
65-
LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A
66-
-samsung,lane-count:
67-
number of lanes supported by the panel.
68-
LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4
69-
- display-timings: timings for the connected panel as described by
70-
Documentation/devicetree/bindings/display/display-timing.txt
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7235
Optional properties for dp-controller:
7336
-interlaced:
@@ -83,17 +46,31 @@ Optional properties for dp-controller:
8346
Hotplug detect GPIO.
8447
Indicates which GPIO should be used for hotplug
8548
detection
86-
Video interfaces:
87-
Device node can contain video interface port nodes according to [1].
88-
The following are properties specific to those nodes:
89-
90-
endpoint node connected to bridge or panel node:
91-
- remote-endpoint: specifies the endpoint in panel or bridge node.
92-
This node is required in all kinds of exynos dp
93-
to represent the connection between dp and bridge
94-
or dp and panel.
95-
96-
[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
49+
-video interfaces: Device node can contain video interface port
50+
nodes according to [1].
51+
- display-timings: timings for the connected panel as described by
52+
Documentation/devicetree/bindings/display/panel/display-timing.txt
53+
54+
For the below properties, please refer to Analogix DP binding document:
55+
* Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
56+
-phys (required)
57+
-phy-names (required)
58+
-hpd-gpios (optional)
59+
force-hpd (optional)
60+
61+
Deprecated properties for DisplayPort:
62+
-interlaced: deprecated prop that can parsed from drm_display_mode.
63+
-vsync-active-high: deprecated prop that can parsed from drm_display_mode.
64+
-hsync-active-high: deprecated prop that can parsed from drm_display_mode.
65+
-samsung,ycbcr-coeff: deprecated prop that can parsed from drm_display_mode.
66+
-samsung,dynamic-range: deprecated prop that can parsed from drm_display_mode.
67+
-samsung,color-space: deprecated prop that can parsed from drm_display_info.
68+
-samsung,color-depth: deprecated prop that can parsed from drm_display_info.
69+
-samsung,link-rate: deprecated prop that can reading from monitor by dpcd method.
70+
-samsung,lane-count: deprecated prop that can reading from monitor by dpcd method.
71+
-samsung,hpd-gpio: deprecated name for hpd-gpios.
72+
73+
-------------------------------------------------------------------------------
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Example:
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@@ -112,13 +89,6 @@ SOC specific portion:
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11390
Board Specific portion:
11491
dp-controller {
115-
samsung,color-space = <0>;
116-
samsung,dynamic-range = <0>;
117-
samsung,ycbcr-coeff = <0>;
118-
samsung,color-depth = <1>;
119-
samsung,link-rate = <0x0a>;
120-
samsung,lane-count = <4>;
121-
12292
display-timings {
12393
native-mode = <&lcd_timing>;
12494
lcd_timing: 1366x768 {
@@ -135,18 +105,9 @@ Board Specific portion:
135105
};
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137107
ports {
138-
port {
108+
port@0 {
139109
dp_out: endpoint {
140-
remote-endpoint = <&dp_in>;
141-
};
142-
};
143-
};
144-
145-
panel {
146-
...
147-
port {
148-
dp_in: endpoint {
149-
remote-endpoint = <&dp_out>;
110+
remote-endpoint = <&bridge_in>;
150111
};
151112
};
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};
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1+
Rockchip RK3288 specific extensions to the Analogix Display Port
2+
================================
3+
4+
Required properties:
5+
- compatible: "rockchip,rk3288-edp";
6+
7+
- reg: physical base address of the controller and length
8+
9+
- clocks: from common clock binding: handle to dp clock.
10+
of memory mapped region.
11+
12+
- clock-names: from common clock binding:
13+
Required elements: "dp" "pclk"
14+
15+
- resets: Must contain an entry for each entry in reset-names.
16+
See ../reset/reset.txt for details.
17+
18+
- pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
19+
- pinctrl-0: pin-control mode. should be <&edp_hpd>
20+
21+
- reset-names: Must include the name "dp"
22+
23+
- rockchip,grf: this soc should set GRF regs, so need get grf here.
24+
25+
- ports: there are 2 port nodes with endpoint definitions as defined in
26+
Documentation/devicetree/bindings/media/video-interfaces.txt.
27+
Port 0: contained 2 endpoints, connecting to the output of vop.
28+
Port 1: contained 1 endpoint, connecting to the input of panel.
29+
30+
For the below properties, please refer to Analogix DP binding document:
31+
* Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
32+
- phys (required)
33+
- phy-names (required)
34+
- hpd-gpios (optional)
35+
- force-hpd (optional)
36+
-------------------------------------------------------------------------------
37+
38+
Example:
39+
dp-controller: dp@ff970000 {
40+
compatible = "rockchip,rk3288-dp";
41+
reg = <0xff970000 0x4000>;
42+
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
43+
clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
44+
clock-names = "dp", "pclk";
45+
phys = <&dp_phy>;
46+
phy-names = "dp";
47+
48+
rockchip,grf = <&grf>;
49+
resets = <&cru 111>;
50+
reset-names = "dp";
51+
52+
pinctrl-names = "default";
53+
pinctrl-0 = <&edp_hpd>;
54+
55+
status = "disabled";
56+
57+
ports {
58+
#address-cells = <1>;
59+
#size-cells = <0>;
60+
edp_in: port@0 {
61+
reg = <0>;
62+
#address-cells = <1>;
63+
#size-cells = <0>;
64+
edp_in_vopb: endpoint@0 {
65+
reg = <0>;
66+
remote-endpoint = <&vopb_out_edp>;
67+
};
68+
edp_in_vopl: endpoint@1 {
69+
reg = <1>;
70+
remote-endpoint = <&vopl_out_edp>;
71+
};
72+
};
73+
74+
edp_out: port@1 {
75+
reg = <1>;
76+
#address-cells = <1>;
77+
#size-cells = <0>;
78+
edp_out_panel: endpoint {
79+
reg = <0>;
80+
remote-endpoint = <&panel_in_edp>
81+
};
82+
};
83+
};
84+
};
85+
86+
pinctrl {
87+
edp {
88+
edp_hpd: edp-hpd {
89+
rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_none>;
90+
};
91+
};
92+
};

arch/arm/boot/dts/exynos5250-arndale.dts

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124124
&dp {
125125
status = "okay";
126126
samsung,color-space = <0>;
127-
samsung,dynamic-range = <0>;
128-
samsung,ycbcr-coeff = <0>;
129127
samsung,color-depth = <1>;
130128
samsung,link-rate = <0x0a>;
131129
samsung,lane-count = <4>;

arch/arm/boot/dts/exynos5250-smdk5250.dts

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8080

8181
&dp {
8282
samsung,color-space = <0>;
83-
samsung,dynamic-range = <0>;
84-
samsung,ycbcr-coeff = <0>;
8583
samsung,color-depth = <1>;
8684
samsung,link-rate = <0x0a>;
8785
samsung,lane-count = <4>;

arch/arm/boot/dts/exynos5250-snow-common.dtsi

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236236
pinctrl-names = "default";
237237
pinctrl-0 = <&dp_hpd>;
238238
samsung,color-space = <0>;
239-
samsung,dynamic-range = <0>;
240-
samsung,ycbcr-coeff = <0>;
241239
samsung,color-depth = <1>;
242240
samsung,link-rate = <0x0a>;
243241
samsung,lane-count = <2>;
244-
samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
242+
hpd-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
245243

246244
ports {
247245
port@0 {

arch/arm/boot/dts/exynos5250-spring.dts

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7474
pinctrl-names = "default";
7575
pinctrl-0 = <&dp_hpd_gpio>;
7676
samsung,color-space = <0>;
77-
samsung,dynamic-range = <0>;
78-
samsung,ycbcr-coeff = <0>;
7977
samsung,color-depth = <1>;
8078
samsung,link-rate = <0x0a>;
8179
samsung,lane-count = <1>;
82-
samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
80+
hpd-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
8381
};
8482

8583
&ehci {

arch/arm/boot/dts/exynos5420-peach-pit.dts

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157157
pinctrl-names = "default";
158158
pinctrl-0 = <&dp_hpd_gpio>;
159159
samsung,color-space = <0>;
160-
samsung,dynamic-range = <0>;
161-
samsung,ycbcr-coeff = <0>;
162160
samsung,color-depth = <1>;
163161
samsung,link-rate = <0x06>;
164162
samsung,lane-count = <2>;
165-
samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
163+
hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
166164

167165
ports {
168166
port@0 {

arch/arm/boot/dts/exynos5420-smdk5420.dts

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102102
pinctrl-names = "default";
103103
pinctrl-0 = <&dp_hpd>;
104104
samsung,color-space = <0>;
105-
samsung,dynamic-range = <0>;
106-
samsung,ycbcr-coeff = <0>;
107105
samsung,color-depth = <1>;
108106
samsung,link-rate = <0x0a>;
109107
samsung,lane-count = <4>;

arch/arm/boot/dts/exynos5800-peach-pi.dts

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157157
pinctrl-names = "default";
158158
pinctrl-0 = <&dp_hpd_gpio>;
159159
samsung,color-space = <0>;
160-
samsung,dynamic-range = <0>;
161-
samsung,ycbcr-coeff = <0>;
162160
samsung,color-depth = <1>;
163161
samsung,link-rate = <0x0a>;
164162
samsung,lane-count = <2>;

drivers/gpu/drm/bridge/Kconfig

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@@ -40,4 +40,6 @@ config DRM_PARADE_PS8622
4040
---help---
4141
Parade eDP-LVDS bridge chip driver.
4242

43+
source "drivers/gpu/drm/bridge/analogix/Kconfig"
44+
4345
endmenu

drivers/gpu/drm/bridge/Makefile

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Original file line numberDiff line numberDiff line change
@@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
44
obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
55
obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
66
obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
7+
obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
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1+
config DRM_ANALOGIX_DP
2+
tristate
3+
depends on DRM
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1+
analogix_dp-objs := analogix_dp_core.o analogix_dp_reg.o
2+
obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix_dp.o

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