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tzununbekovsebgoa
tzununbekov
and
sebgoa
authored
Project renamed to "TIL" (#162)
* Project renamed to "TIL" Co-authored-by: sebgoa <[email protected]>
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‎.gitignore

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# Build artifacts
2-
/bridgedl
2+
/til
33

44
# Sample Bridge Description Files
55
/*.brg.hcl
@@ -14,7 +14,7 @@
1414
/.vscode/
1515

1616
# Software licenses
17-
/LICENSES/vendor/bridgedl/
17+
/LICENSES/vendor/til/
1818

1919
# OS artifacts
2020
.DS_Store

‎README.md

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@@ -1,11 +1,11 @@
1-
# Bridge Description Language
1+
# TriggerMesh Integration Language
22

33
Specification and interpreter for TriggerMesh's Bridge Description Language.
44

5-
The Bridge Description Language is a configuration language based on the [HCL syntax][hcl-spec] which purpose is to
5+
The TriggerMesh Integration Language (TIL) is a configuration language based on the [HCL syntax][hcl-spec] which purpose is to
66
provide a user-friendly interface for describing [TriggerMesh Bridges][tm-brg].
77

8-
Using the `bridgedl` CLI tool, it is possible to turn Bridge definitions into deployment manifests which can run
8+
Using the `til` CLI tool, it is possible to turn Bridge definitions into deployment manifests which can run
99
complete messaging systems on the TriggerMesh platform.
1010

1111
## Documentation
@@ -29,17 +29,17 @@ and architecture by executing the following command inside the root of the repos
2929
$ go build .
3030
```
3131

32-
The above command creates an executable called `bridgedl` inside the current directory.
32+
The above command creates an executable called `til` inside the current directory.
3333

3434
The `-h` or `--help` flag can be appended to any command or subcommand to print some usage instructions about that
3535
command:
3636

3737
```console
38-
$ ./bridgedl --help
38+
$ ./til --help
3939
```
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4141
[tm-brg]: https://www.triggermesh.com/integrations
42-
[wiki]: https://github.com/triggermesh/bridgedl/wiki
42+
[wiki]: https://github.com/triggermesh/til/wiki
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4444
[go]: https://golang.org/
4545
[go-dl]: https://golang.org/dl/

‎commands.go

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@@ -21,10 +21,10 @@ import (
2121
"fmt"
2222
"io"
2323

24-
"bridgedl/config/file"
25-
"bridgedl/core"
26-
"bridgedl/encoding"
27-
"bridgedl/graph/dot"
24+
"til/config/file"
25+
"til/core"
26+
"til/encoding"
27+
"til/graph/dot"
2828
)
2929

3030
// CLI subcommands
@@ -36,7 +36,7 @@ const (
3636

3737
// usage is a usageFn for the top level command.
3838
func usage(cmdName string) string {
39-
return "Interpreter for TriggerMesh's Bridge Description Language.\n" +
39+
return "Interpreter for TriggerMesh's Integration Language.\n" +
4040
"\n" +
4141
"USAGE:\n" +
4242
" " + cmdName + " <command>\n" +
@@ -128,7 +128,7 @@ func (c *GenerateCommand) Run(args ...string) error {
128128

129129
// value to use as the Bridge identifier in case none is defined in the
130130
// parsed Bridge description
131-
const defaultBridgeIdentifier = "bridgedl_generated"
131+
const defaultBridgeIdentifier = "til_generated"
132132

133133
brg, diags := file.NewParser().LoadBridge(filePath)
134134
if diags.HasErrors() {

‎config/addr/components.go

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Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ package addr
1919
import (
2020
"github.com/hashicorp/hcl/v2"
2121

22-
"bridgedl/config"
22+
"til/config"
2323
)
2424

2525
// Channel is the address of a "channel" block within a Bridge description.

‎config/file/decode.go

+2-2
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@ import (
2222
"github.com/hashicorp/hcl/v2"
2323
"github.com/hashicorp/hcl/v2/hclsyntax"
2424

25-
"bridgedl/config"
26-
"bridgedl/config/addr"
25+
"til/config"
26+
"til/config/addr"
2727
)
2828

2929
// decodeBridge performs a partial decoding of the Body of a Bridge Description

‎config/file/diagnostics.go

+1-1
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@@ -22,7 +22,7 @@ import (
2222
"github.com/hashicorp/hcl/v2"
2323
"github.com/zclconf/go-cty/cty"
2424

25-
"bridgedl/config"
25+
"til/config"
2626
)
2727

2828
// badIdentifierDiagnostic returns a hcl.Diagnostic which indicates that the

‎config/file/parse.go

+2-2
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@@ -24,8 +24,8 @@ import (
2424
"github.com/hashicorp/hcl/v2"
2525
"github.com/hashicorp/hcl/v2/hclparse"
2626

27-
"bridgedl/config"
28-
"bridgedl/fs"
27+
"til/config"
28+
"til/fs"
2929
)
3030

3131
// Parser can parse Bridge Description Files and decode them into actual Bridge structs.

‎config/file/parse_test.go

+2-2
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@@ -25,8 +25,8 @@ import (
2525
"github.com/hashicorp/hcl/v2"
2626
"github.com/hashicorp/hcl/v2/hclparse"
2727

28-
. "bridgedl/config/file"
29-
"bridgedl/fs"
28+
. "til/config/file"
29+
"til/fs"
3030
)
3131

3232
// List of available fixture files.

‎core/components_impl.go

+8-8
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@@ -19,14 +19,14 @@ package core
1919
import (
2020
"github.com/hashicorp/hcl/v2"
2121

22-
"bridgedl/config"
23-
"bridgedl/config/addr"
24-
25-
"bridgedl/internal/components/channels"
26-
"bridgedl/internal/components/routers"
27-
"bridgedl/internal/components/sources"
28-
"bridgedl/internal/components/targets"
29-
"bridgedl/internal/components/transformers"
22+
"til/config"
23+
"til/config/addr"
24+
25+
"til/internal/components/channels"
26+
"til/internal/components/routers"
27+
"til/internal/components/sources"
28+
"til/internal/components/targets"
29+
"til/internal/components/transformers"
3030
)
3131

3232
// componentImpls encapsulates the implementation of all known

‎core/context.go

+3-3
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@@ -21,9 +21,9 @@ import (
2121

2222
"github.com/hashicorp/hcl/v2"
2323

24-
"bridgedl/config"
25-
"bridgedl/fs"
26-
"bridgedl/graph"
24+
"til/config"
25+
"til/fs"
26+
"til/graph"
2727
)
2828

2929
// Context encapsulates everything that is required for performing operations

‎core/diagnostics.go

+1-1
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@@ -21,7 +21,7 @@ import (
2121

2222
"github.com/hashicorp/hcl/v2"
2323

24-
"bridgedl/config/addr"
24+
"til/config/addr"
2525
)
2626

2727
// noComponentImplDiagnostic returns a hcl.Diagnostic which indicates that no

‎core/eval.go

+4-4
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@@ -22,10 +22,10 @@ import (
2222
"github.com/zclconf/go-cty/cty"
2323
"github.com/zclconf/go-cty/cty/function"
2424

25-
"bridgedl/config"
26-
"bridgedl/config/globals"
27-
"bridgedl/fs"
28-
"bridgedl/lang"
25+
"til/config"
26+
"til/config/globals"
27+
"til/fs"
28+
"til/lang"
2929
)
3030

3131
// Evaluator can evaluate graph vertices by providing access to variables and

‎core/eval_test.go

+3-3
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,9 @@ import (
2525
"github.com/hashicorp/hcl/v2/hclparse"
2626
"github.com/zclconf/go-cty/cty"
2727

28-
"bridgedl/config"
29-
. "bridgedl/core"
30-
"bridgedl/fs"
28+
"til/config"
29+
. "til/core"
30+
"til/fs"
3131
)
3232

3333
func TestEvaluator(t *testing.T) {

‎core/graph.go

+2-2
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,8 @@ package core
1919
import (
2020
"github.com/hashicorp/hcl/v2"
2121

22-
"bridgedl/config"
23-
"bridgedl/graph"
22+
"til/config"
23+
"til/graph"
2424
)
2525

2626
// GraphBuilder builds a graph by applying a series of sequential

‎core/transform_add_components.go

+3-3
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,9 @@ package core
1919
import (
2020
"github.com/hashicorp/hcl/v2"
2121

22-
"bridgedl/config"
23-
"bridgedl/config/addr"
24-
"bridgedl/graph"
22+
"til/config"
23+
"til/config/addr"
24+
"til/graph"
2525
)
2626

2727
// MessagingComponentVertex is implemented by all messaging components of a

‎core/transform_attach_impl.go

+1-1
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ package core
1919
import (
2020
"github.com/hashicorp/hcl/v2"
2121

22-
"bridgedl/graph"
22+
"til/graph"
2323
)
2424

2525
// AttachableImplVertex is implemented by all types used as graph.Vertex that

‎core/transform_attach_spec.go

+2-2
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,8 @@ import (
2121
"github.com/hashicorp/hcl/v2/hcldec"
2222
"github.com/zclconf/go-cty/cty"
2323

24-
"bridgedl/graph"
25-
"bridgedl/translation"
24+
"til/graph"
25+
"til/translation"
2626
)
2727

2828
// AttachableSpecVertex is implemented by all types used as graph.Vertex that

‎core/transform_connect_dls.go

+5-5
Original file line numberDiff line numberDiff line change
@@ -19,10 +19,10 @@ package core
1919
import (
2020
"github.com/hashicorp/hcl/v2"
2121

22-
"bridgedl/config"
23-
"bridgedl/config/addr"
24-
"bridgedl/graph"
25-
"bridgedl/lang"
22+
"til/config"
23+
"til/config/addr"
24+
"til/graph"
25+
"til/lang"
2626
)
2727

2828
// ConnectDeadLetterSinkTransformer is a GraphTransformer that connects
@@ -62,7 +62,7 @@ func (t *ConnectDeadLetterSinkTransformer) Transform(g *graph.DirectedGraph) hcl
6262

6363
// TODO(antoineco): allow a dead-letter sink to be connected to other nodes,
6464
// as long as the subgraph starting at the dead-letter sink is acyclic.
65-
// See "Scenario 2" at triggermesh/bridgedl#137
65+
// See "Scenario 2" at triggermesh/til#137
6666
if _, dlsHasDownEdges := downEdges[dlsV]; dlsHasDownEdges {
6767
return diags.Append(&hcl.Diagnostic{
6868
Severity: hcl.DiagError,

‎core/transform_connect_refs.go

+2-2
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@ import (
2020
"github.com/hashicorp/hcl/v2"
2121
"github.com/zclconf/go-cty/cty"
2222

23-
"bridgedl/config/addr"
24-
"bridgedl/graph"
23+
"til/config/addr"
24+
"til/graph"
2525
)
2626

2727
// AddressableVertex is implemented by all types used as graph.Vertex that can

‎core/translate.go

+6-6
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@@ -20,12 +20,12 @@ import (
2020
"github.com/hashicorp/hcl/v2"
2121
"github.com/zclconf/go-cty/cty"
2222

23-
"bridgedl/config"
24-
"bridgedl/config/globals"
25-
"bridgedl/fs"
26-
"bridgedl/graph"
27-
"bridgedl/lang/k8s"
28-
"bridgedl/translation"
23+
"til/config"
24+
"til/config/globals"
25+
"til/fs"
26+
"til/graph"
27+
"til/lang/k8s"
28+
"til/translation"
2929
)
3030

3131
// BridgeTranslator translates a Bridge into a collection of Kubernetes API

‎core/vertex_channel.go

+6-6
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@@ -21,12 +21,12 @@ import (
2121
"github.com/hashicorp/hcl/v2/hcldec"
2222
"github.com/zclconf/go-cty/cty"
2323

24-
"bridgedl/config"
25-
"bridgedl/config/addr"
26-
"bridgedl/graph"
27-
"bridgedl/lang"
28-
"bridgedl/lang/k8s"
29-
"bridgedl/translation"
24+
"til/config"
25+
"til/config/addr"
26+
"til/graph"
27+
"til/lang"
28+
"til/lang/k8s"
29+
"til/translation"
3030
)
3131

3232
// ChannelVertex is an abstract representation of a Channel component within a graph.

‎core/vertex_router.go

+6-6
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@@ -21,12 +21,12 @@ import (
2121
"github.com/hashicorp/hcl/v2/hcldec"
2222
"github.com/zclconf/go-cty/cty"
2323

24-
"bridgedl/config"
25-
"bridgedl/config/addr"
26-
"bridgedl/graph"
27-
"bridgedl/lang"
28-
"bridgedl/lang/k8s"
29-
"bridgedl/translation"
24+
"til/config"
25+
"til/config/addr"
26+
"til/graph"
27+
"til/lang"
28+
"til/lang/k8s"
29+
"til/translation"
3030
)
3131

3232
// RouterVertex is an abstract representation of a Router component within a graph.

‎core/vertex_source.go

+4-4
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@@ -21,10 +21,10 @@ import (
2121
"github.com/hashicorp/hcl/v2/hcldec"
2222
"github.com/zclconf/go-cty/cty"
2323

24-
"bridgedl/config"
25-
"bridgedl/config/addr"
26-
"bridgedl/graph"
27-
"bridgedl/lang"
24+
"til/config"
25+
"til/config/addr"
26+
"til/graph"
27+
"til/lang"
2828
)
2929

3030
// SourceVertex is an abstract representation of a Source component within a graph.

‎core/vertex_target.go

+6-6
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@@ -21,12 +21,12 @@ import (
2121
"github.com/hashicorp/hcl/v2/hcldec"
2222
"github.com/zclconf/go-cty/cty"
2323

24-
"bridgedl/config"
25-
"bridgedl/config/addr"
26-
"bridgedl/graph"
27-
"bridgedl/lang"
28-
"bridgedl/lang/k8s"
29-
"bridgedl/translation"
24+
"til/config"
25+
"til/config/addr"
26+
"til/graph"
27+
"til/lang"
28+
"til/lang/k8s"
29+
"til/translation"
3030
)
3131

3232
// TargetVertex is an abstract representation of a Target component within a graph.

‎core/vertex_transformer.go

+6-6
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@@ -21,12 +21,12 @@ import (
2121
"github.com/hashicorp/hcl/v2/hcldec"
2222
"github.com/zclconf/go-cty/cty"
2323

24-
"bridgedl/config"
25-
"bridgedl/config/addr"
26-
"bridgedl/graph"
27-
"bridgedl/lang"
28-
"bridgedl/lang/k8s"
29-
"bridgedl/translation"
24+
"til/config"
25+
"til/config/addr"
26+
"til/graph"
27+
"til/lang"
28+
"til/lang/k8s"
29+
"til/translation"
3030
)
3131

3232
// TransformerVertex is an abstract representation of a Transformer component within a graph.

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