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25 | 25 | #include "llvm/CodeGen/ValueTypes.h"
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26 | 26 | #include "llvm/IR/DiagnosticInfo.h"
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27 | 27 | #include "llvm/IR/DiagnosticPrinter.h"
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| 28 | +#include "llvm/IR/IntrinsicsBPF.h" |
28 | 29 | #include "llvm/Support/Debug.h"
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29 | 30 | #include "llvm/Support/ErrorHandling.h"
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30 | 31 | #include "llvm/Support/raw_ostream.h"
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@@ -79,6 +80,8 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine &TM,
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79 | 80 | setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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80 | 81 | setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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81 | 82 |
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| 83 | + setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); |
| 84 | + |
82 | 85 | for (auto VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i32, MVT::i64}) {
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83 | 86 | if (Subtarget->isSolana()) {
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84 | 87 | // Implement custom lowering for all atomic operations
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@@ -367,10 +370,28 @@ SDValue BPFTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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367 | 370 | case ISD::ATOMIC_LOAD_UMIN:
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368 | 371 | case ISD::ATOMIC_LOAD_XOR:
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369 | 372 | return LowerATOMICRMW(Op, DAG);
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| 373 | + case ISD::INTRINSIC_W_CHAIN: { |
| 374 | + unsigned IntNo = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); |
| 375 | + switch (IntNo) { |
| 376 | + case Intrinsic::bpf_load_byte: |
| 377 | + case Intrinsic::bpf_load_half: |
| 378 | + case Intrinsic::bpf_load_word: |
| 379 | + if (Subtarget->isSolana()) { |
| 380 | + report_fatal_error( |
| 381 | + "llvm.bpf.load.* intrinsics are not supported in SBF", false); |
| 382 | + } |
| 383 | + break; |
| 384 | + default: |
| 385 | + break; |
| 386 | + } |
| 387 | + |
| 388 | + // continue the expansion as defined with tablegen |
| 389 | + return SDValue(); |
| 390 | + } |
370 | 391 | case ISD::DYNAMIC_STACKALLOC:
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371 | 392 | report_fatal_error("Unsupported dynamic stack allocation");
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372 | 393 | default:
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373 |
| - llvm_unreachable("unimplemented atomic operand"); |
| 394 | + llvm_unreachable("unimplemented operation"); |
374 | 395 | }
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375 | 396 | }
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376 | 397 |
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