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Adapt registers to Atpack 1.2.202 names
1 parent 967e00d commit 1f38911

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cores/arduino/wiring.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -291,7 +291,7 @@ void init()
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/* TYPE A TIMER */
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/* PORTMUX setting for TCA -> all outputs [0:2] point to PORTB pins [0:2] */
294-
PORTMUX.TCA = PORTMUX_TCA0_PORTB_gc;
294+
PORTMUX.TCAROUTEA = PORTMUX_TCA0_PORTB_gc;
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/* Setup timers for single slope PWM, but do not enable, will do in analogWrite() */
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TCA0.SINGLE.CTRLB |= (TCA_SINGLE_WGMODE_SINGLESLOPE_gc);
@@ -311,7 +311,7 @@ void init()
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/* TYPE B TIMERS */
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/* PORTMUX alternate location needed for TCB0 & 1, TCB2 is default location */
314-
PORTMUX.TCB |= (PORTMUX_TCB0_bm | PORTMUX_TCB1_bm);
314+
PORTMUX.TCBROUTEA |= (PORTMUX_TCB0_bm | PORTMUX_TCB1_bm);
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/* Start with TCB0 */
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TCB_t *timer_B = (TCB_t *)&TCB0;
@@ -393,7 +393,7 @@ void init()
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/****************************** USART *****************************************/
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/* Configure PORTMUX for USARTS */
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PORTMUX.USARTA = (PORTMUX_USART1_ALT1_gc // MAIN
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PORTMUX.USARTROUTEA = (PORTMUX_USART1_ALT1_gc // MAIN
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| PORTMUX_USART0_ALT1_gc // SPARE
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| PORTMUX_USART3_ALT1_gc); // DEBUG
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