diff --git a/samples/drivers/counter/alarm/CMakeLists.txt b/samples/drivers/counter/alarm/CMakeLists.txt
index 747c2b27ebd6..f0042d03ce76 100644
--- a/samples/drivers/counter/alarm/CMakeLists.txt
+++ b/samples/drivers/counter/alarm/CMakeLists.txt
@@ -12,3 +12,6 @@ if(CONFIG_BUILD_WITH_TFM)
     $<TARGET_PROPERTY:tfm,TFM_BINARY_DIR>/api_ns/interface/include
   )
 endif()
+
+
+target_include_directories(app PUBLIC "${CMAKE_SOURCE_DIR}/../../../../../modules/hal/espressif/components/soc/esp32c6/include/soc")
\ No newline at end of file
diff --git a/samples/drivers/counter/alarm/boards/esp32c6_devkitc.overlay b/samples/drivers/counter/alarm/boards/esp32c6_devkitc.overlay
new file mode 100644
index 000000000000..8461226ca9ab
--- /dev/null
+++ b/samples/drivers/counter/alarm/boards/esp32c6_devkitc.overlay
@@ -0,0 +1,3 @@
+&timer0 {
+	status = "okay";
+};
\ No newline at end of file
diff --git a/samples/drivers/counter/alarm/prj.conf b/samples/drivers/counter/alarm/prj.conf
index 9d51e5fcdb38..b79c9e88731a 100644
--- a/samples/drivers/counter/alarm/prj.conf
+++ b/samples/drivers/counter/alarm/prj.conf
@@ -1,2 +1,2 @@
 CONFIG_PRINTK=y
-CONFIG_COUNTER=y
+CONFIG_COUNTER=y
\ No newline at end of file
diff --git a/samples/drivers/counter/alarm/src/main.c b/samples/drivers/counter/alarm/src/main.c
index 7a345de8230b..f1252af8bdda 100644
--- a/samples/drivers/counter/alarm/src/main.c
+++ b/samples/drivers/counter/alarm/src/main.c
@@ -86,16 +86,16 @@ static void test_counter_interrupt_fn(const struct device *counter_dev,
 	now_usec = counter_ticks_to_us(counter_dev, now_ticks);
 	now_sec = (int)(now_usec / USEC_PER_SEC);
 
-	printk("!!! Alarm !!!\n");
+	//printk("!!! Alarm !!!\n");
 	printk("Now: %u\n", now_sec);
 
 	/* Set a new alarm with a double length duration */
 	config->ticks = config->ticks * 2U;
 
-	printk("Set alarm in %u sec (%u ticks)\n",
-	       (uint32_t)(counter_ticks_to_us(counter_dev,
-					   config->ticks) / USEC_PER_SEC),
-	       config->ticks);
+	//printk("Set alarm in %u sec (%u ticks)\n",
+	//       (uint32_t)(counter_ticks_to_us(counter_dev,
+	//				   config->ticks) / USEC_PER_SEC),
+	//       config->ticks);
 
 	err = counter_set_channel_alarm(counter_dev, ALARM_CHANNEL_ID,
 					user_data);
@@ -104,8 +104,58 @@ static void test_counter_interrupt_fn(const struct device *counter_dev,
 	}
 }
 
+#include "pcr_struct.h"
+#include "pcr_reg.h"
+#include "timer_group_struct.h"
+#include "timer_group_reg.h"
+#include "periph_defs.h"
+#include <zephyr/devicetree.h>
+static volatile uint32_t global_var = 0;
+
+void timer1_setup(void) {
+	REG_SET_BIT(PCR_TIMERGROUP1_CONF_REG, PCR_TG1_CLK_EN_M);
+	REG_CLR_BIT(PCR_TIMERGROUP1_CONF_REG, PCR_TG1_RST_EN_M);
+	printk("pcr cfg %u\n", REG_READ(PCR_TIMERGROUP1_CONF_REG));
+	REG_SET_BIT(PCR_TIMERGROUP1_TIMER_CLK_CONF_REG, PCR_TG1_TIMER_CLK_EN_M);
+	REG_SET_BIT(PCR_TIMERGROUP1_TIMER_CLK_CONF_REG, (1<<PCR_TG1_TIMER_CLK_SEL_S));
+	printk("pcr clk cfg %u\n", REG_READ(PCR_TIMERGROUP1_TIMER_CLK_CONF_REG));
+
+	REG_WRITE(TIMG_T0CONFIG_REG(1), 0);
+	REG_SET_BIT(TIMG_T0CONFIG_REG(1), (
+		(2000<<TIMG_T0_DIVIDER_S) | // 80 MHz / 2000 = 40 kHz
+		TIMG_T0_DIVCNT_RST_M |
+		TIMG_T0_INCREASE_M |
+		TIMG_T0_ALARM_EN_M
+	));
+	printk("tm1 cfg %u\n", REG_READ(TIMG_T0CONFIG_REG(1)));
+
+	REG_WRITE(TIMG_T0ALARMLO_REG(1), 2400000); // 1 min
+	REG_WRITE(TIMG_T0ALARMHI_REG(1), 0);
+	printk("tm1 alm lo %u\n", REG_READ(TIMG_T0ALARMLO_REG(1)));
+	printk("tm1 alm hi %u\n", REG_READ(TIMG_T0ALARMHI_REG(1)));
+
+	REG_SET_BIT(TIMG_INT_ENA_TIMERS_REG(1), TIMG_T0_INT_ENA_M);
+	printk("tm1 int ena %u\n", REG_READ(TIMG_INT_ENA_TIMERS_REG(1)));
+
+	REG_WRITE(TIMG_T0LOADLO_REG(1), 0);
+	printk("tm1 load lo %u\n", REG_READ(TIMG_T0LOADLO_REG(1)));
+	REG_WRITE(TIMG_T0LOADHI_REG(1), 0);
+	printk("tm1 load hi %u\n", REG_READ(TIMG_T0LOADHI_REG(1)));
+
+	REG_SET_BIT(TIMG_T0CONFIG_REG(1), (TIMG_T0_EN_M | TIMG_T0_AUTORELOAD_M));
+	printk("tm1 cfg %u\n", REG_READ(TIMG_T0CONFIG_REG(1)));
+}
+
+void timer1_handler(void *arg)
+{
+	REG_SET_BIT(TIMG_INT_CLR_TIMERS_REG(1), TIMG_T0_INT_CLR_M);
+	REG_SET_BIT(TIMG_T0CONFIG_REG(1), (TIMG_T0_EN_M | TIMG_T0_ALARM_EN_M));
+	global_var++;
+}
+
 int main(void)
 {
+	uint32_t timeout = 0;
 	const struct device *const counter_dev = DEVICE_DT_GET(TIMER);
 	int err;
 
@@ -138,8 +188,29 @@ int main(void)
 		printk("Error\n");
 	}
 
+	IRQ_CONNECT(ETS_TG1_T0_LEVEL_INTR_SOURCE, 2, timer1_handler, NULL, 0);
+	irq_enable(ETS_TG1_T0_LEVEL_INTR_SOURCE);
+	timer1_setup();
+
 	while (1) {
-		k_sleep(K_FOREVER);
+		REG_SET_BIT(TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE_M);
+		while(REG_GET_BIT(TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE_M) && timeout < 100) {
+			timeout++;
+		}
+		if(timeout < 100) {
+			uint64_t val = REG_READ(TIMG_T0LO_REG(1)) | ((uint64_t)(REG_READ(TIMG_T0HI_REG(1)) & TIMG_T0_HI_M) << 32);
+			//printk("%llu\n", val);
+		} else {
+			printk("tm1 update timeout\n");
+		}
+
+		if(global_var) {
+			printk("tm1 int\n");
+			global_var = 0;
+		}
+
+		k_msleep(100);
+		timeout = 0;
 	}
 	return 0;
 }