Skip to content

Commit e1c5afa

Browse files
committed
Reland "Reland "[X86][RFC] Enable _Float16 type support on X86 following the psABI""
Fixed the missing SQRT promotion. Adding several missing operations too.
1 parent 96ccb69 commit e1c5afa

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

50 files changed

+4862
-4604
lines changed

llvm/docs/ReleaseNotes.rst

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -138,7 +138,7 @@ Changes to the WebAssembly Backend
138138
Changes to the X86 Backend
139139
--------------------------
140140

141-
* ...
141+
* Support ``half`` type on SSE2 and above targets.
142142

143143
Changes to the OCaml bindings
144144
-----------------------------

llvm/lib/Target/X86/X86FastISel.cpp

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -148,8 +148,7 @@ class X86FastISel final : public FastISel {
148148
/// computed in an SSE register, not on the X87 floating point stack.
149149
bool isScalarFPTypeInSSEReg(EVT VT) const {
150150
return (VT == MVT::f64 && Subtarget->hasSSE2()) ||
151-
(VT == MVT::f32 && Subtarget->hasSSE1()) ||
152-
(VT == MVT::f16 && Subtarget->hasFP16());
151+
(VT == MVT::f32 && Subtarget->hasSSE1()) || VT == MVT::f16;
153152
}
154153

155154
bool isTypeLegal(Type *Ty, MVT &VT, bool AllowI1 = false);
@@ -2281,12 +2280,13 @@ bool X86FastISel::X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I) {
22812280
default: return false;
22822281
case MVT::i8: Opc = X86::CMOV_GR8; break;
22832282
case MVT::i16: Opc = X86::CMOV_GR16; break;
2284-
case MVT::f16: Opc = X86::CMOV_FR16X; break;
22852283
case MVT::i32: Opc = X86::CMOV_GR32; break;
2286-
case MVT::f32: Opc = Subtarget->hasAVX512() ? X86::CMOV_FR32X
2287-
: X86::CMOV_FR32; break;
2288-
case MVT::f64: Opc = Subtarget->hasAVX512() ? X86::CMOV_FR64X
2289-
: X86::CMOV_FR64; break;
2284+
case MVT::f16:
2285+
Opc = Subtarget->hasAVX512() ? X86::CMOV_FR16X : X86::CMOV_FR16; break;
2286+
case MVT::f32:
2287+
Opc = Subtarget->hasAVX512() ? X86::CMOV_FR32X : X86::CMOV_FR32; break;
2288+
case MVT::f64:
2289+
Opc = Subtarget->hasAVX512() ? X86::CMOV_FR64X : X86::CMOV_FR64; break;
22902290
}
22912291

22922292
const Value *Cond = I->getOperand(0);
@@ -3903,6 +3903,9 @@ unsigned X86FastISel::fastMaterializeFloatZero(const ConstantFP *CF) {
39033903
unsigned Opc = 0;
39043904
switch (VT.SimpleTy) {
39053905
default: return 0;
3906+
case MVT::f16:
3907+
Opc = HasAVX512 ? X86::AVX512_FsFLD0SH : X86::FsFLD0SH;
3908+
break;
39063909
case MVT::f32:
39073910
Opc = HasAVX512 ? X86::AVX512_FsFLD0SS
39083911
: HasSSE1 ? X86::FsFLD0SS

0 commit comments

Comments
 (0)