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[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (llvm#123428)
``` - add clang builtin to Builtins.td - link builtin in hlsl_intrinsics - add codegen for spirv intrinsic and two directx intrinsics to retain signedness information of the operands in CGBuiltin.cpp - add semantic analysis in SemaHLSL.cpp - add lowering of spirv intrinsic to spirv backend in SPIRVInstructionSelector.cpp - add lowering of directx intrinsics to WaveActiveOp dxil op in DXIL.td - add test cases to illustrate passespendent pr merges. ``` Resolves llvm#99170
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13 files changed

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clang/include/clang/Basic/Builtins.td

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4795,6 +4795,12 @@ def HLSLWaveActiveCountBits : LangBuiltin<"HLSL_LANG"> {
47954795
let Prototype = "unsigned int(bool)";
47964796
}
47974797

4798+
def HLSLWaveActiveMax : LangBuiltin<"HLSL_LANG"> {
4799+
let Spellings = ["__builtin_hlsl_wave_active_max"];
4800+
let Attributes = [NoThrow, Const];
4801+
let Prototype = "void (...)";
4802+
}
4803+
47984804
def HLSLWaveActiveSum : LangBuiltin<"HLSL_LANG"> {
47994805
let Spellings = ["__builtin_hlsl_wave_active_sum"];
48004806
let Attributes = [NoThrow, Const];

clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19295,6 +19295,25 @@ static Intrinsic::ID getWaveActiveSumIntrinsic(llvm::Triple::ArchType Arch,
1929519295
}
1929619296
}
1929719297

19298+
// Return wave active sum that corresponds to the QT scalar type
19299+
static Intrinsic::ID getWaveActiveMaxIntrinsic(llvm::Triple::ArchType Arch,
19300+
CGHLSLRuntime &RT, QualType QT) {
19301+
switch (Arch) {
19302+
case llvm::Triple::spirv:
19303+
if (QT->isUnsignedIntegerType())
19304+
return llvm::Intrinsic::spv_wave_reduce_umax;
19305+
return llvm::Intrinsic::spv_wave_reduce_max;
19306+
case llvm::Triple::dxil: {
19307+
if (QT->isUnsignedIntegerType())
19308+
return llvm::Intrinsic::dx_wave_reduce_umax;
19309+
return llvm::Intrinsic::dx_wave_reduce_max;
19310+
}
19311+
default:
19312+
llvm_unreachable("Intrinsic WaveActiveMax"
19313+
" not supported by target architecture");
19314+
}
19315+
}
19316+
1929819317
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
1929919318
const CallExpr *E,
1930019319
ReturnValueSlot ReturnValue) {
@@ -19624,6 +19643,23 @@ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
1962419643
/*AssumeConvergent=*/true),
1962519644
ArrayRef{OpExpr}, "hlsl.wave.active.sum");
1962619645
}
19646+
case Builtin::BI__builtin_hlsl_wave_active_max: {
19647+
// Due to the use of variadic arguments, explicitly retreive argument
19648+
Value *OpExpr = EmitScalarExpr(E->getArg(0));
19649+
llvm::FunctionType *FT = llvm::FunctionType::get(
19650+
OpExpr->getType(), ArrayRef{OpExpr->getType()}, false);
19651+
Intrinsic::ID IID = getWaveActiveMaxIntrinsic(
19652+
getTarget().getTriple().getArch(), CGM.getHLSLRuntime(),
19653+
E->getArg(0)->getType());
19654+
19655+
// Get overloaded name
19656+
std::string Name =
19657+
Intrinsic::getName(IID, ArrayRef{OpExpr->getType()}, &CGM.getModule());
19658+
return EmitRuntimeCall(CGM.CreateRuntimeFunction(FT, Name, {},
19659+
/*Local=*/false,
19660+
/*AssumeConvergent=*/true),
19661+
ArrayRef{OpExpr}, "hlsl.wave.active.max");
19662+
}
1962719663
case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
1962819664
// We don't define a SPIR-V intrinsic, instead it is a SPIR-V built-in
1962919665
// defined in SPIRVBuiltins.td. So instead we manually get the matching name

clang/lib/Headers/hlsl/hlsl_intrinsics.h

Lines changed: 99 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2468,6 +2468,105 @@ __attribute__((convergent)) double3 WaveReadLaneAt(double3, int32_t);
24682468
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_read_lane_at)
24692469
__attribute__((convergent)) double4 WaveReadLaneAt(double4, int32_t);
24702470

2471+
//===----------------------------------------------------------------------===//
2472+
// WaveActiveMax builtins
2473+
//===----------------------------------------------------------------------===//
2474+
2475+
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.0)
2476+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2477+
__attribute__((convergent)) half WaveActiveMax(half);
2478+
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.0)
2479+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2480+
__attribute__((convergent)) half2 WaveActiveMax(half2);
2481+
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.0)
2482+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2483+
__attribute__((convergent)) half3 WaveActiveMax(half3);
2484+
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.0)
2485+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2486+
__attribute__((convergent)) half4 WaveActiveMax(half4);
2487+
2488+
#ifdef __HLSL_ENABLE_16_BIT
2489+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2490+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2491+
__attribute__((convergent)) int16_t WaveActiveMax(int16_t);
2492+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2493+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2494+
__attribute__((convergent)) int16_t2 WaveActiveMax(int16_t2);
2495+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2496+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2497+
__attribute__((convergent)) int16_t3 WaveActiveMax(int16_t3);
2498+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2499+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2500+
__attribute__((convergent)) int16_t4 WaveActiveMax(int16_t4);
2501+
2502+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2503+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2504+
__attribute__((convergent)) uint16_t WaveActiveMax(uint16_t);
2505+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2506+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2507+
__attribute__((convergent)) uint16_t2 WaveActiveMax(uint16_t2);
2508+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2509+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2510+
__attribute__((convergent)) uint16_t3 WaveActiveMax(uint16_t3);
2511+
_HLSL_AVAILABILITY(shadermodel, 6.0)
2512+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2513+
__attribute__((convergent)) uint16_t4 WaveActiveMax(uint16_t4);
2514+
#endif
2515+
2516+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2517+
__attribute__((convergent)) int WaveActiveMax(int);
2518+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2519+
__attribute__((convergent)) int2 WaveActiveMax(int2);
2520+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2521+
__attribute__((convergent)) int3 WaveActiveMax(int3);
2522+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2523+
__attribute__((convergent)) int4 WaveActiveMax(int4);
2524+
2525+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2526+
__attribute__((convergent)) uint WaveActiveMax(uint);
2527+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2528+
__attribute__((convergent)) uint2 WaveActiveMax(uint2);
2529+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2530+
__attribute__((convergent)) uint3 WaveActiveMax(uint3);
2531+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2532+
__attribute__((convergent)) uint4 WaveActiveMax(uint4);
2533+
2534+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2535+
__attribute__((convergent)) int64_t WaveActiveMax(int64_t);
2536+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2537+
__attribute__((convergent)) int64_t2 WaveActiveMax(int64_t2);
2538+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2539+
__attribute__((convergent)) int64_t3 WaveActiveMax(int64_t3);
2540+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2541+
__attribute__((convergent)) int64_t4 WaveActiveMax(int64_t4);
2542+
2543+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2544+
__attribute__((convergent)) uint64_t WaveActiveMax(uint64_t);
2545+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2546+
__attribute__((convergent)) uint64_t2 WaveActiveMax(uint64_t2);
2547+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2548+
__attribute__((convergent)) uint64_t3 WaveActiveMax(uint64_t3);
2549+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2550+
__attribute__((convergent)) uint64_t4 WaveActiveMax(uint64_t4);
2551+
2552+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2553+
__attribute__((convergent)) float WaveActiveMax(float);
2554+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2555+
__attribute__((convergent)) float2 WaveActiveMax(float2);
2556+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2557+
__attribute__((convergent)) float3 WaveActiveMax(float3);
2558+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2559+
__attribute__((convergent)) float4 WaveActiveMax(float4);
2560+
2561+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2562+
__attribute__((convergent)) double WaveActiveMax(double);
2563+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2564+
__attribute__((convergent)) double2 WaveActiveMax(double2);
2565+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2566+
__attribute__((convergent)) double3 WaveActiveMax(double3);
2567+
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_max)
2568+
__attribute__((convergent)) double4 WaveActiveMax(double4);
2569+
24712570
//===----------------------------------------------------------------------===//
24722571
// WaveActiveSum builtins
24732572
//===----------------------------------------------------------------------===//

clang/lib/Sema/SemaHLSL.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2430,6 +2430,7 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
24302430
TheCall->setType(ArgTyA);
24312431
break;
24322432
}
2433+
case Builtin::BI__builtin_hlsl_wave_active_max:
24332434
case Builtin::BI__builtin_hlsl_wave_active_sum: {
24342435
if (SemaRef.checkArgCount(TheCall, 1))
24352436
return true;
Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
2+
// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o - | \
3+
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
4+
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
5+
// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \
6+
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
7+
8+
// Test basic lowering to runtime function call.
9+
10+
// CHECK-LABEL: test_int
11+
int test_int(int expr) {
12+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.reduce.max.i32([[TY]] %[[#]])
13+
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.reduce.max.i32([[TY]] %[[#]])
14+
// CHECK: ret [[TY]] %[[RET]]
15+
return WaveActiveMax(expr);
16+
}
17+
18+
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.max.i32([[TY]]) #[[#attr:]]
19+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.max.i32([[TY]]) #[[#attr:]]
20+
21+
// CHECK-LABEL: test_uint64_t
22+
uint64_t test_uint64_t(uint64_t expr) {
23+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.reduce.umax.i64([[TY]] %[[#]])
24+
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.reduce.umax.i64([[TY]] %[[#]])
25+
// CHECK: ret [[TY]] %[[RET]]
26+
return WaveActiveMax(expr);
27+
}
28+
29+
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.umax.i64([[TY]]) #[[#attr:]]
30+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.umax.i64([[TY]]) #[[#attr:]]
31+
32+
// Test basic lowering to runtime function call with array and float value.
33+
34+
// CHECK-LABEL: test_floatv4
35+
float4 test_floatv4(float4 expr) {
36+
// CHECK-SPIRV: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn spir_func [[TY1:.*]] @llvm.spv.wave.reduce.max.v4f32([[TY1]] %[[#]]
37+
// CHECK-DXIL: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn [[TY1:.*]] @llvm.dx.wave.reduce.max.v4f32([[TY1]] %[[#]])
38+
// CHECK: ret [[TY1]] %[[RET1]]
39+
return WaveActiveMax(expr);
40+
}
41+
42+
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.reduce.max.v4f32([[TY1]]) #[[#attr]]
43+
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.reduce.max.v4f32([[TY1]]) #[[#attr]]
44+
45+
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}
46+
Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -emit-llvm-only -disable-llvm-passes -verify
2+
3+
int test_too_few_arg() {
4+
return __builtin_hlsl_wave_active_max();
5+
// expected-error@-1 {{too few arguments to function call, expected 1, have 0}}
6+
}
7+
8+
float2 test_too_many_arg(float2 p0) {
9+
return __builtin_hlsl_wave_active_max(p0, p0);
10+
// expected-error@-1 {{too many arguments to function call, expected 1, have 2}}
11+
}
12+
13+
bool test_expr_bool_type_check(bool p0) {
14+
return __builtin_hlsl_wave_active_max(p0);
15+
// expected-error@-1 {{invalid operand of type 'bool'}}
16+
}
17+
18+
bool2 test_expr_bool_vec_type_check(bool2 p0) {
19+
return __builtin_hlsl_wave_active_max(p0);
20+
// expected-error@-1 {{invalid operand of type 'bool2' (aka 'vector<bool, 2>')}}
21+
}
22+
23+
struct S { float f; };
24+
25+
S test_expr_struct_type_check(S p0) {
26+
return __builtin_hlsl_wave_active_max(p0);
27+
// expected-error@-1 {{invalid operand of type 'S' where a scalar or vector is required}}
28+
}
29+

llvm/include/llvm/IR/IntrinsicsDirectX.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,8 @@ def int_dx_wave_active_countbits : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i1
105105
def int_dx_wave_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
106106
def int_dx_wave_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
107107
def int_dx_wave_getlaneindex : DefaultAttrsIntrinsic<[llvm_i32_ty], [], [IntrConvergent, IntrNoMem]>;
108+
def int_dx_wave_reduce_max : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
109+
def int_dx_wave_reduce_umax : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
108110
def int_dx_wave_reduce_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
109111
def int_dx_wave_reduce_usum : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
110112
def int_dx_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;

llvm/include/llvm/IR/IntrinsicsSPIRV.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,8 @@ let TargetPrefix = "spv" in {
9191
def int_spv_wave_active_countbits : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
9292
def int_spv_wave_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
9393
def int_spv_wave_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
94+
def int_spv_wave_reduce_umax : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
95+
def int_spv_wave_reduce_max : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
9496
def int_spv_wave_reduce_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
9597
def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;
9698
def int_spv_wave_readlane : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;

llvm/lib/Target/DirectX/DXIL.td

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1000,6 +1000,16 @@ def WaveActiveOp : DXILOp<119, waveActiveOp> {
10001000
IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
10011001
IntrinArgI8<SignedOpKind_Unsigned>
10021002
]>,
1003+
IntrinSelect<int_dx_wave_reduce_max,
1004+
[
1005+
IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Max>,
1006+
IntrinArgI8<SignedOpKind_Signed>
1007+
]>,
1008+
IntrinSelect<int_dx_wave_reduce_umax,
1009+
[
1010+
IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Max>,
1011+
IntrinArgI8<SignedOpKind_Unsigned>
1012+
]>,
10031013
];
10041014

10051015
let arguments = [OverloadTy, Int8Ty, Int8Ty];
@@ -1008,7 +1018,7 @@ def WaveActiveOp : DXILOp<119, waveActiveOp> {
10081018
Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int16Ty, Int32Ty, Int64Ty]>
10091019
];
10101020
let stages = [Stages<DXIL1_0, [all_stages]>];
1011-
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
1021+
let attributes = [Attributes<DXIL1_0, []>];
10121022
}
10131023

10141024
def WaveAllBitCount : DXILOp<135, waveAllOp> {

llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,8 @@ bool DirectXTTIImpl::isTargetIntrinsicTriviallyScalarizable(
4040
switch (ID) {
4141
case Intrinsic::dx_frac:
4242
case Intrinsic::dx_rsqrt:
43+
case Intrinsic::dx_wave_reduce_max:
44+
case Intrinsic::dx_wave_reduce_umax:
4345
case Intrinsic::dx_wave_reduce_sum:
4446
case Intrinsic::dx_wave_reduce_usum:
4547
case Intrinsic::dx_wave_readlane:

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -215,6 +215,9 @@ class SPIRVInstructionSelector : public InstructionSelector {
215215
bool selectDot4AddPackedExpansion(Register ResVReg, const SPIRVType *ResType,
216216
MachineInstr &I) const;
217217

218+
bool selectWaveReduceMax(Register ResVReg, const SPIRVType *ResType,
219+
MachineInstr &I, bool IsUnsigned) const;
220+
218221
bool selectWaveReduceSum(Register ResVReg, const SPIRVType *ResType,
219222
MachineInstr &I) const;
220223

@@ -2132,6 +2135,34 @@ bool SPIRVInstructionSelector::selectWaveActiveCountBits(
21322135
return Result;
21332136
}
21342137

2138+
bool SPIRVInstructionSelector::selectWaveReduceMax(Register ResVReg,
2139+
const SPIRVType *ResType,
2140+
MachineInstr &I,
2141+
bool IsUnsigned) const {
2142+
assert(I.getNumOperands() == 3);
2143+
assert(I.getOperand(2).isReg());
2144+
MachineBasicBlock &BB = *I.getParent();
2145+
Register InputRegister = I.getOperand(2).getReg();
2146+
SPIRVType *InputType = GR.getSPIRVTypeForVReg(InputRegister);
2147+
2148+
if (!InputType)
2149+
report_fatal_error("Input Type could not be determined.");
2150+
2151+
SPIRVType *IntTy = GR.getOrCreateSPIRVIntegerType(32, I, TII);
2152+
// Retreive the operation to use based on input type
2153+
bool IsFloatTy = GR.isScalarOrVectorOfType(InputRegister, SPIRV::OpTypeFloat);
2154+
auto IntegerOpcodeType =
2155+
IsUnsigned ? SPIRV::OpGroupNonUniformUMax : SPIRV::OpGroupNonUniformSMax;
2156+
auto Opcode = IsFloatTy ? SPIRV::OpGroupNonUniformFMax : IntegerOpcodeType;
2157+
return BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode))
2158+
.addDef(ResVReg)
2159+
.addUse(GR.getSPIRVTypeID(ResType))
2160+
.addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I, IntTy, TII))
2161+
.addImm(SPIRV::GroupOperation::Reduce)
2162+
.addUse(I.getOperand(2).getReg())
2163+
.constrainAllUses(TII, TRI, RBI);
2164+
}
2165+
21352166
bool SPIRVInstructionSelector::selectWaveReduceSum(Register ResVReg,
21362167
const SPIRVType *ResType,
21372168
MachineInstr &I) const {
@@ -3086,6 +3117,10 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
30863117
return selectWaveOpInst(ResVReg, ResType, I, SPIRV::OpGroupNonUniformAny);
30873118
case Intrinsic::spv_wave_is_first_lane:
30883119
return selectWaveOpInst(ResVReg, ResType, I, SPIRV::OpGroupNonUniformElect);
3120+
case Intrinsic::spv_wave_reduce_umax:
3121+
return selectWaveReduceMax(ResVReg, ResType, I, /*IsUnsigned*/ true);
3122+
case Intrinsic::spv_wave_reduce_max:
3123+
return selectWaveReduceMax(ResVReg, ResType, I, /*IsUnsigned*/ false);
30893124
case Intrinsic::spv_wave_reduce_sum:
30903125
return selectWaveReduceSum(ResVReg, ResType, I);
30913126
case Intrinsic::spv_wave_readlane:

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