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Revert "[LLVM] [X86] Fix integer overflows in frame layout for huge frames (llvm#101840)"
This casuses assertion failures targeting 32-bit x86: lib/Target/X86/X86RegisterInfo.cpp:989: virtual bool llvm::X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator, int, unsigned int, RegScavenger *) const: Assertion `(Is64Bit || FitsIn32Bits) && "Requesting 64-bit offset in 32-bit immediate!"' failed. See comment on the PR. > Fix 32-bit integer overflows in the X86 target frame layout when dealing > with frames larger than 4gb. When this occurs, we'll scavenge a scratch > register to be able to hold the correct stack offset for frame locals. > > This completes reapplying llvm#84114. > > Fixes llvm#48911 > Fixes llvm#75944 > Fixes llvm#87154 This reverts commit 0abb779.
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‎llvm/lib/CodeGen/PrologEpilogInserter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1553,7 +1553,7 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
15531553
// If this instruction has a FrameIndex operand, we need to
15541554
// use that target machine register info object to eliminate
15551555
// it.
1556-
TRI.eliminateFrameIndex(MI, SPAdj, i, RS);
1556+
TRI.eliminateFrameIndex(MI, SPAdj, i);
15571557

15581558
// Reset the iterator if we were at the beginning of the BB.
15591559
if (AtBeginning) {

‎llvm/lib/Target/X86/X86FrameLowering.cpp

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,6 @@
2424
#include "llvm/CodeGen/MachineInstrBuilder.h"
2525
#include "llvm/CodeGen/MachineModuleInfo.h"
2626
#include "llvm/CodeGen/MachineRegisterInfo.h"
27-
#include "llvm/CodeGen/RegisterScavenging.h"
2827
#include "llvm/CodeGen/WinEHFuncInfo.h"
2928
#include "llvm/IR/DataLayout.h"
3029
#include "llvm/IR/EHPersonalities.h"
@@ -2617,7 +2616,7 @@ StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF,
26172616
// object.
26182617
// We need to factor in additional offsets applied during the prologue to the
26192618
// frame, base, and stack pointer depending on which is used.
2620-
int64_t Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
2619+
int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
26212620
const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
26222621
unsigned CSSize = X86FI->getCalleeSavedFrameSize();
26232622
uint64_t StackSize = MFI.getStackSize();
@@ -4141,14 +4140,6 @@ void X86FrameLowering::processFunctionBeforeFrameFinalized(
41414140
// emitPrologue if it gets called and emits CFI.
41424141
MF.setHasWinCFI(false);
41434142

4144-
MachineFrameInfo &MFI = MF.getFrameInfo();
4145-
// If the frame is big enough that we might need to scavenge a register to
4146-
// handle huge offsets, reserve a stack slot for that now.
4147-
if (!isInt<32>(MFI.estimateStackSize(MF))) {
4148-
int FI = MFI.CreateStackObject(SlotSize, Align(SlotSize), false);
4149-
RS->addScavengingFrameIndex(FI);
4150-
}
4151-
41524143
// If we are using Windows x64 CFI, ensure that the stack is always 8 byte
41534144
// aligned. The format doesn't support misaligned stack adjustments.
41544145
if (MF.getTarget().getMCAsmInfo()->usesWindowsCFI())

‎llvm/lib/Target/X86/X86RegisterInfo.cpp

Lines changed: 5 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@
1313
//===----------------------------------------------------------------------===//
1414

1515
#include "X86RegisterInfo.h"
16-
#include "MCTargetDesc/X86BaseInfo.h"
1716
#include "X86FrameLowering.h"
1817
#include "X86MachineFunctionInfo.h"
1918
#include "X86Subtarget.h"
@@ -25,7 +24,6 @@
2524
#include "llvm/CodeGen/MachineFunction.h"
2625
#include "llvm/CodeGen/MachineFunctionPass.h"
2726
#include "llvm/CodeGen/MachineRegisterInfo.h"
28-
#include "llvm/CodeGen/RegisterScavenging.h"
2927
#include "llvm/CodeGen/TargetFrameLowering.h"
3028
#include "llvm/CodeGen/TargetInstrInfo.h"
3129
#include "llvm/CodeGen/TileShapeInfo.h"
@@ -907,7 +905,7 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
907905
int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
908906

909907
// Determine base register and offset.
910-
int64_t FIOffset;
908+
int FIOffset;
911909
Register BasePtr;
912910
if (MI.isReturn()) {
913911
assert((!hasStackRealignment(MF) ||
@@ -958,34 +956,10 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
958956
}
959957

960958
if (MI.getOperand(FIOperandNum+3).isImm()) {
961-
int64_t Imm = MI.getOperand(FIOperandNum + 3).getImm();
962-
int64_t Offset = FIOffset + Imm;
963-
bool FitsIn32Bits = isInt<32>(Offset);
964-
// If the offset will not fit in a 32-bit displacement,
965-
// then for 64-bit targets, scavenge a register to hold it.
966-
// Otherwise, for 32-bit targets, this is a bug!
967-
if (Is64Bit && !FitsIn32Bits) {
968-
assert(RS && "RegisterScavenger was NULL");
969-
const X86InstrInfo *TII = MF.getSubtarget<X86Subtarget>().getInstrInfo();
970-
const DebugLoc &DL = MI.getDebugLoc();
971-
972-
RS->enterBasicBlockEnd(MBB);
973-
RS->backward(std::next(II));
974-
975-
Register ScratchReg = RS->scavengeRegisterBackwards(
976-
X86::GR64RegClass, II, /*RestoreAfter=*/false, /*SPAdj=*/0,
977-
/*AllowSpill=*/true);
978-
assert(ScratchReg != 0 && "scratch reg was 0");
979-
RS->setRegUsed(ScratchReg);
980-
981-
BuildMI(MBB, II, DL, TII->get(X86::MOV64ri), ScratchReg).addImm(Offset);
982-
983-
MI.getOperand(FIOperandNum + 3).setImm(0);
984-
MI.getOperand(FIOperandNum + 2).setReg(ScratchReg);
985-
986-
return false;
987-
}
988-
assert((Is64Bit || FitsIn32Bits) &&
959+
// Offset is a 32-bit integer.
960+
int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm());
961+
int Offset = FIOffset + Imm;
962+
assert((!Is64Bit || isInt<32>((long long)FIOffset + Imm)) &&
989963
"Requesting 64-bit offset in 32-bit immediate!");
990964
if (Offset != 0 || !tryOptimizeLEAtoMOV(II))
991965
MI.getOperand(FIOperandNum + 3).ChangeToImmediate(Offset);

‎llvm/lib/Target/X86/X86RegisterInfo.h

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,6 @@
1313
#ifndef LLVM_LIB_TARGET_X86_X86REGISTERINFO_H
1414
#define LLVM_LIB_TARGET_X86_X86REGISTERINFO_H
1515

16-
#include "llvm/CodeGen/MachineFrameInfo.h"
17-
#include "llvm/CodeGen/MachineFunction.h"
1816
#include "llvm/CodeGen/TargetRegisterInfo.h"
1917

2018
#define GET_REGINFO_HEADER
@@ -178,13 +176,6 @@ class X86RegisterInfo final : public X86GenRegisterInfo {
178176
SmallVectorImpl<MCPhysReg> &Hints,
179177
const MachineFunction &MF, const VirtRegMap *VRM,
180178
const LiveRegMatrix *Matrix) const override;
181-
182-
bool requiresRegisterScavenging(const MachineFunction &MF) const override {
183-
const MachineFrameInfo &MFI = MF.getFrameInfo();
184-
185-
// We need to register scavenge if the frame is very large.
186-
return !isInt<32>(MFI.estimateStackSize(MF));
187-
}
188179
};
189180

190181
} // End llvm namespace

‎llvm/test/CodeGen/X86/avx512f-large-stack.ll

Lines changed: 0 additions & 23 deletions
This file was deleted.

‎llvm/test/CodeGen/X86/huge-stack.ll

Lines changed: 11 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -5,70 +5,20 @@
55
define void @foo() unnamed_addr #0 {
66
; CHECK-LABEL: foo:
77
; CHECK: # %bb.0:
8-
; CHECK-NEXT: movabsq $8589934472, %rax # imm = 0x1FFFFFF88
8+
; CHECK-NEXT: movabsq $8589934462, %rax # imm = 0x1FFFFFF7E
99
; CHECK-NEXT: subq %rax, %rsp
10-
; CHECK-NEXT: .cfi_def_cfa_offset 8589934480
11-
; CHECK-NEXT: movabsq $4294967177, %rax # imm = 0xFFFFFF89
12-
; CHECK-NEXT: movb $42, (%rsp,%rax)
13-
; CHECK-NEXT: movb $43, -118(%rsp)
14-
; CHECK-NEXT: movabsq $8589934472, %rax # imm = 0x1FFFFFF88
10+
; CHECK-NEXT: .cfi_def_cfa_offset 8589934470
11+
; CHECK-NEXT: movb $42, -129(%rsp)
12+
; CHECK-NEXT: movb $43, -128(%rsp)
13+
; CHECK-NEXT: movabsq $8589934462, %rax # imm = 0x1FFFFFF7E
1514
; CHECK-NEXT: addq %rax, %rsp
1615
; CHECK-NEXT: .cfi_def_cfa_offset 8
1716
; CHECK-NEXT: retq
18-
%large1 = alloca %large, align 1
19-
%large2 = alloca %large, align 1
20-
%ptrLarge1 = getelementptr inbounds %large, ptr %large1, i64 0, i64 0
21-
store i8 42, ptr %ptrLarge1, align 1
22-
%ptrLarge2 = getelementptr inbounds %large, ptr %large2, i64 0, i64 0
23-
store i8 43, ptr %ptrLarge2, align 1
17+
%1 = alloca %large, align 1
18+
%2 = alloca %large, align 1
19+
%3 = getelementptr inbounds %large, ptr %1, i64 0, i64 0
20+
store i8 42, ptr %3, align 1
21+
%4 = getelementptr inbounds %large, ptr %2, i64 0, i64 0
22+
store i8 43, ptr %4, align 1
2423
ret void
2524
}
26-
27-
declare ptr @baz(ptr, ptr, ptr, ptr)
28-
29-
define ptr @scavenge_spill() unnamed_addr #0 {
30-
; CHECK-LABEL: scavenge_spill:
31-
; CHECK: # %bb.0:
32-
; CHECK-NEXT: movabsq $25769803816, %rax # imm = 0x600000028
33-
; CHECK-NEXT: subq %rax, %rsp
34-
; CHECK-NEXT: .cfi_def_cfa_offset 25769803824
35-
; CHECK-NEXT: movabsq $21474836521, %rax # imm = 0x500000029
36-
; CHECK-NEXT: leaq (%rsp,%rax), %rdi
37-
; CHECK-NEXT: movabsq $17179869226, %rax # imm = 0x40000002A
38-
; CHECK-NEXT: leaq (%rsp,%rax), %rsi
39-
; CHECK-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
40-
; CHECK-NEXT: movabsq $12884901931, %rax # imm = 0x30000002B
41-
; CHECK-NEXT: leaq (%rsp,%rax), %rdx
42-
; CHECK-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
43-
; CHECK-NEXT: movabsq $8589934636, %rax # imm = 0x20000002C
44-
; CHECK-NEXT: leaq (%rsp,%rax), %rcx
45-
; CHECK-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
46-
; CHECK-NEXT: callq baz@PLT
47-
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
48-
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
49-
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
50-
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
51-
; CHECK-NEXT: leaq 46(%rsp), %rdi
52-
; CHECK-NEXT: callq baz@PLT
53-
; CHECK-NEXT: # kill: def $rcx killed $rax
54-
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
55-
; CHECK-NEXT: movabsq $25769803816, %rcx # imm = 0x600000028
56-
; CHECK-NEXT: addq %rcx, %rsp
57-
; CHECK-NEXT: .cfi_def_cfa_offset 8
58-
; CHECK-NEXT: retq
59-
%large1 = alloca %large, align 1
60-
%ptrLarge1 = getelementptr inbounds %large, ptr %large1, i64 0, i64 0
61-
%large2 = alloca %large, align 1
62-
%ptrLarge2 = getelementptr inbounds %large, ptr %large2, i64 0, i64 0
63-
%large3 = alloca %large, align 1
64-
%ptrLarge3 = getelementptr inbounds %large, ptr %large3, i64 0, i64 0
65-
%large4 = alloca %large, align 1
66-
%ptrLarge4 = getelementptr inbounds %large, ptr %large4, i64 0, i64 0
67-
%large5 = alloca %large, align 1
68-
%ptrLarge5 = getelementptr inbounds %large, ptr %large5, i64 0, i64 0
69-
%ret1 = call ptr @baz(ptr %ptrLarge1, ptr %ptrLarge2, ptr %ptrLarge3, ptr %ptrLarge4)
70-
%large6 = alloca %large, align 1
71-
%ptrLarge6 = getelementptr inbounds %large, ptr %large6, i64 0, i64 0
72-
%ret2 = call ptr @baz(ptr %ptrLarge6, ptr %ptrLarge2, ptr %ptrLarge3, ptr %ptrLarge4)
73-
ret ptr %ret1
74-
}

‎llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,5 +10,5 @@ start:
1010
attributes #0 = { nonlazybind uwtable "probe-stack"="probe_stack" "target-cpu"="x86-64" }
1111

1212
; CHECK-LABEL: foo:
13-
; CHECK: movabsq $4294967312, %rax
13+
; CHECK: movabsq $4294967304, %rax
1414
; CHECK-NEXT: callq probe_stack

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