@@ -1327,31 +1327,25 @@ class Assembler : public AssemblerBase {
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void tst (Register rn, Operand o) { ands (ZR, rn, o); }
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void tsti (Register rn, const Immediate& imm) { andis (ZR, rn, imm); }
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- // We use an alias of add, where ARM recommends an alias of ubfm.
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void LslImmediate (Register rd,
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Register rn,
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int shift,
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OperandSize sz = kDoubleWord ) {
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- if (sz == kDoubleWord ) {
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- add (rd, ZR, Operand (rn, LSL, shift));
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- } else {
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- addw (rd, ZR, Operand (rn, LSL, shift));
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- }
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+ const int reg_size =
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+ (sz == kDoubleWord ) ? kXRegSizeInBits : kWRegSizeInBits ;
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+ ubfm (rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1 , sz);
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}
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- // We use an alias of add, where ARM recommends an alias of ubfm.
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void LsrImmediate (Register rd,
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Register rn,
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int shift,
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OperandSize sz = kDoubleWord ) {
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- if (sz == kDoubleWord ) {
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- add (rd, ZR, Operand (rn, LSR, shift));
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- } else {
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- addw (rd, ZR, Operand (rn, LSR, shift));
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- }
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+ const int reg_size =
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+ (sz == kDoubleWord ) ? kXRegSizeInBits : kWRegSizeInBits ;
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+ ubfm (rd, rn, shift, reg_size - 1 , sz);
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}
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- // We use an alias of add, where ARM recommends an alias of sbfm.
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void AsrImmediate (Register rd, Register rn, int shift) {
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- add (rd, ZR, Operand (rn, ASR, shift));
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+ const int reg_size = kXRegSizeInBits ;
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+ sbfm (rd, rn, shift, reg_size - 1 );
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}
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void VRecps (VRegister vd, VRegister vn);
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