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adamgemmellAmanieu
adamgemmell
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Amanieu
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Remove ACLE submodule
This involves moving from the ACLE intrinsic definitions (which aren't available for SVE at this point) to a JSON file. This was derived from ARM's documentation[^1], and then relicensed under `MIT OR Apache-2.0` for use in this repository. [^1]: https://developer.arm.com/architectures/instruction-sets/intrinsics
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-579
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14 files changed

+87743
-579
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‎.gitmodules

-3
Original file line numberDiff line numberDiff line change
@@ -1,3 +0,0 @@
1-
[submodule "crates/intrinsic-test/acle"]
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path = crates/intrinsic-test/acle
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url = https://github.com/ARM-software/acle.git

‎ci/docker/aarch64-unknown-linux-gnu/Dockerfile

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@@ -10,7 +10,7 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
1010
qemu-user \
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make \
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file \
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clang-13 \
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clang-15 \
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lld
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ENV CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER=aarch64-linux-gnu-gcc \

‎ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile

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@@ -10,7 +10,7 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
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qemu-user \
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make \
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file \
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clang-13 \
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clang-15 \
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lld
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ENV CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_LINKER=arm-linux-gnueabihf-gcc \
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CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -L /usr/arm-linux-gnueabihf" \

‎ci/run.sh

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@@ -137,10 +137,10 @@ esac
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if [ "${TARGET}" = "aarch64-unknown-linux-gnu" ]; then
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export CPPFLAGS="-fuse-ld=lld -I/usr/aarch64-linux-gnu/include/ -I/usr/aarch64-linux-gnu/include/c++/9/aarch64-linux-gnu/"
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RUST_LOG=warn cargo run ${INTRINSIC_TEST} --release --bin intrinsic-test -- crates/intrinsic-test/acle/tools/intrinsic_db/advsimd.csv --runner "${CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER}" --cppcompiler "clang++-13" --skip crates/intrinsic-test/missing_aarch64.txt
140+
RUST_LOG=warn cargo run ${INTRINSIC_TEST} --release --bin intrinsic-test -- intrinsics_data/arm_intrinsics.json --runner "${CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER}" --cppcompiler "clang++-15" --skip crates/intrinsic-test/missing_aarch64.txt
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elif [ "${TARGET}" = "armv7-unknown-linux-gnueabihf" ]; then
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export CPPFLAGS="-fuse-ld=lld -I/usr/arm-linux-gnueabihf/include/ -I/usr/arm-linux-gnueabihf/include/c++/9/arm-linux-gnueabihf/"
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RUST_LOG=warn cargo run ${INTRINSIC_TEST} --release --bin intrinsic-test -- crates/intrinsic-test/acle/tools/intrinsic_db/advsimd.csv --runner "${CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_RUNNER}" --cppcompiler "clang++-13" --skip crates/intrinsic-test/missing_arm.txt --a32
143+
RUST_LOG=warn cargo run ${INTRINSIC_TEST} --release --bin intrinsic-test -- intrinsics_data/arm_intrinsics.json --runner "${CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_RUNNER}" --cppcompiler "clang++-15" --skip crates/intrinsic-test/missing_arm.txt --a32
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fi
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if [ "$NORUN" != "1" ] && [ "$NOSTD" != 1 ]; then

‎crates/intrinsic-test/Cargo.toml

+5-2
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@@ -1,13 +1,16 @@
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[package]
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name = "intrinsic-test"
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version = "0.1.0"
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authors = ["Jamie Cunliffe <[email protected]>"]
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edition = "2021"
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authors = ["Jamie Cunliffe <[email protected]>",
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"James McGregor <[email protected]",
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"Adam Gemmell <[email protected]"]
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license = "MIT OR Apache-2.0"
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edition = "2021"
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[dependencies]
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lazy_static = "1.4.0"
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serde = { version = "1", features = ["derive"] }
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serde_json = "1.0"
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csv = "1.1"
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clap = "2.33.3"
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regex = "1.4.2"

‎crates/intrinsic-test/acle

-1
This file was deleted.

‎crates/intrinsic-test/missing_aarch64.txt

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@@ -23,39 +23,6 @@ vusdotq_lane_s32
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vusdotq_s32
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vusdot_s32
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# Implemented in Clang but missing from CSV
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vcmla_f64
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vcmla_lane_f64
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vcmla_laneq_f64
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vcmlaq_lane_f64
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vcmlaq_laneq_f64
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vcmlaq_rot180_lane_f64
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vcmlaq_rot180_laneq_f64
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vcmlaq_rot270_lane_f64
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vcmlaq_rot270_laneq_f64
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vcmlaq_rot90_lane_f64
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vcmlaq_rot90_laneq_f64
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vcmla_rot180_f64
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vcmla_rot180_lane_f64
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vcmla_rot180_laneq_f64
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vcmla_rot270_f64
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vcmla_rot270_lane_f64
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vcmla_rot270_laneq_f64
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vcmla_rot90_f64
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vcmla_rot90_lane_f64
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vcmla_rot90_laneq_f64
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# Implemented in Clang and stdarch but missing from CSV
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vmov_n_p64
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vmovq_n_p64
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vreinterpret_f32_p64
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vreinterpret_p64_s64
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vreinterpretq_f32_p128
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vreinterpretq_f32_p64
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vreinterpretq_p128_p64
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vreinterpretq_p64_p128
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vtst_p16
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vtstq_p16
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# Missing from both Clang and stdarch
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vrnd32x_f64
@@ -67,30 +34,17 @@ vrnd64xq_f64
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vrnd64z_f64
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vrnd64zq_f64
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# QEMU 6.0 doesn't support these instructions
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vmmlaq_s32
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vmmlaq_u32
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vsm3partw1q_u32
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vsm3partw2q_u32
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vsm3ss1q_u32
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vsm3tt1aq_u32
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vsm3tt1bq_u32
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vsm3tt2aq_u32
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vsm3tt2bq_u32
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vsm4ekeyq_u32
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vsm4eq_u32
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vusmmlaq_s32
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# LLVM select error in debug builds
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vqshlu_n_s16
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vqshlu_n_s32
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vqshlu_n_s64
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vqshlu_n_s8
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vqshlub_n_s8
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vqshlud_n_s64
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vqshluh_n_s16
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vqshluq_n_s16
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vqshluq_n_s32
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vqshluq_n_s64
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vqshluq_n_s8
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vqshlus_n_s32
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#vqshlu_n_s16
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#vqshlu_n_s32
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#vqshlu_n_s64
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#vqshlu_n_s8
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#vqshlub_n_s8
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#vqshlud_n_s64
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#vqshluh_n_s16
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#vqshluq_n_s16
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#vqshluq_n_s32
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#vqshluq_n_s64
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#vqshluq_n_s8
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#vqshlus_n_s32
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‎crates/intrinsic-test/missing_arm.txt

+26-116
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@@ -23,15 +23,6 @@ vusdotq_lane_s32
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vusdotq_s32
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vusdot_s32
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# Implemented in Clang and stdarch but missing from CSV
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vtst_p16
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vtstq_p16
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# QEMU 6.0 doesn't support these instructions
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vmmlaq_s32
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vmmlaq_u32
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vusmmlaq_s32
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# Implemented in Clang and stdarch for A64 only even though CSV claims A32 support
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__crc32d
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__crc32cd
@@ -214,110 +205,29 @@ vrndx_f32
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vrndxq_f32
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# LLVM select error in debug builds
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vqrshrn_n_s16
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vqrshrn_n_s32
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vqrshrn_n_s64
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vqrshrn_n_u16
221-
vqrshrn_n_u32
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vqrshrn_n_u64
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vqrshrun_n_s16
224-
vqrshrun_n_s32
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vqrshrun_n_s64
226-
vqshrn_n_s16
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vqshrn_n_s32
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vqshrn_n_s64
229-
vqshrn_n_u16
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vqshrn_n_u32
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vqshrn_n_u64
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vqshrun_n_s16
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vqshrun_n_s32
234-
vqshrun_n_s64
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vrshrn_n_s16
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vrshrn_n_s32
237-
vrshrn_n_s64
238-
vrshrn_n_u16
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vrshrn_n_u32
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vrshrn_n_u64
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vshrq_n_u64
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vshr_n_u64
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244-
# Failing tests: stdarch has incorrect results compared to Clang
245-
vqshlu_n_s16
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vqshlu_n_s32
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vqshlu_n_s64
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vqshlu_n_s8
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vqshluq_n_s16
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vqshluq_n_s32
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vqshluq_n_s64
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vqshluq_n_s8
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vsli_n_p16
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vsli_n_p8
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vsli_n_s16
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vsli_n_s32
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vsli_n_s64
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vsli_n_s8
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vsli_n_u16
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vsli_n_u32
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vsli_n_u64
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vsli_n_u8
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vsliq_n_p16
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vsliq_n_p8
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vsliq_n_s16
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vsliq_n_s32
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vsliq_n_s64
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vsliq_n_s8
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vsliq_n_u16
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vsliq_n_u32
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vsliq_n_u64
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vsliq_n_u8
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vsri_n_p16
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vsri_n_p8
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vsri_n_s16
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vsri_n_s32
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vsri_n_s64
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vsri_n_s8
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vsri_n_u16
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vsri_n_u32
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vsri_n_u64
282-
vsri_n_u8
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vsriq_n_p16
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vsriq_n_p8
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vsriq_n_s16
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vsriq_n_s32
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vsriq_n_s64
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vsriq_n_s8
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vsriq_n_u16
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vsriq_n_u32
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vsriq_n_u64
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vsriq_n_u8
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294-
# These produce a different result on Clang depending on the optimization level.
295-
# This is definitely a bug in LLVM.
296-
vadd_f32
297-
vaddq_f32
298-
vcvt_s32_f32
299-
vcvt_u32_f32
300-
vcvtq_s32_f32
301-
vcvtq_u32_f32
302-
vfma_f32
303-
vfma_n_f32
304-
vfmaq_f32
305-
vfmaq_n_f32
306-
vfms_f32
307-
vfmsq_f32
308-
vmla_f32
309-
vmla_lane_f32
310-
vmla_n_f32
311-
vmlaq_f32
312-
vmlaq_lane_f32
313-
vmlaq_n_f32
314-
vmls_f32
315-
vmls_lane_f32
316-
vmls_n_f32
317-
vmlsq_f32
318-
vmlsq_lane_f32
319-
vmlsq_n_f32
320-
vmul_lane_f32
321-
vmul_n_f32
322-
vmulq_lane_f32
323-
vmulq_n_f32
208+
#vqrshrn_n_s16
209+
#vqrshrn_n_s32
210+
#vqrshrn_n_s64
211+
#vqrshrn_n_u16
212+
#vqrshrn_n_u32
213+
#vqrshrn_n_u64
214+
#vqrshrun_n_s16
215+
#vqrshrun_n_s32
216+
#vqrshrun_n_s64
217+
#vqshrn_n_s16
218+
#vqshrn_n_s32
219+
#vqshrn_n_s64
220+
#vqshrn_n_u16
221+
#vqshrn_n_u32
222+
#vqshrn_n_u64
223+
#vqshrun_n_s16
224+
#vqshrun_n_s32
225+
#vqshrun_n_s64
226+
#vrshrn_n_s16
227+
#vrshrn_n_s32
228+
#vrshrn_n_s64
229+
#vrshrn_n_u16
230+
#vrshrn_n_u32
231+
#vrshrn_n_u64
232+
#vshrq_n_u64
233+
#vshr_n_u64

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