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[Backport][LoongArch] Add the support for relax feature on LoongArch
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‎debian/changelog

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llvm-toolchain-17 (1:17.0.6-6) unstable; urgency=medium
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[ Jinyang He ]
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* Support the R_LARCH_{ADD,SUB}6 relocation type (#72190)
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* Add relax feature and keep relocations (#72191)
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* Allow delayed decision for ADD/SUB relocations (#72960)
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* Emit R_LARCH_RELAX when expanding some LoadAddress (#72961)
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* Add AlignFragment size if layout is available and not need
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insert nops (#76552)
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* Add relaxDwarfLineAddr and relaxDwarfCFA to handle the mutable
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label diff in dwarfinfo (#77728)
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* Insert nops and emit align reloc when handle alignment directive
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(#72962)
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* Support relax R_LARCH_ALIGN (#78692)
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* Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (#81133)
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[ Job Noorman ]
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* Implement --emit-relocs with relaxation
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[ Weining Lu ]
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* Update dwarf-loongarch-relocs.ll
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[ Fangrui Song ]
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* Change ELF/uleb-ehtable.s Mach-O to use private symbols in .uleb128
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for label differences
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* AttemptToFoldSymbolOffsetDifference: revert isMicroMips special case
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* Support R_LARCH_{ADD,SUB}_ULEB128/R_RISCV_{SET,SUB}_ULEB128 for
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.uleb128 directives
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-- Ami-zhang <[email protected]> Thu, 22 Aug 2024 14:32:09 +0800
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llvm-toolchain-17 (1:17.0.6-5deepin1) unstable; urgency=medium
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[ chenli ]

‎debian/patches/0001-lld-LoongArch-Support-the-R_LARCH_-ADD-SUB-6-relocat.patch

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From 7f14e7c1b116fc865ddebb78e67816bfc5216178 Mon Sep 17 00:00:00 2001
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From: Jinyang He <[email protected]>
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Date: Wed, 15 Nov 2023 09:57:45 +0800
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Subject: [PATCH 01/14] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}6
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relocation type (#72190)
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The R_LARCH_{ADD,SUB}6 relocation type are usually used by DwarfCFA to
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calculate a tiny offset. They appear after binutils 2.41, with GAS
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enabling relaxation by default.
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(cherry picked from commit 72accbfd0a1023b3182202276904120524ff9200)
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Change-Id: Iad676e522f11c52e5dc381243f1df60edcef58f5
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---
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lld/ELF/Arch/LoongArch.cpp | 8 ++++++++
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lld/test/ELF/loongarch-add-sub.s | 6 +++++-
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2 files changed, 13 insertions(+), 1 deletion(-)
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diff --git a/lld/ELF/Arch/LoongArch.cpp b/lld/ELF/Arch/LoongArch.cpp
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index 04ddb4682917..d3a538577a59 100644
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--- a/lld/ELF/Arch/LoongArch.cpp
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+++ b/lld/ELF/Arch/LoongArch.cpp
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@@ -444,10 +444,12 @@ RelExpr LoongArch::getRelExpr(const RelType type, const Symbol &s,
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case R_LARCH_TLS_LE64_LO20:
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case R_LARCH_TLS_LE64_HI12:
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return R_TPREL;
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+ case R_LARCH_ADD6:
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case R_LARCH_ADD8:
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case R_LARCH_ADD16:
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case R_LARCH_ADD32:
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case R_LARCH_ADD64:
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+ case R_LARCH_SUB6:
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case R_LARCH_SUB8:
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case R_LARCH_SUB16:
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case R_LARCH_SUB32:
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@@ -650,6 +652,9 @@ void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
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write32le(loc, setK12(read32le(loc), extractBits(val, 63, 52)));
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return;
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+ case R_LARCH_ADD6:
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+ *loc = (*loc & 0xc0) | ((*loc + val) & 0x3f);
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+ return;
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case R_LARCH_ADD8:
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*loc += val;
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return;
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@@ -662,6 +667,9 @@ void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
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case R_LARCH_ADD64:
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write64le(loc, read64le(loc) + val);
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return;
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+ case R_LARCH_SUB6:
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+ *loc = (*loc & 0xc0) | ((*loc - val) & 0x3f);
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+ return;
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case R_LARCH_SUB8:
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*loc -= val;
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return;
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diff --git a/lld/test/ELF/loongarch-add-sub.s b/lld/test/ELF/loongarch-add-sub.s
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index 63a3f7de179e..35f8a053d69c 100644
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--- a/lld/test/ELF/loongarch-add-sub.s
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+++ b/lld/test/ELF/loongarch-add-sub.s
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@@ -6,7 +6,7 @@
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# RUN: llvm-readelf -x .rodata %t.la64 | FileCheck --check-prefix=CHECK %s
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# CHECK: section '.rodata':
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# CHECK-NEXT: 0x9876543210 10325476 98badcfe 804602be 79ffffff
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-# CHECK-NEXT: 0x9876543220 804602be 804680
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+# CHECK-NEXT: 0x9876543220 804602be 80468097
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.text
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.global _start
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@@ -34,3 +34,7 @@ quux:
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.byte 0
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.reloc quux, R_LARCH_ADD8, 1b
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.reloc quux, R_LARCH_SUB8, 2b
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+qux:
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+ .byte 0b10000000
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+ .reloc qux, R_LARCH_ADD6, qux
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+ .reloc qux, R_LARCH_SUB6, 2b
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--
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2.20.1
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‎debian/patches/0002-LoongArch-Add-relax-feature-and-keep-relocations-721.patch

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From 6f135b13769c64a6942b4b232a350b6a6207f2b2 Mon Sep 17 00:00:00 2001
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From: Jinyang He <[email protected]>
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Date: Thu, 16 Nov 2023 11:01:26 +0800
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Subject: [PATCH 02/14] [LoongArch] Add relax feature and keep relocations
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(#72191)
6+
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Add relax feature. To support linker relocation, we should make
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relocation with a symbol rather than section plus offset, and keep all
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relocations with non-abs symbol.
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(cherry picked from commit f5bfc833fcbf17a5876911783d1adaca7028d20c)
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Change-Id: Ief38b480016175f2cc9939b74a84d9444559ffd6
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---
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llvm/lib/Target/LoongArch/LoongArch.td | 4 +++
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.../lib/Target/LoongArch/LoongArchSubtarget.h | 2 ++
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.../MCTargetDesc/LoongArchAsmBackend.cpp | 5 +--
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.../MCTargetDesc/LoongArchELFObjectWriter.cpp | 18 ++++++++---
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.../MCTargetDesc/LoongArchMCTargetDesc.h | 2 +-
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.../MC/LoongArch/Relocations/relax-attr.s | 32 +++++++++++++++++++
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6 files changed, 55 insertions(+), 8 deletions(-)
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create mode 100644 llvm/test/MC/LoongArch/Relocations/relax-attr.s
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diff --git a/llvm/lib/Target/LoongArch/LoongArch.td b/llvm/lib/Target/LoongArch/LoongArch.td
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index 0675caa3b601..75b65fe69f26 100644
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--- a/llvm/lib/Target/LoongArch/LoongArch.td
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+++ b/llvm/lib/Target/LoongArch/LoongArch.td
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@@ -102,6 +102,10 @@ def FeatureUAL
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: SubtargetFeature<"ual", "HasUAL", "true",
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"Allow memory accesses to be unaligned">;
30+
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+def FeatureRelax
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+ : SubtargetFeature<"relax", "HasLinkerRelax", "true",
33+
+ "Enable Linker relaxation">;
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+
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//===----------------------------------------------------------------------===//
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// Registers, instruction descriptions ...
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//===----------------------------------------------------------------------===//
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diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
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index 0fbe23f2f62d..5c173675cca4 100644
40+
--- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
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+++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
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@@ -43,6 +43,7 @@ class LoongArchSubtarget : public LoongArchGenSubtargetInfo {
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bool HasLaGlobalWithAbs = false;
44+
bool HasLaLocalWithAbs = false;
45+
bool HasUAL = false;
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+ bool HasLinkerRelax = false;
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unsigned GRLen = 32;
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MVT GRLenVT = MVT::i32;
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LoongArchABI::ABI TargetABI = LoongArchABI::ABI_Unknown;
50+
@@ -100,6 +101,7 @@ public:
51+
bool hasLaGlobalWithAbs() const { return HasLaGlobalWithAbs; }
52+
bool hasLaLocalWithAbs() const { return HasLaLocalWithAbs; }
53+
bool hasUAL() const { return HasUAL; }
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+ bool hasLinkerRelax() const { return HasLinkerRelax; }
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MVT getGRLenVT() const { return GRLenVT; }
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unsigned getGRLen() const { return GRLen; }
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LoongArchABI::ABI getTargetABI() const { return TargetABI; }
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diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
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index ecb68ff401e9..aae3e544d326 100644
60+
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
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+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
62+
@@ -168,7 +168,7 @@ bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
63+
return true;
64+
switch (Fixup.getTargetKind()) {
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default:
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- return false;
67+
+ return STI.hasFeature(LoongArch::FeatureRelax);
68+
case FK_Data_1:
69+
case FK_Data_2:
70+
case FK_Data_4:
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@@ -193,7 +193,8 @@ bool LoongArchAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
72+
73+
std::unique_ptr<MCObjectTargetWriter>
74+
LoongArchAsmBackend::createObjectTargetWriter() const {
75+
- return createLoongArchELFObjectWriter(OSABI, Is64Bit);
76+
+ return createLoongArchELFObjectWriter(
77+
+ OSABI, Is64Bit, STI.hasFeature(LoongArch::FeatureRelax));
78+
}
79+
80+
MCAsmBackend *llvm::createLoongArchAsmBackend(const Target &T,
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diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
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index a6b9c0652639..e60b9c2cfd97 100644
83+
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
84+
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
85+
@@ -20,19 +20,27 @@ using namespace llvm;
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namespace {
87+
class LoongArchELFObjectWriter : public MCELFObjectTargetWriter {
88+
public:
89+
- LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit);
90+
+ LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit, bool EnableRelax);
91+
92+
~LoongArchELFObjectWriter() override;
93+
94+
+ bool needsRelocateWithSymbol(const MCSymbol &Sym,
95+
+ unsigned Type) const override {
96+
+ return EnableRelax;
97+
+ }
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+
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protected:
100+
unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
101+
const MCFixup &Fixup, bool IsPCRel) const override;
102+
+ bool EnableRelax;
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};
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} // end namespace
105+
106+
-LoongArchELFObjectWriter::LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit)
107+
+LoongArchELFObjectWriter::LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit,
108+
+ bool EnableRelax)
109+
: MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_LOONGARCH,
110+
- /*HasRelocationAddend*/ true) {}
111+
+ /*HasRelocationAddend=*/true),
112+
+ EnableRelax(EnableRelax) {}
113+
114+
LoongArchELFObjectWriter::~LoongArchELFObjectWriter() {}
115+
116+
@@ -87,6 +95,6 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
117+
}
118+
119+
std::unique_ptr<MCObjectTargetWriter>
120+
-llvm::createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit) {
121+
- return std::make_unique<LoongArchELFObjectWriter>(OSABI, Is64Bit);
122+
+llvm::createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit, bool Relax) {
123+
+ return std::make_unique<LoongArchELFObjectWriter>(OSABI, Is64Bit, Relax);
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}
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diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
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index ab35a0096c8a..bb05baa9b717 100644
127+
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
128+
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
129+
@@ -36,7 +36,7 @@ MCAsmBackend *createLoongArchAsmBackend(const Target &T,
130+
const MCTargetOptions &Options);
131+
132+
std::unique_ptr<MCObjectTargetWriter>
133+
-createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit);
134+
+createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit, bool Relax);
135+
136+
} // end namespace llvm
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diff --git a/llvm/test/MC/LoongArch/Relocations/relax-attr.s b/llvm/test/MC/LoongArch/Relocations/relax-attr.s
139+
new file mode 100644
140+
index 000000000000..b1e648d850bb
141+
--- /dev/null
142+
+++ b/llvm/test/MC/LoongArch/Relocations/relax-attr.s
143+
@@ -0,0 +1,32 @@
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+# RUN: llvm-mc --filetype=obj --triple=loongarch64 %s -o %t
145+
+# RUN: llvm-readobj -r %t | FileCheck %s
146+
+# RUN: llvm-mc --filetype=obj --triple=loongarch64 -mattr=+relax %s -o %t
147+
+# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=CHECKR
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+
149+
+# CHECK: Relocations [
150+
+# CHECK-NEXT: Section ({{.*}}) .rela.data {
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+# CHECK-NEXT: 0x0 R_LARCH_64 .text 0x4
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+# CHECK-NEXT: }
153+
+# CHECK-NEXT: ]
154+
+
155+
+# CHECKR: Relocations [
156+
+# CHECKR-NEXT: Section ({{.*}}) .rela.text {
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+# CHECKR-NEXT: 0x8 R_LARCH_B21 .L1 0x0
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+# CHECKR-NEXT: 0xC R_LARCH_B16 .L1 0x0
159+
+# CHECKR-NEXT: 0x10 R_LARCH_B26 .L1 0x0
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+# CHECKR-NEXT: }
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+# CHECKR-NEXT: Section ({{.*}}) .rela.data {
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+# CHECKR-NEXT: 0x0 R_LARCH_64 .L1 0x0
163+
+# CHECKR-NEXT: }
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+# CHECKR-NEXT: ]
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+
166+
+.text
167+
+ nop
168+
+.L1:
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+ nop
170+
+ beqz $a0, .L1
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+ blt $a0, $a1, .L1
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+ b .L1
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+
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+.data
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+.dword .L1
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--
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2.20.1
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