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Enable ETW_EBP_FRAMED flag on System V systems.
Enable the ETW_EBP_FRAMED flag on System V systems to allow for using frame pointer (RBP) for mostly all functions. The change includes: 1. Removing RBP from all the lists of registers that the RA uses to assign to tmps/vars/etc. 2. Enable generation of unwind info for pushing of REG_FPBASE even if not included in callee-save list of registers. 3 Fixed a conservative assert - for System V systems stack offset for reg passed argument can be 0 or even positive.
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4 files changed

+99
-22
lines changed

4 files changed

+99
-22
lines changed

src/jit/codegencommon.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4835,11 +4835,12 @@ void CodeGen::genCheckUseBlockInit()
48354835
}
48364836

48374837
#ifdef _TARGET_XARCH_
4838-
// If we're going to use "REP STOS", remember that we will trash EDI
4839-
// For fastcall we will have to save ECX, EAX
4840-
// so reserve two extra callee saved
4841-
// This is better than pushing eax, ecx, because we in the later
4842-
// we will mess up already computed offsets on the stack (for ESP frames)
4838+
/* If we're going to use "REP STOS", remember that we will trash EDI */
4839+
/* For fastcall we will have to save ECX, EAX
4840+
* so reserve two extra callee saved
4841+
* This is better than pushing eax, ecx, because we in the later
4842+
* we will mess up already computed offsets on the stack (for ESP frames)
4843+
*/
48434844

48444845
regSet.rsSetRegsModified(RBM_EDI);
48454846

@@ -5168,7 +5169,6 @@ void CodeGen::genPushCalleeSavedRegisters()
51685169
offset += 2 * REGSIZE_BYTES;
51695170
}
51705171
}
5171-
51725172
if (frameType == 1)
51735173
{
51745174
getEmitter()->emitIns_R_R(INS_mov, EA_PTRSIZE, REG_FPBASE, REG_SPBASE);

src/jit/emitxarch.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1721,7 +1721,14 @@ UNATIVE_OFFSET emitter::emitInsSizeSV(size_t code, int var, int dsp)
17211721
#endif
17221722
{
17231723
// Dev10 804810 - failing this assert can lead to bad codegen and runtime crashes
1724+
#ifdef UNIX_AMD64_ABI
1725+
LclVarDsc* varDsc = emitComp->lvaTable + var;
1726+
bool isRegPassedArg = varDsc->lvIsParam && varDsc->lvIsRegArg;
1727+
// Register passed args could have a stack offset of 0.
1728+
noway_assert((int)offs < 0 || isRegPassedArg);
1729+
#else // !UNIX_AMD64_ABI
17241730
noway_assert((int)offs < 0);
1731+
#endif // !UNIX_AMD64_ABI
17251732
}
17261733

17271734

src/jit/target.h

Lines changed: 77 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -667,8 +667,7 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits
667667
#ifndef UNIX_AMD64_ABI
668668
#define ETW_EBP_FRAMED 0 // if 1 we cannot use EBP as a scratch register and must create EBP based frames for most methods
669669
#else // UNIX_AMD64_ABI
670-
// TODO-Amd64-Unis: Enable Frame Pointer chaining for most methods when uniwinding and the rest is implemented. Set the following to 1.
671-
#define ETW_EBP_FRAMED 0 // if 1 we cannot use EBP as a scratch register and must create EBP based frames for most methods
670+
#define ETW_EBP_FRAMED 1 // if 1 we cannot use EBP as a scratch register and must create EBP based frames for most methods
672671
#endif // UNIX_AMD64_ABI
673672
#define FEATURE_FP_REGALLOC 0 // Enabled if RegAlloc is used to enregister Floating Point LclVars
674673
#define CSE_CONSTS 1 // Enable if we want to CSE constants
@@ -723,71 +722,134 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits
723722

724723
#define RBM_ALLINT (RBM_INT_CALLEE_SAVED | RBM_INT_CALLEE_TRASH)
725724
#ifndef UNIX_AMD64_ABI
725+
#if !ETW_EBP_FRAMED
726726
#define RBM_LOWINT (RBM_EAX|RBM_ECX|RBM_EBX|RBM_EBP|RBM_ESI|RBM_EDI)
727+
#else // ETW_EBP_FRAMED
728+
#define RBM_LOWINT (RBM_EAX|RBM_ECX|RBM_EBX|RBM_ESI|RBM_EDI)
729+
#endif // ETW_EBP_FRAMED
727730
#else // UNIX_AMD64_ABI
731+
#if !ETW_EBP_FRAMED
728732
#define RBM_LOWINT (RBM_EAX|RBM_RDI|RBM_RSI|RBM_EDX|RBM_ECX|RBM_EBX|RBM_EBP)
733+
#else // ETW_EBP_FRAMED
734+
#define RBM_LOWINT (RBM_EAX|RBM_RDI|RBM_RSI|RBM_EDX|RBM_ECX|RBM_EBX)
735+
#endif // ETW_EBP_FRAMED
729736
#endif // UNIX_AMD64_ABI
730737

731738
#if 0
739+
#if !ETW_EBP_FRAMED
732740
#define REG_VAR_ORDER REG_EAX,REG_EDX,REG_ECX,REG_ESI,REG_EDI,REG_EBX,REG_EBP, \
733741
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
742+
#else // ETW_EBP_FRAMED
743+
#define REG_VAR_ORDER REG_EAX,REG_EDX,REG_ECX,REG_ESI,REG_EDI,REG_EBX, \
744+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
745+
#endif // ETW_EBP_FRAMED
746+
734747
#else
735748
// TEMPORARY ORDER TO AVOID CALLEE-SAVES
736749
// TODO-CQ: Review this and set appropriately
737750
#ifndef UNIX_AMD64_ABI
751+
#if !ETW_EBP_FRAMED
738752
#define REG_VAR_ORDER REG_EAX,REG_EDX,REG_ECX, \
739753
REG_R8,REG_R9,REG_R10,REG_R11, \
740754
REG_ESI,REG_EDI,REG_EBX,REG_EBP, \
741755
REG_R14,REG_R15,REG_R12,REG_R13
756+
#else // ETW_EBP_FRAMED
757+
#define REG_VAR_ORDER REG_EAX,REG_EDX,REG_ECX, \
758+
REG_R8,REG_R9,REG_R10,REG_R11, \
759+
REG_ESI,REG_EDI,REG_EBX, \
760+
REG_R14,REG_R15,REG_R12,REG_R13
761+
#endif // ETW_EBP_FRAMED
742762
#else // UNIX_AMD64_ABI
763+
#if !ETW_EBP_FRAMED
743764
#define REG_VAR_ORDER \
744-
REG_EAX, REG_EDI, REG_ESI, \
745-
REG_EDX, REG_ECX, REG_R8, REG_R9, \
746-
REG_R10, REG_R11, REG_EBX, REG_EBP, \
747-
REG_R14, REG_R15, REG_R12, REG_R13
765+
REG_EAX,REG_EDI,REG_ESI, \
766+
REG_EDX,REG_ECX,REG_R8,REG_R9, \
767+
REG_R10,REG_R11,REG_EBX,REG_EBP, \
768+
REG_R14,REG_R15,REG_R12,REG_R13
769+
#else // ETW_EBP_FRAMED
770+
#define REG_VAR_ORDER \
771+
REG_EAX,REG_EDI,REG_ESI, \
772+
REG_EDX,REG_ECX,REG_R8,REG_R9, \
773+
REG_R10,REG_R11,REG_EBX, \
774+
REG_R14,REG_R15,REG_R12,REG_R13
775+
#endif // ETW_EBP_FRAMED
748776
#endif // UNIX_AMD64_ABI
749777
#endif
750778

751-
#define REG_VAR_ORDER_FLT REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9, REG_XMM10, REG_XMM11, REG_XMM12, REG_XMM13, REG_XMM14, REG_XMM15
752-
753-
#define MAX_VAR_ORDER_SIZE 15
779+
#define REG_VAR_ORDER_FLT REG_XMM0,REG_XMM1,REG_XMM2,REG_XMM3,REG_XMM4,REG_XMM5,REG_XMM6,REG_XMM7,REG_XMM8,REG_XMM9,REG_XMM10,REG_XMM11,REG_XMM12,REG_XMM13,REG_XMM14,REG_XMM15
754780

755781
#ifndef UNIX_AMD64_ABI
782+
#if !ETW_EBP_FRAMED
783+
#define MAX_VAR_ORDER_SIZE 15
756784
#define REG_TMP_ORDER REG_EAX,REG_EDX,REG_ECX,REG_EBX,REG_ESI,REG_EDI,REG_EBP, \
757-
REG_R8, REG_R9, REG_R10, REG_R11, REG_R14, REG_R15, REG_R12, REG_R13
785+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
786+
#else // ETW_EBP_FRAMED
787+
#define MAX_VAR_ORDER_SIZE 14
788+
#define REG_TMP_ORDER REG_EAX,REG_EDX,REG_ECX,REG_EBX,REG_ESI,REG_EDI, \
789+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
790+
#endif // ETW_EBP_FRAMED
791+
758792
#else // UNIX_AMD64_ABI
793+
#if !ETW_EBP_FRAMED
759794
#define REG_TMP_ORDER REG_EAX,REG_EDI,REG_ESI,REG_EDX,REG_ECX,REG_EBX,REG_EBP, \
760-
REG_R8, REG_R9, REG_R10, REG_R11, REG_R14, REG_R15, REG_R12, REG_R13
795+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
796+
#else // ETW_EBP_FRAMED
797+
#define REG_TMP_ORDER REG_EAX,REG_EDI,REG_ESI,REG_EDX,REG_ECX,REG_EBX, \
798+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
799+
#endif // ETW_EBP_FRAMED
800+
761801
#endif // UNIX_AMD64_ABI
762802

763-
#define REG_TMP_ORDER_COUNT 15
764803
#ifndef UNIX_AMD64_ABI
804+
#if !ETW_EBP_FRAMED
805+
#define REG_TMP_ORDER_COUNT 15
765806
#define REG_PREDICT_ORDER REG_EAX,REG_EDX,REG_ECX,REG_EBX,REG_ESI,REG_EDI,REG_EBP, \
766807
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
767-
768808
#define CNT_CALLEE_SAVED (8)
809+
#else // ETW_EBP_FRAMED
810+
#define REG_TMP_ORDER_COUNT 14
811+
#define REG_PREDICT_ORDER REG_EAX,REG_EDX,REG_ECX,REG_EBX,REG_ESI,REG_EDI, \
812+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
813+
#define CNT_CALLEE_SAVED (7)
814+
#endif // ETW_EBP_FRAMED
815+
769816
#define CNT_CALLEE_TRASH (7)
770817
#define CNT_CALLEE_ENREG (CNT_CALLEE_SAVED)
771818

772819
#define CNT_CALLEE_SAVED_FLOAT (10)
773820
#define CNT_CALLEE_TRASH_FLOAT (6)
774821

822+
#if !ETW_EBP_FRAMED
775823
#define REG_CALLEE_SAVED_ORDER REG_EBX,REG_ESI,REG_EDI,REG_EBP,REG_R12,REG_R13,REG_R14,REG_R15
776824
#define RBM_CALLEE_SAVED_ORDER RBM_EBX,RBM_ESI,RBM_EDI,RBM_EBP,RBM_R12,RBM_R13,RBM_R14,RBM_R15
825+
#else // ETW_EBP_FRAMED
826+
#define REG_CALLEE_SAVED_ORDER REG_EBX,REG_ESI,REG_EDI,REG_R12,REG_R13,REG_R14,REG_R15
827+
#define RBM_CALLEE_SAVED_ORDER RBM_EBX,RBM_ESI,RBM_EDI,RBM_R12,RBM_R13,RBM_R14,RBM_R15
828+
#endif // ETW_EBP_FRAMED
777829
#define CALLEE_SAVED_REG_MAXSZ (CNT_CALLEE_SAVED*REGSIZE_BYTES) // RBX, RSI, RDI, RBP, R12, R13, R14, R15
778830
#else // UNIX_AMD64_ABI
831+
#if !ETW_EBP_FRAMED
779832
#define REG_PREDICT_ORDER REG_EAX, REG_EDI, REG_ESI, REG_EDX, REG_ECX, REG_EBX, REG_EBP, \
780-
REG_R8, REG_R9, REG_R10, REG_R11, REG_R14, REG_R15, REG_R12, REG_R13
781-
833+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
782834
#define CNT_CALLEE_SAVED (6)
835+
#else // ETW_EBP_FRAMED
836+
#define REG_PREDICT_ORDER REG_EAX, REG_EDI, REG_ESI, REG_EDX, REG_ECX, REG_EBX, \
837+
REG_R8,REG_R9,REG_R10,REG_R11,REG_R14,REG_R15,REG_R12,REG_R13
838+
#define CNT_CALLEE_SAVED (5)
839+
#endif // ETW_EBP_FRAMED
783840
#define CNT_CALLEE_TRASH (9)
784841
#define CNT_CALLEE_ENREG (CNT_CALLEE_SAVED)
785842

786843
#define CNT_CALLEE_SAVED_FLOAT (0)
787844
#define CNT_CALLEE_TRASH_FLOAT (16)
788845

846+
#if !ETW_EBP_FRAMED
789847
#define REG_CALLEE_SAVED_ORDER REG_EBX,REG_EBP,REG_R12,REG_R13,REG_R14,REG_R15
790848
#define RBM_CALLEE_SAVED_ORDER RBM_EBX,RBM_EBP,RBM_R12,RBM_R13,RBM_R14,RBM_R15
849+
#else // ETW_EBP_FRAMED
850+
#define REG_CALLEE_SAVED_ORDER REG_EBX,REG_R12,REG_R13,REG_R14,REG_R15
851+
#define RBM_CALLEE_SAVED_ORDER RBM_EBX,RBM_R12,RBM_R13,RBM_R14,RBM_R15
852+
#endif // ETW_EBP_FRAMED
791853
#define CALLEE_SAVED_REG_MAXSZ (CNT_CALLEE_SAVED*REGSIZE_BYTES) // RBX, RBP, R12, R13, R14, R15
792854
#endif // UNIX_AMD64_ABI
793855

src/jit/unwindamd64.cpp

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,15 @@ void Compiler::unwindPush(regNumber reg)
121121
unsigned int cbProlog = unwindGetCurrentOffset(func);
122122
noway_assert((BYTE)cbProlog == cbProlog);
123123
code->CodeOffset = (BYTE)cbProlog;
124-
if (RBM_CALLEE_SAVED & genRegMask(reg))
124+
if (RBM_CALLEE_SAVED & genRegMask(reg)
125+
#if ETW_EBP_FRAMED
126+
// In case of ETW_EBP_FRAMED defined the REG_FPBASE (RBP)
127+
// is excluded from the callee-save register list.
128+
// Make sure the register gets PUSH unwind info in this case,
129+
// since it is pushed as a frame register.
130+
|| (reg == REG_FPBASE)
131+
#endif // ETW_EBP_FRAMED
132+
)
125133
{
126134
code->UnwindOp = UWOP_PUSH_NONVOL;
127135
code->OpInfo = (BYTE)reg;

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