Merge pull request zephyrproject-rtos#16 from ec-platform-sw/hotfix_v1.1.6

Hotfix v1.1.6

Author: onkark911

arch/arm64/core/smp.c

@@ -141,7 +141,7 @@ void z_arm64_secondary_start(void)
 	arch_cpustart_t fn;
 	void *arg;
 
-	__ASSERT(arm64_cpu_boot_params.mpid == MPIDR_TO_CORE(GET_MPIDR()), "");
+	__ASSERT(arm64_cpu_boot_params.mpid == (GET_MPIDR() & MPIDR_AFFGRP_MASK) , "");
 
 	/* Initialize tpidrro_el0 with our struct _cpu instance address */
 	write_tpidrro_el0((uintptr_t)&_kernel.cpus[cpu_num]);

boards/arm64/raptor2/raptor2_a0_ppu.dts

@@ -135,7 +135,7 @@
 		      <0x00 0x6C110000 0x0 0x10000>,	/* OTRX QSU6 CMU */
 		      <0x00 0x6D110000 0x0 0x10000>,	/* OTRX QSU7 CMU */
 		      <0x00 0x60110000 0x0 0x10000>,	/* DSU SU0 CMU */
-		      <0x00 0x60400000 0x0 0x400000>,	/* DSU SU0 REG */
+		      <0x00 0x60400000 0x0 0x100000>,	/* DSU SU0 REG */
 		      <0x00 0x61110000 0x0 0x10000>,	/* DSU SU1 CMU */
 		      <0x00 0x62110000 0x0 0x10000>,	/* MXL0 CMU */
 		      <0x00 0x63110000 0x0 0x10000>,	/* MXL1 CMU */

include/arch/arm64/cpu.h

@@ -67,6 +67,7 @@
 
 /* MPIDR */
 #define MPIDR_AFFLVL_MASK	(0xff)
+#define MPIDR_AFFGRP_MASK	(0xffffff)
 
 #define MPIDR_AFF0_SHIFT	(0)
 #define MPIDR_AFF1_SHIFT	(8)