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Synopsys ARC Processors and GNU Toolchains for Them
Synopsys ARC processors are represented by three generations of Instruction Set Architectures (ISA). Each ISA consists of one or more processor families with different microarchitectures. All cores may be configured to support little or big endianness. All families except ARC EM family may be configured to support running complex operation systems like Linux. Some of them are listed here:
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ARCv1 ISA:
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ARCv2 ISA:
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ARCv3 ISA:
You can find programmer's reference manuals and datasheets for each core on corresponding web pages.
GNU toolchains for ARC processors consist of GCC, Binutils and GDB. Newlib standard library is used for building baremetal applications. This table depicts which GCC driver should be used depending on ISA:
| ISA | Driver/Triplet |
|---|---|
| ARCv1 | arc-elf32-gcc |
| ARCv2 | arc-elf32-gcc |
| ARCv3 | arc64-elf-gcc |
In addition to the common options, GCC also supports a set of -m<value> target specific options. Each of them
configures a particular feature or an extension. For example, -mno-code-density option disables generating code
density instructions.
-mcpu=<core> selects a particular ISA and CPU family and enables/disables a set of other -m options.
Each -mcpu value leads to linking with a prebuilt library which corresponds to this particular
-mcpu=<value> and is built using this -mcpu=<value>.
For example, option combination -mcpu=em4 -mno-code-density will generate code that doesn't
use code density instructions, however it will be linked with standard library that has been built
with just -mcpu=em4, which uses code density instructions - therefore a final application still may
use code density instructions.