Skip to content

Commit a40e352

Browse files
kolerovkolerov
committed
target/arc: Update code for v8.1.5
Signed-off-by: Yuriy Kolerov <[email protected]>
1 parent f73f3f3 commit a40e352

25 files changed

+8275
-8288
lines changed

‎hw/arc/arc_sim.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ static void arc_sim_init(MachineState *machine)
103103
1024);
104104
memory_region_add_subregion(get_system_memory(), 0xf0000000, system_io);
105105

106-
if (semihosting_enabled()) {
106+
if (semihosting_enabled(false)) {
107107
if (serial_hd(0)) {
108108
arc_sim_open_console(serial_hd(0));
109109
}

‎hw/arc/virt.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
*/
1515

1616
#include "qemu/osdep.h"
17+
#include "qemu/error-report.h"
1718
#include "qemu/units.h"
1819
#include "qapi/error.h"
1920
#include "boot.h"

‎target/arc/arc-semi.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -852,9 +852,9 @@ void do_arc_semihosting(CPUARCState *env)
852852

853853
case TARGET_SYS_gettimeofday:
854854
{
855-
qemu_timeval tv;
855+
struct timeval tv;
856856
struct timeval p;
857-
uint32_t result = qemu_gettimeofday(&tv);
857+
uint32_t result = gettimeofday(&tv, NULL);
858858
arc_semihosting_errno = errno;
859859
target_ulong base = regs[0];
860860
uint32_t sz = sizeof (struct timeval);

‎target/arc/cpu.c

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -99,6 +99,16 @@ static void arc_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb
9999
env->pc = tb->pc;
100100
}
101101

102+
static void arc_restore_state_to_opc(CPUState *cs,
103+
const TranslationBlock *tb,
104+
const uint64_t *data)
105+
{
106+
ARCCPU *cpu = ARC_CPU(cs);
107+
CPUARCState *env = &cpu->env;
108+
109+
env->pc = data[0];
110+
}
111+
102112
static void arc_cpu_reset(DeviceState *dev)
103113
{
104114
CPUState *s = CPU(dev);
@@ -397,6 +407,7 @@ static const struct SysemuCPUOps arc_sysemu_ops = {
397407
static struct TCGCPUOps arc_tcg_ops = {
398408
.initialize = arc_translate_init,
399409
.synchronize_from_tb = arc_cpu_synchronize_from_tb,
410+
.restore_state_to_opc = arc_restore_state_to_opc,
400411

401412
#ifdef CONFIG_USER_ONLY
402413
.record_sigsegv = arc_cpu_record_sigsegv,

‎target/arc/cpu.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -184,7 +184,7 @@ FIELD(STATUS32, Zf, 11, 1)
184184
tcg_temp_free(temp); \
185185
}
186186
#define TCG_SET_STATUS_FIELD_IVALUE(STAT_REG, FIELD, IVALUE) { \
187-
TCGv temp = tcg_const_tl((IVALUE << R_STATUS32_ ## FIELD ## _SHIFT) \
187+
TCGv temp = tcg_constant_tl((IVALUE << R_STATUS32_ ## FIELD ## _SHIFT) \
188188
& R_STATUS32_ ## FIELD ## _MASK); \
189189
tcg_gen_andi_tl(STAT_REG, STAT_REG, ~R_STATUS32_ ## FIELD ## _MASK); \
190190
tcg_gen_or_tl(STAT_REG, STAT_REG, temp); \
@@ -408,8 +408,8 @@ static inline int cpu_mmu_index(const CPUARCState *env, bool ifetch)
408408
return GET_STATUS_BIT(env->stat, Uf) != 0 ? 1 : 0;
409409
}
410410

411-
static inline void cpu_get_tb_cpu_state(CPUARCState *env, target_ulong *pc,
412-
target_ulong *cs_base,
411+
static inline void cpu_get_tb_cpu_state(CPUARCState *env, vaddr *pc,
412+
uint64_t *cs_base,
413413
uint32_t *pflags)
414414
{
415415
*pc = env->pc;

‎target/arc/decoder-v2.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -447,7 +447,7 @@ static const char *get_auxreg_v2(const struct arc_opcode *opcode,
447447
continue;
448448
}
449449

450-
if (auxr->subclass != NONE) {
450+
if (auxr->subclass != ARC_INSN_SUBCLASS_NONE) {
451451
return NULL;
452452
}
453453

‎target/arc/decoder-v3.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -473,7 +473,7 @@ static const char *get_auxreg_v3(const struct arc_opcode *opcode,
473473
continue;
474474
}
475475

476-
if (auxr->subclass != NONE) {
476+
if (auxr->subclass != ARC_INSN_SUBCLASS_NONE) {
477477
return NULL;
478478
}
479479

‎target/arc/decoder.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,7 @@ typedef enum {
156156

157157
/* Instruction Subclass. */
158158
typedef enum {
159-
NONE = 0,
159+
ARC_INSN_SUBCLASS_NONE = 0,
160160
CVT = (1U << 1),
161161
BTSCN = (1U << 2),
162162
CD = (1U << 3),

‎target/arc/decoder_fragments/arc-tbl.h

Lines changed: 2153 additions & 2153 deletions
Large diffs are not rendered by default.

‎target/arc/decoder_fragments/arc64-tbl.h

Lines changed: 3229 additions & 3229 deletions
Large diffs are not rendered by default.

‎target/arc/fpu-helper-v2.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
*/
2020

2121
#include "qemu/osdep.h"
22+
#include "qemu/error-report.h"
2223
#include "cpu.h"
2324
#include "exec/exec-all.h"
2425
#include "exec/helper-proto.h"

‎target/arc/fpu.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
*/
2020

2121
#include "qemu/osdep.h"
22+
#include "qemu/error-report.h"
2223
#include "cpu.h"
2324
#include "exec/exec-all.h"
2425
#include "exec/helper-proto.h"

‎target/arc/gdbstub.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
#include "irq.h"
2626
#include "gdbstub.h"
2727
#include "mpu.h"
28+
#include "gdbstub/helpers.h"
2829
#include "exec/helper-proto.h"
2930
#include "fpu.h"
3031

‎target/arc/helper.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ void arc_cpu_do_interrupt(CPUState *cs)
6666
* semihosting enabled.
6767
*/
6868
if (cs->exception_index == EXCP_SWI
69-
&& semihosting_enabled()) {
69+
&& semihosting_enabled(false)) {
7070
qemu_log_mask(CPU_LOG_INT, "Entering semihosting\n");
7171
do_arc_semihosting(env);
7272
/* Return to the next instruction. */
@@ -333,7 +333,7 @@ void helper_debug(CPUARCState *env)
333333
G_NORETURN void arc_raise_exception(CPUARCState *env, uintptr_t host_pc, int32_t excp_idx)
334334
{
335335
CPUState *cs = env_cpu(env);
336-
cpu_restore_state(cs, host_pc, true);
336+
cpu_restore_state(cs, host_pc);
337337
cs->exception_index = excp_idx;
338338
env->causecode = env->param = 0x0;
339339
env->eret = env->pc;

‎target/arc/mmu-v6.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -761,7 +761,7 @@ static G_NORETURN void raise_mem_exception(
761761
{
762762
CPUARCState *env = &(ARC_CPU(cs)->env);
763763
if (excp->number != EXCP_IMMU_FAULT) {
764-
cpu_restore_state(cs, host_pc, true);
764+
cpu_restore_state(cs, host_pc);
765765
}
766766

767767
env->efa = addr;

‎target/arc/mmu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -603,7 +603,7 @@ static G_NORETURN void raise_mem_exception(
603603
{
604604
CPUARCState *env = &(ARC_CPU(cs)->env);
605605
if (excp->number != EXCP_TLB_MISS_I) {
606-
cpu_restore_state(cs, host_pc, true);
606+
cpu_restore_state(cs, host_pc);
607607
}
608608

609609
env->efa = addr;

‎target/arc/op_helper.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
#include "exec/helper-proto.h"
2626
#include "exec/cpu_ldst.h"
2727
#include "exec/ioport.h"
28+
#include "exec/tb-flush.h"
2829
#include "target/arc/regs.h"
2930
#include "mmu.h"
3031
#include "hw/arc/cpudevs.h"

0 commit comments

Comments
 (0)