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[variant] Add Generic F7xx
Signed-off-by: Alexandre Bourdiol <[email protected]>
1 parent 8d6e014 commit 6a756e0

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Diff for: README.md

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@@ -56,6 +56,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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- [Generic STM32F2 boards](#generic-stm32f2-boards)
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- [Generic STM32F3 boards](#generic-stm32f3-boards)
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- [Generic STM32F4 boards](#generic-stm32f4-boards)
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- [Generic STM32F7 boards](#generic-stm32f7-boards)
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- [Generic STM32G0 boards](#generic-stm32g0-boards)
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- [Generic STM32G4 boards](#generic-stm32g4-boards)
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- [Generic STM32H7 boards](#generic-stm32h7-boards)
@@ -232,6 +233,24 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32F446RC<br>STM32F446RE | Generic Board | *1.9.0* | |
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| :green_heart: | STM32F411CE | [ThunderPack v1.1+](https://github.com/jgillick/ThunderPack) | *1.9.0* | |
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### Generic STM32F7 boards
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| Status | Device(s) | Name | Release | Notes |
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| :----: | :-------: | ---- | :-----: | :---- |
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| :yellow_heart: | STM32F745ZE<br>STM32F745ZG | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F746BE<br>STM32F746BG<br>STM32F746NE<br>STM32F746NG | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F746ZE<br>STM32F746ZG | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F750N8 | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F750Z8 | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F756BG<br>STM32F756NG | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F756ZG | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F765VG<br>STM32F765VI | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F765ZG<br>STM32F765ZI | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F767VG<br>STM32F767VI | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F767ZG<br>STM32F767ZI | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F777VI | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F777ZI | Generic Board | **2.0.0** | |
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### Generic STM32G0 boards
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| Status | Device(s) | Name | Release | Notes |

Diff for: boards.txt

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Diff for: variants/STM32F7xx/DISCO_F746NG/PeripheralPins.c

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Diff for: variants/STM32F7xx/DISCO_F746NG/PinNamesVar.h

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Diff for: variants/STM32F7xx/DISCO_F746NG/ldscript.ld

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Diff for: variants/STM32F7xx/F745Z(E-G)Tx_F746Z(E-G)Yx_F746ZETx_F746ZGTx_F750Z8Tx_F756ZG/generic_clock.c

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*/
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WEAK void SystemClock_Config(void)
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{
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/* SystemClock_Config can be generated by STM32CubeMX */
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#warning "SystemClock_Config() is empty. Default clock at reset is used."
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLM = 8;
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RCC_OscInitStruct.PLL.PLLN = 216;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 9;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Activate the Over-Drive mode
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*/
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if (HAL_PWREx_EnableOverDrive() != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) {
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Error_Handler();
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}
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_CLK48;
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PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
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PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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Error_Handler();
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}
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}
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#endif /* ARDUINO_GENERIC_* */

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