Skip to content
This repository was archived by the owner on Mar 28, 2023. It is now read-only.

Commit b4690da

Browse files
vladimirlazvladimirlaz
authored
[SYCL] Align test with the latest product status (#858)
1 parent c34750f commit b4690da

19 files changed

+18
-58
lines changed

‎SYCL/SubGroup/attributes.cpp

+4-3
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
1-
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
1+
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-device-code-split=per_kernel %s -o %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
4-
// RUNx: %GPU_RUN_PLACEHOLDER %t.out
3+
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out
65
//==------- attributes.cpp - SYCL sub_group attributes test ----*- C++ -*---==//
76
//
@@ -74,6 +73,8 @@ int main() {
7473
// Get the previous power of 2
7574
auto ReqdSize = flp2(SGSize);
7675

76+
std::cout << "Run for " << ReqdSize << " required workgroup size.\n";
77+
7778
// Store the `cl::sycl::kernel` into a vector because `cl::sycl::kernel`
7879
// doesn't have default constructor
7980
std::vector<cl::sycl::kernel> TheKernel;

‎SYCL/SubGroup/barrier.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/broadcast.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/broadcast_fp64.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/common.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/generic-shuffle.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/generic_reduce.cpp

+1-3
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,6 @@
11
// RUN: %clangxx -fsycl -fsycl-unnamed-lambda %s -o %t.out
2-
// RUN: %clangxx -fsycl -fsycl-unnamed-lambda -fsycl-targets=%sycl_triple -D SG_GPU %s -o %t_gpu.out
3-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
42
// RUN: %CPU_RUN_PLACEHOLDER %t.out
5-
// RUN: %GPU_RUN_PLACEHOLDER %t_gpu.out
3+
// RUN: %GPU_RUN_PLACEHOLDER %t.out
64
// RUN: %ACC_RUN_PLACEHOLDER %t.out
75

86
#include "helper.hpp"

‎SYCL/SubGroup/load_store.cpp

+4-4
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
3-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
4-
// runtime for every supported ISA
5-
// RUNx %CPU_RUN_PLACEHOLDER %t.out
2+
// RUN: %CPU_RUN_PLACEHOLDER %t.out
63
// RUN: %GPU_RUN_PLACEHOLDER %t.out
74
// RUN: %ACC_RUN_PLACEHOLDER %t.out
85
//
96
// Missing __spirv_SubgroupBlockReadINTEL, __spirv_SubgroupBlockWriteINTEL on
107
// AMD
118
// XFAIL: hip_amd
129
//
10+
// Missing GroupNonUniformArithmetic capability on CPU RT
11+
// XFAIL: cpu
12+
//
1313
//==----------- load_store.cpp - SYCL sub_group load/store test ------------==//
1414
//
1515
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

‎SYCL/SubGroup/reduce.cpp

-5
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,4 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
//
51
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
6-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
72
// RUN: %CPU_RUN_PLACEHOLDER %t.out
83
// RUN: %GPU_RUN_PLACEHOLDER %t.out
94
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/reduce_fp64.cpp

-5
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,4 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
//
51
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
6-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
72
// RUN: %CPU_RUN_PLACEHOLDER %t.out
83
// RUN: %GPU_RUN_PLACEHOLDER %t.out
94
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/reduce_spirv13.cpp

+3-5
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,13 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
51
// UNSUPPORTED: cuda || hip
62

73
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
8-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
94
// RUN: %CPU_RUN_PLACEHOLDER %t.out
105
// RUN: %GPU_RUN_PLACEHOLDER %t.out
116
// RUN: %ACC_RUN_PLACEHOLDER %t.out
127

8+
// Missing GroupNonUniformArithmetic capability on CPU RT
9+
// XFAIL: cpu
10+
1311
// This test verifies the correct work of SPIR-V 1.3 reduce algorithm
1412
// used with the operation MUL, bitwise OR, XOR, AND.
1513

‎SYCL/SubGroup/reduce_spirv13_fp64.cpp

+3-5
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,13 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
51
// UNSUPPORTED: cuda || hip
62

73
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
8-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
94
// RUN: %CPU_RUN_PLACEHOLDER %t.out
105
// RUN: %GPU_RUN_PLACEHOLDER %t.out
116
// RUN: %ACC_RUN_PLACEHOLDER %t.out
127

8+
// Missing GroupNonUniformArithmetic capability on CPU RT
9+
// XFAIL: cpu
10+
1311
// This test verifies the correct work of SPIR-V 1.3 reduce algorithm
1412
// used with MUL operation.
1513

‎SYCL/SubGroup/scan.cpp

-5
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,4 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
//
51
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
6-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
72
// RUN: %CPU_RUN_PLACEHOLDER %t.out
83
// RUN: %GPU_RUN_PLACEHOLDER %t.out
94
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/scan_fp64.cpp

-5
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,4 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
//
51
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
6-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
72
// RUN: %CPU_RUN_PLACEHOLDER %t.out
83
// RUN: %GPU_RUN_PLACEHOLDER %t.out
94
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/scan_spirv13.cpp

+3-5
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,13 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
51
// UNSUPPORTED: cuda || hip
62

73
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
8-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
94
// RUN: %CPU_RUN_PLACEHOLDER %t.out
105
// RUN: %GPU_RUN_PLACEHOLDER %t.out
116
// RUN: %ACC_RUN_PLACEHOLDER %t.out
127

8+
// Missing GroupNonUniformArithmetic capability on CPU RT
9+
// XFAIL: cpu
10+
1311
// This test verifies the correct work of SPIR-V 1.3 exclusive_scan() and
1412
// inclusive_scan() algoriths used with the operation MUL, bitwise OR, XOR, AND.
1513

‎SYCL/SubGroup/scan_spirv13_fp64.cpp

-5
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,6 @@
1-
// UNSUPPORTED: cpu
2-
// #2252 Disable until all variants of built-ins are available in OpenCL CPU
3-
// runtime for every supported ISA
4-
51
// UNSUPPORTED: cuda || hip
62

73
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
8-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
94
// RUN: %CPU_RUN_PLACEHOLDER %t.out
105
// RUN: %GPU_RUN_PLACEHOLDER %t.out
116
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/shuffle.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
// UNSUPPORTED: hip_amd
22
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
3-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
43
// RUN: %CPU_RUN_PLACEHOLDER %t.out
54
// RUN: %GPU_RUN_PLACEHOLDER %t.out
65
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/shuffle_fp64.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

‎SYCL/SubGroup/vote.cpp

-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
2-
// RUN: %HOST_RUN_PLACEHOLDER %t.out
32
// RUN: %CPU_RUN_PLACEHOLDER %t.out
43
// RUN: %GPU_RUN_PLACEHOLDER %t.out
54
// RUN: %ACC_RUN_PLACEHOLDER %t.out

0 commit comments

Comments
 (0)