@@ -231,6 +231,8 @@ typedef enum ur_function_t {
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UR_FUNCTION_COMMAND_BUFFER_UPDATE_WAIT_EVENTS_EXP = 244, ///< Enumerator for ::urCommandBufferUpdateWaitEventsExp
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UR_FUNCTION_BINDLESS_IMAGES_MAP_EXTERNAL_LINEAR_MEMORY_EXP = 245, ///< Enumerator for ::urBindlessImagesMapExternalLinearMemoryExp
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UR_FUNCTION_ENQUEUE_EVENTS_WAIT_WITH_BARRIER_EXT = 246, ///< Enumerator for ::urEnqueueEventsWaitWithBarrierExt
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+ UR_FUNCTION_TENSOR_MAP_ENCODE_IM_2_COL_EXP = 247, ///< Enumerator for ::urTensorMapEncodeIm2ColExp
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+ UR_FUNCTION_TENSOR_MAP_ENCODE_TILED_EXP = 248, ///< Enumerator for ::urTensorMapEncodeTiledExp
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/// @cond
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UR_FUNCTION_FORCE_UINT32 = 0x7fffffff
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/// @endcond
@@ -10170,6 +10172,207 @@ urEnqueueNativeCommandExp(
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///< not NULL, phEvent must not refer to an element of the phEventWaitList array.
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);
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+ #if !defined(__GNUC__)
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+ #pragma endregion
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+ #endif
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+ // Intel 'oneAPI' Unified Runtime Experimental API for mapping tensor objects
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+ #if !defined(__GNUC__)
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+ #pragma region tensor_map_(experimental)
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+ #endif
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Handle of tensor map object
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+ typedef struct ur_exp_tensor_map_handle_t_ *ur_exp_tensor_map_handle_t;
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Tensor map data type
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+ typedef uint32_t ur_exp_tensor_map_data_type_flags_t;
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+ typedef enum ur_exp_tensor_map_data_type_flag_t {
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT8 = UR_BIT(0), ///< 1 byte
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT16 = UR_BIT(1), ///< 2 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT32 = UR_BIT(2), ///< 4 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_INT32 = UR_BIT(3), ///< 4 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_UINT64 = UR_BIT(4), ///< 8 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_INT64 = UR_BIT(5), ///< 8 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT16 = UR_BIT(6), ///< 2 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT32 = UR_BIT(7), ///< 4 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT64 = UR_BIT(8), ///< 8 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_BFLOAT16 = UR_BIT(9), ///< 2 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FLOAT32_FTZ = UR_BIT(10), ///< 4 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_TFLOAT32 = UR_BIT(11), ///< 4 bytes
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_TFLOAT32_FTZ = UR_BIT(12), ///< 4 bytes
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+ /// @cond
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+ UR_EXP_TENSOR_MAP_DATA_TYPE_FLAG_FORCE_UINT32 = 0x7fffffff
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+ /// @endcond
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+
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+ } ur_exp_tensor_map_data_type_flag_t;
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+ /// @brief Bit Mask for validating ur_exp_tensor_map_data_type_flags_t
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+ #define UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK 0xffffe000
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Tensor map interleave
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+ typedef uint32_t ur_exp_tensor_map_interleave_flags_t;
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+ typedef enum ur_exp_tensor_map_interleave_flag_t {
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+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_NONE = UR_BIT(0), ///< No interleave
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+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_16B = UR_BIT(1), ///< 16B interleave
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+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_32B = UR_BIT(2), ///< 32B interleave
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+ /// @cond
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+ UR_EXP_TENSOR_MAP_INTERLEAVE_FLAG_FORCE_UINT32 = 0x7fffffff
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+ /// @endcond
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+
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+ } ur_exp_tensor_map_interleave_flag_t;
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+ /// @brief Bit Mask for validating ur_exp_tensor_map_interleave_flags_t
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+ #define UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK 0xfffffff8
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Tensor map l2 promotion
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+ typedef uint32_t ur_exp_tensor_map_l2_promotion_flags_t;
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+ typedef enum ur_exp_tensor_map_l2_promotion_flag_t {
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+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_NONE = UR_BIT(0), ///< No promotion type
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+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_64B = UR_BIT(1), ///< 64B promotion type
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+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_128B = UR_BIT(2), ///< 128B promotion type
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+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_256B = UR_BIT(3), ///< 256B promotion type
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+ /// @cond
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+ UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAG_FORCE_UINT32 = 0x7fffffff
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+ /// @endcond
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+
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+ } ur_exp_tensor_map_l2_promotion_flag_t;
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+ /// @brief Bit Mask for validating ur_exp_tensor_map_l2_promotion_flags_t
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+ #define UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK 0xfffffff0
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Tensor map swizzle
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+ typedef uint32_t ur_exp_tensor_map_swizzle_flags_t;
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+ typedef enum ur_exp_tensor_map_swizzle_flag_t {
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+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_NONE = UR_BIT(0), ///< No swizzle
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+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_32B = UR_BIT(1), ///< 32B swizzle
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+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_64B = UR_BIT(2), ///< 64B swizzle
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+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_128B = UR_BIT(3), ///< 128B swizzle
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+ /// @cond
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+ UR_EXP_TENSOR_MAP_SWIZZLE_FLAG_FORCE_UINT32 = 0x7fffffff
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+ /// @endcond
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+
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+ } ur_exp_tensor_map_swizzle_flag_t;
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+ /// @brief Bit Mask for validating ur_exp_tensor_map_swizzle_flags_t
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+ #define UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK 0xfffffff0
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Tensor map OOB fill
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+ typedef uint32_t ur_exp_tensor_map_oob_fill_flags_t;
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+ typedef enum ur_exp_tensor_map_oob_fill_flag_t {
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+ UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_NONE = UR_BIT(0), ///< No OOB fill
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+ UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_REQUEST_ZERO_FMA = UR_BIT(1), ///< Refer to NVIDIA docs
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+ /// @cond
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+ UR_EXP_TENSOR_MAP_OOB_FILL_FLAG_FORCE_UINT32 = 0x7fffffff
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+ /// @endcond
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+
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+ } ur_exp_tensor_map_oob_fill_flag_t;
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+ /// @brief Bit Mask for validating ur_exp_tensor_map_oob_fill_flags_t
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+ #define UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK 0xfffffffc
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Encode tensor map with image data
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+ ///
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+ /// @details
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+ /// - Map encode using im2col.
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+ ///
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+ /// @returns
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+ /// - ::UR_RESULT_SUCCESS
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+ /// - ::UR_RESULT_ERROR_UNINITIALIZED
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+ /// - ::UR_RESULT_ERROR_DEVICE_LOST
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+ /// - ::UR_RESULT_ERROR_ADAPTER_SPECIFIC
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+ /// - ::UR_RESULT_ERROR_INVALID_NULL_HANDLE
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+ /// + `NULL == hDevice`
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+ /// - ::UR_RESULT_ERROR_INVALID_ENUMERATION
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+ /// + `::UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK & TensorMapType`
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+ /// + `::UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK & Interleave`
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+ /// + `::UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK & Swizzle`
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+ /// + `::UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK & L2Promotion`
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+ /// + `::UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK & OobFill`
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+ /// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
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+ /// + `NULL == GlobalAddress`
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+ /// + `NULL == GlobalDim`
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+ /// + `NULL == GlobalStrides`
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+ /// + `NULL == PixelBoxLowerCorner`
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+ /// + `NULL == PixelBoxUpperCorner`
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+ /// + `NULL == ElementStrides`
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+ /// + `NULL == hTensorMap`
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+ /// - ::UR_RESULT_ERROR_INVALID_ARGUMENT
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+ /// + `TensorRank < 3`
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+ UR_APIEXPORT ur_result_t UR_APICALL
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+ urTensorMapEncodeIm2ColExp(
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+ ur_device_handle_t hDevice, ///< [in] Handle of the device object.
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+ ur_exp_tensor_map_data_type_flags_t TensorMapType, ///< [in] Data type of the tensor object.
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+ uint32_t TensorRank, ///< [in] Dimensionality of tensor; must be at least 3.
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+ void *GlobalAddress, ///< [in] Starting address of memory region described by tensor.
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+ const uint64_t *GlobalDim, ///< [in] Array containing tensor size (number of elements) along each of
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+ ///< the TensorRank dimensions.
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+ const uint64_t *GlobalStrides, ///< [in] Array containing stride size (in bytes) along each of the
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+ ///< TensorRank - 1 dimensions.
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+ const int *PixelBoxLowerCorner, ///< [in] Array containing DHW dimensions of lower box corner.
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+ const int *PixelBoxUpperCorner, ///< [in] Array containing DHW dimensions of upper box corner.
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+ uint32_t ChannelsPerPixel, ///< [in] Number of channels per pixel.
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+ uint32_t PixelsPerColumn, ///< [in] Number of pixels per column.
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+ const uint32_t *ElementStrides, ///< [in] Array containing traversal stride in each of the TensorRank
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+ ///< dimensions.
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+ ur_exp_tensor_map_interleave_flags_t Interleave, ///< [in] Type of interleaved layout the tensor addresses
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+ ur_exp_tensor_map_swizzle_flags_t Swizzle, ///< [in] Bank swizzling pattern inside shared memory
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+ ur_exp_tensor_map_l2_promotion_flags_t L2Promotion, ///< [in] L2 promotion size.
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+ ur_exp_tensor_map_oob_fill_flags_t OobFill, ///< [in] Indicates whether zero or special NaN constant will be used to
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+ ///< fill out-of-bounds elements.
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+ ur_exp_tensor_map_handle_t *hTensorMap ///< [out] Handle of the tensor map object.
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+ );
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Encode tensor map with tiled data
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+ ///
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+ /// @details
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+ /// - Tiled map encode.
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+ ///
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+ /// @returns
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+ /// - ::UR_RESULT_SUCCESS
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+ /// - ::UR_RESULT_ERROR_UNINITIALIZED
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+ /// - ::UR_RESULT_ERROR_DEVICE_LOST
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+ /// - ::UR_RESULT_ERROR_ADAPTER_SPECIFIC
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+ /// - ::UR_RESULT_ERROR_INVALID_NULL_HANDLE
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+ /// + `NULL == hDevice`
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+ /// - ::UR_RESULT_ERROR_INVALID_ENUMERATION
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+ /// + `::UR_EXP_TENSOR_MAP_DATA_TYPE_FLAGS_MASK & TensorMapType`
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+ /// + `::UR_EXP_TENSOR_MAP_INTERLEAVE_FLAGS_MASK & Interleave`
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+ /// + `::UR_EXP_TENSOR_MAP_SWIZZLE_FLAGS_MASK & Swizzle`
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+ /// + `::UR_EXP_TENSOR_MAP_L2_PROMOTION_FLAGS_MASK & L2Promotion`
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+ /// + `::UR_EXP_TENSOR_MAP_OOB_FILL_FLAGS_MASK & OobFill`
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+ /// - ::UR_RESULT_ERROR_INVALID_NULL_POINTER
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+ /// + `NULL == GlobalAddress`
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+ /// + `NULL == GlobalDim`
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+ /// + `NULL == GlobalStrides`
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+ /// + `NULL == BoxDim`
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+ /// + `NULL == ElementStrides`
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+ /// + `NULL == hTensorMap`
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+ /// - ::UR_RESULT_ERROR_INVALID_ARGUMENT
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+ /// + `TensorRank < 3`
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+ UR_APIEXPORT ur_result_t UR_APICALL
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+ urTensorMapEncodeTiledExp(
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+ ur_device_handle_t hDevice, ///< [in] Handle of the device object.
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+ ur_exp_tensor_map_data_type_flags_t TensorMapType, ///< [in] Data type of the tensor object.
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+ uint32_t TensorRank, ///< [in] Dimensionality of tensor; must be at least 3.
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+ void *GlobalAddress, ///< [in] Starting address of memory region described by tensor.
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+ const uint64_t *GlobalDim, ///< [in] Array containing tensor size (number of elements) along each of
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+ ///< the TensorRank dimensions.
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+ const uint64_t *GlobalStrides, ///< [in] Array containing stride size (in bytes) along each of the
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+ ///< TensorRank - 1 dimensions.
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+ const uint32_t *BoxDim, ///< [in] Array containing traversal box size (number of elments) along
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+ ///< each of the TensorRank dimensions. Specifies how many elements to be
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+ ///< traversed along each tensor dimension.
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+ const uint32_t *ElementStrides, ///< [in] Array containing traversal stride in each of the TensorRank
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+ ///< dimensions.
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+ ur_exp_tensor_map_interleave_flags_t Interleave, ///< [in] Type of interleaved layout the tensor addresses
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+ ur_exp_tensor_map_swizzle_flags_t Swizzle, ///< [in] Bank swizzling pattern inside shared memory
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+ ur_exp_tensor_map_l2_promotion_flags_t L2Promotion, ///< [in] L2 promotion size.
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+ ur_exp_tensor_map_oob_fill_flags_t OobFill, ///< [in] Indicates whether zero or special NaN constant will be used to
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+ ///< fill out-of-bounds elements.
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+ ur_exp_tensor_map_handle_t *hTensorMap ///< [out] Handle of the tensor map object.
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+ );
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+
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#if !defined(__GNUC__)
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#pragma endregion
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#endif
@@ -12343,6 +12546,49 @@ typedef struct ur_command_buffer_command_get_info_exp_params_t {
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size_t **ppPropSizeRet;
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} ur_command_buffer_command_get_info_exp_params_t;
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Function parameters for urTensorMapEncodeIm2ColExp
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+ /// @details Each entry is a pointer to the parameter passed to the function;
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+ /// allowing the callback the ability to modify the parameter's value
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+ typedef struct ur_tensor_map_encode_im_2_col_exp_params_t {
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+ ur_device_handle_t *phDevice;
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+ ur_exp_tensor_map_data_type_flags_t *pTensorMapType;
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+ uint32_t *pTensorRank;
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+ void **pGlobalAddress;
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+ const uint64_t **pGlobalDim;
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+ const uint64_t **pGlobalStrides;
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+ const int **pPixelBoxLowerCorner;
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+ const int **pPixelBoxUpperCorner;
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+ uint32_t *pChannelsPerPixel;
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+ uint32_t *pPixelsPerColumn;
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+ const uint32_t **pElementStrides;
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+ ur_exp_tensor_map_interleave_flags_t *pInterleave;
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+ ur_exp_tensor_map_swizzle_flags_t *pSwizzle;
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+ ur_exp_tensor_map_l2_promotion_flags_t *pL2Promotion;
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+ ur_exp_tensor_map_oob_fill_flags_t *pOobFill;
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+ ur_exp_tensor_map_handle_t **phTensorMap;
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+ } ur_tensor_map_encode_im_2_col_exp_params_t;
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+
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+ ///////////////////////////////////////////////////////////////////////////////
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+ /// @brief Function parameters for urTensorMapEncodeTiledExp
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+ /// @details Each entry is a pointer to the parameter passed to the function;
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+ /// allowing the callback the ability to modify the parameter's value
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+ typedef struct ur_tensor_map_encode_tiled_exp_params_t {
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+ ur_device_handle_t *phDevice;
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+ ur_exp_tensor_map_data_type_flags_t *pTensorMapType;
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+ uint32_t *pTensorRank;
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+ void **pGlobalAddress;
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+ const uint64_t **pGlobalDim;
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+ const uint64_t **pGlobalStrides;
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+ const uint32_t **pBoxDim;
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+ const uint32_t **pElementStrides;
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+ ur_exp_tensor_map_interleave_flags_t *pInterleave;
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+ ur_exp_tensor_map_swizzle_flags_t *pSwizzle;
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+ ur_exp_tensor_map_l2_promotion_flags_t *pL2Promotion;
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+ ur_exp_tensor_map_oob_fill_flags_t *pOobFill;
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+ ur_exp_tensor_map_handle_t **phTensorMap;
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+ } ur_tensor_map_encode_tiled_exp_params_t;
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+
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///////////////////////////////////////////////////////////////////////////////
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/// @brief Function parameters for urUsmP2PEnablePeerAccessExp
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/// @details Each entry is a pointer to the parameter passed to the function;
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