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fzou1KornevNikita
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[X86][MC] Fix offset for R_X86_64_CODE_6_GOTTPOFF fixup (#119496)
1. Fix the offset for R_X86_64_CODE_6_GOTTPOFF fixup, which is introduced by #117277. It should be biased with the size of the immediate field. Related tests are updated. 2. Rename reloc_riprel_6byte_relax to reloc_riprel_4byte_relax_evex as the number of bytes represents the size of fixup, and "evex" suffix is added as it's used for APX NDD/NF instructions with EVEX prefix. 3. Remove incorrectly setting R_X86_64_CODE_6_GOTTPOFF relocation type for APX NDD/NF instructions with GOTPCREL symbol reference modifier.
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‎lld/test/ELF/tls-opt.s

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -28,17 +28,17 @@
2828
// DISASM-NEXT: addq $-8, %r28
2929
// DISASM-NEXT: addq $-4, %r16
3030
# NDD
31-
// DISASM-NEXT: addq $-10, %r16, %r16
32-
// DISASM-NEXT: addq $-10, %r16, %r20
33-
// DISASM-NEXT: addq $-10, %r16, %rax
34-
// DISASM-NEXT: addq $-10, %rax, %r16
35-
// DISASM-NEXT: addq $-10, %r8, %r16
36-
// DISASM-NEXT: addq $-10, %rax, %r12
31+
// DISASM-NEXT: addq $-8, %r16, %r16
32+
// DISASM-NEXT: addq $-8, %r16, %r20
33+
// DISASM-NEXT: addq $-8, %r16, %rax
34+
// DISASM-NEXT: addq $-8, %rax, %r16
35+
// DISASM-NEXT: addq $-8, %r8, %r16
36+
// DISASM-NEXT: addq $-8, %rax, %r12
3737
# NDD + NF
38-
// DISASM-NEXT: {nf} addq $-10, %r8, %r16
39-
// DISASM-NEXT: {nf} addq $-10, %rax, %r12
38+
// DISASM-NEXT: {nf} addq $-8, %r8, %r16
39+
// DISASM-NEXT: {nf} addq $-8, %rax, %r12
4040
# NF
41-
// DISASM-NEXT: {nf} addq $-10, %r12
41+
// DISASM-NEXT: {nf} addq $-8, %r12
4242

4343
// LD to LE:
4444
// DISASM-NEXT: movq %fs:0, %rax

‎lld/test/ELF/x86-64-tls-ie-local.s

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -17,21 +17,21 @@
1717
## &.got[1] - 0x1286 = 0x2380 - 0x1286 = 4346
1818
## &.got[2] - 0x128e = 0x2378 - 0x128e = 4330
1919
## &.got[3] - 0x1296 = 0x2380 - 0x1296 = 4330
20-
## &.got[0] - 0x12a0 = 0x2376 - 0x12a0 = 4310
21-
## &.got[1] - 0x12aa = 0x237e - 0x12aa = 4308
22-
## &.got[0] - 0x12b4 = 0x2376 - 0x12b4 = 4290
23-
## &.got[1] - 0x12be = 0x237e - 0x12be = 4288
24-
## &.got[0] - 0x12c8 = 0x2376 - 0x12c8 = 4270
20+
## &.got[0] - 0x12a0 = 0x2378 - 0x12a0 = 4312
21+
## &.got[1] - 0x12aa = 0x2380 - 0x12aa = 4310
22+
## &.got[0] - 0x12b4 = 0x2378 - 0x12b4 = 4292
23+
## &.got[1] - 0x12be = 0x2380 - 0x12be = 4290
24+
## &.got[0] - 0x12c8 = 0x2378 - 0x12c8 = 4272
2525

2626
# CHECK: 1278: addq 4345(%rip), %rax
2727
# CHECK-NEXT: 127f: addq 4346(%rip), %rax
2828
# CHECK-NEXT: 1286: addq 4330(%rip), %r16
2929
# CHECK-NEXT: 128e: addq 4330(%rip), %r16
30-
# CHECK-NEXT: 1296: addq %r8, 4310(%rip), %r16
31-
# CHECK-NEXT: 12a0: addq 4308(%rip), %rax, %r12
32-
# CHECK-NEXT: 12aa: {nf} addq %r8, 4290(%rip), %r16
33-
# CHECK-NEXT: 12b4: {nf} addq 4288(%rip), %rax, %r12
34-
# CHECK-NEXT: 12be: {nf} addq 4270(%rip), %r12
30+
# CHECK-NEXT: 1296: addq %r8, 4312(%rip), %r16
31+
# CHECK-NEXT: 12a0: addq 4310(%rip), %rax, %r12
32+
# CHECK-NEXT: 12aa: {nf} addq %r8, 4292(%rip), %r16
33+
# CHECK-NEXT: 12b4: {nf} addq 4290(%rip), %rax, %r12
34+
# CHECK-NEXT: 12be: {nf} addq 4272(%rip), %r12
3535

3636
addq foo@GOTTPOFF(%rip), %rax
3737
addq bar@GOTTPOFF(%rip), %rax

‎llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -636,7 +636,7 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
636636
{"reloc_riprel_4byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
637637
{"reloc_riprel_4byte_relax_rex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
638638
{"reloc_riprel_4byte_relax_rex2", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
639-
{"reloc_riprel_6byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
639+
{"reloc_riprel_4byte_relax_evex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
640640
{"reloc_signed_4byte", 0, 32, 0},
641641
{"reloc_signed_4byte_relax", 0, 32, 0},
642642
{"reloc_global_offset_table", 0, 32, 0},
@@ -686,7 +686,7 @@ static unsigned getFixupKindSize(unsigned Kind) {
686686
case X86::reloc_riprel_4byte_relax_rex2:
687687
case X86::reloc_riprel_4byte_movq_load:
688688
case X86::reloc_riprel_4byte_movq_load_rex2:
689-
case X86::reloc_riprel_6byte_relax:
689+
case X86::reloc_riprel_4byte_relax_evex:
690690
case X86::reloc_signed_4byte:
691691
case X86::reloc_signed_4byte_relax:
692692
case X86::reloc_global_offset_table:

‎llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ static X86_64RelType getType64(MCFixupKind Kind,
7777
case X86::reloc_riprel_4byte_relax_rex2:
7878
case X86::reloc_riprel_4byte_movq_load:
7979
case X86::reloc_riprel_4byte_movq_load_rex2:
80-
case X86::reloc_riprel_6byte_relax:
80+
case X86::reloc_riprel_4byte_relax_evex:
8181
return RT64_32;
8282
case X86::reloc_branch_4byte_pcrel:
8383
Modifier = MCSymbolRefExpr::VK_PLT;
@@ -203,7 +203,7 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
203203
if ((unsigned)Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
204204
(unsigned)Kind == X86::reloc_riprel_4byte_relax_rex2)
205205
return ELF::R_X86_64_CODE_4_GOTTPOFF;
206-
else if ((unsigned)Kind == X86::reloc_riprel_6byte_relax)
206+
else if ((unsigned)Kind == X86::reloc_riprel_4byte_relax_evex)
207207
return ELF::R_X86_64_CODE_6_GOTTPOFF;
208208
return ELF::R_X86_64_GOTTPOFF;
209209
case MCSymbolRefExpr::VK_TLSLD:
@@ -230,8 +230,6 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
230230
case X86::reloc_riprel_4byte_relax_rex2:
231231
case X86::reloc_riprel_4byte_movq_load_rex2:
232232
return ELF::R_X86_64_CODE_4_GOTPCRELX;
233-
case X86::reloc_riprel_6byte_relax:
234-
return ELF::R_X86_64_CODE_6_GOTTPOFF;
235233
}
236234
llvm_unreachable("unexpected relocation type!");
237235
case MCSymbolRefExpr::VK_GOTPCREL_NORELAX:

‎llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,9 @@ enum Fixups {
2424
// instruction with rex prefix
2525
reloc_riprel_4byte_relax_rex2, // 32-bit rip-relative in relaxable
2626
// instruction with rex2 prefix
27-
reloc_riprel_6byte_relax, // 32-bit rip-relative in relaxable
28-
// instruction with APX NDD
27+
reloc_riprel_4byte_relax_evex, // 32-bit rip-relative in relaxable
28+
// instruction of APX NDD/NF with
29+
// EVEX prefix
2930
reloc_signed_4byte, // 32-bit signed. Unlike FK_Data_4
3031
// this will be sign extended at
3132
// runtime.

‎llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -572,15 +572,15 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
572572
FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax) ||
573573
FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex) ||
574574
FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_rex2) ||
575-
FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel)) {
575+
FixupKind == MCFixupKind(X86::reloc_branch_4byte_pcrel) ||
576+
FixupKind == MCFixupKind(X86::reloc_riprel_4byte_relax_evex)) {
576577
ImmOffset -= 4;
577578
// If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
578579
// leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
579580
// this needs to be a GOTPC32 relocation.
580581
if (startsWithGlobalOffsetTable(Expr) != GOT_None)
581582
FixupKind = MCFixupKind(X86::reloc_global_offset_table);
582-
} else if (FixupKind == MCFixupKind(X86::reloc_riprel_6byte_relax))
583-
ImmOffset -= 6;
583+
}
584584

585585
if (FixupKind == FK_PCRel_2)
586586
ImmOffset -= 2;
@@ -677,7 +677,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
677677
case X86::ADD64mr_ND:
678678
case X86::ADD64mr_NF_ND:
679679
case X86::ADD64rm_NF_ND:
680-
return X86::reloc_riprel_6byte_relax;
680+
return X86::reloc_riprel_4byte_relax_evex;
681681
}
682682
}();
683683

‎llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ static bool isFixupKindRIPRel(unsigned Kind) {
7070
Kind == X86::reloc_riprel_4byte_relax ||
7171
Kind == X86::reloc_riprel_4byte_relax_rex ||
7272
Kind == X86::reloc_riprel_4byte_relax_rex2 ||
73-
Kind == X86::reloc_riprel_6byte_relax;
73+
Kind == X86::reloc_riprel_4byte_relax_evex;
7474
}
7575

7676
static unsigned getFixupKindLog2Size(unsigned Kind) {
@@ -92,7 +92,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
9292
case X86::reloc_signed_4byte:
9393
case X86::reloc_signed_4byte_relax:
9494
case X86::reloc_branch_4byte_pcrel:
95-
case X86::reloc_riprel_6byte_relax:
95+
case X86::reloc_riprel_4byte_relax_evex:
9696
case FK_Data_4: return 2;
9797
case FK_Data_8: return 3;
9898
}

‎llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
7070
case X86::reloc_riprel_4byte_relax:
7171
case X86::reloc_riprel_4byte_relax_rex:
7272
case X86::reloc_riprel_4byte_relax_rex2:
73-
case X86::reloc_riprel_6byte_relax:
73+
case X86::reloc_riprel_4byte_relax_evex:
7474
case X86::reloc_branch_4byte_pcrel:
7575
return COFF::IMAGE_REL_AMD64_REL32;
7676
case FK_Data_4:

‎llvm/test/MC/ELF/relocation.s

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -90,11 +90,11 @@ weak_sym:
9090
// CHECK-NEXT: 0x2D R_X86_64_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
9191
// CHECK-NEXT: 0x35 R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
9292
// CHECK-NEXT: 0x3D R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
93-
// CHECK-NEXT: 0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
94-
// CHECK-NEXT: 0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
95-
// CHECK-NEXT: 0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
96-
// CHECK-NEXT: 0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
97-
// CHECK-NEXT: 0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
93+
// CHECK-NEXT: 0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
94+
// CHECK-NEXT: 0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
95+
// CHECK-NEXT: 0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
96+
// CHECK-NEXT: 0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
97+
// CHECK-NEXT: 0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
9898
// CHECK-NEXT: 0x76 R_X86_64_TLSGD foo 0xFFFFFFFFFFFFFFFC
9999
// CHECK-NEXT: 0x7D R_X86_64_TPOFF32 foo 0x0
100100
// CHECK-NEXT: 0x84 R_X86_64_TLSLD foo 0xFFFFFFFFFFFFFFFC

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