Skip to content

Commit ac1b75b

Browse files
RKSimonRKSimon
committed
[X86][AVX] Add PR34394 subvector broadcast test cases
Tidyup check-prefixes at the same time llvm-svn: 352749
1 parent ea94c30 commit ac1b75b

File tree

1 file changed

+131
-10
lines changed

1 file changed

+131
-10
lines changed

‎llvm/test/CodeGen/X86/subvector-broadcast.ll

+131-10
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,14 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX --check-prefix=X32-AVX1
3-
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX --check-prefix=X32-AVX2
4-
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 --check-prefix=X32-AVX512F
5-
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 --check-prefix=X32-AVX512BW
6-
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 --check-prefix=X32-AVX512DQ
7-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX1
8-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX2
9-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 --check-prefix=X64-AVX512F
10-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 --check-prefix=X64-AVX512BW
11-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 --check-prefix=X64-AVX512DQ
2+
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X32,X32-AVX,X32-AVX1
3+
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X32,X32-AVX,X32-AVX2
4+
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X32,X32-AVX512,X32-AVX512F
5+
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=X32,X32-AVX512,X32-AVX512BW
6+
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X32,X32-AVX512,X32-AVX512DQ
7+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
8+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX2
9+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512F
10+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512BW
11+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512DQ
1212

1313
;
1414
; Subvector Load + Broadcast
@@ -1550,3 +1550,124 @@ define <64 x i8> @reg_broadcast_32i8_64i8(<32 x i8> %a0) nounwind {
15501550
%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
15511551
ret <64 x i8> %1
15521552
}
1553+
1554+
;
1555+
; PR34394
1556+
;
1557+
1558+
define <4 x i32> @test_2xi32_to_4xi32_mem(<2 x i32>* %vp) {
1559+
; X32-LABEL: test_2xi32_to_4xi32_mem:
1560+
; X32: # %bb.0:
1561+
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1562+
; X32-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1563+
; X32-NEXT: retl
1564+
;
1565+
; X64-AVX1-LABEL: test_2xi32_to_4xi32_mem:
1566+
; X64-AVX1: # %bb.0:
1567+
; X64-AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1568+
; X64-AVX1-NEXT: retq
1569+
;
1570+
; X64-AVX2-LABEL: test_2xi32_to_4xi32_mem:
1571+
; X64-AVX2: # %bb.0:
1572+
; X64-AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
1573+
; X64-AVX2-NEXT: retq
1574+
;
1575+
; X64-AVX512-LABEL: test_2xi32_to_4xi32_mem:
1576+
; X64-AVX512: # %bb.0:
1577+
; X64-AVX512-NEXT: vpbroadcastq (%rdi), %xmm0
1578+
; X64-AVX512-NEXT: retq
1579+
%vec = load <2 x i32>, <2 x i32>* %vp
1580+
%res = shufflevector <2 x i32> %vec, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
1581+
ret <4 x i32> %res
1582+
}
1583+
1584+
define <8 x i32> @test_2xi32_to_8xi32_mem(<2 x i32>* %vp) {
1585+
; X32-AVX1-LABEL: test_2xi32_to_8xi32_mem:
1586+
; X32-AVX1: # %bb.0:
1587+
; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
1588+
; X32-AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1589+
; X32-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1590+
; X32-AVX1-NEXT: retl
1591+
;
1592+
; X32-AVX2-LABEL: test_2xi32_to_8xi32_mem:
1593+
; X32-AVX2: # %bb.0:
1594+
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
1595+
; X32-AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1596+
; X32-AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
1597+
; X32-AVX2-NEXT: retl
1598+
;
1599+
; X32-AVX512-LABEL: test_2xi32_to_8xi32_mem:
1600+
; X32-AVX512: # %bb.0:
1601+
; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
1602+
; X32-AVX512-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1603+
; X32-AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
1604+
; X32-AVX512-NEXT: retl
1605+
;
1606+
; X64-AVX1-LABEL: test_2xi32_to_8xi32_mem:
1607+
; X64-AVX1: # %bb.0:
1608+
; X64-AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1609+
; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1610+
; X64-AVX1-NEXT: retq
1611+
;
1612+
; X64-AVX2-LABEL: test_2xi32_to_8xi32_mem:
1613+
; X64-AVX2: # %bb.0:
1614+
; X64-AVX2-NEXT: vbroadcastsd (%rdi), %ymm0
1615+
; X64-AVX2-NEXT: retq
1616+
;
1617+
; X64-AVX512-LABEL: test_2xi32_to_8xi32_mem:
1618+
; X64-AVX512: # %bb.0:
1619+
; X64-AVX512-NEXT: vbroadcastsd (%rdi), %ymm0
1620+
; X64-AVX512-NEXT: retq
1621+
%vec = load <2 x i32>, <2 x i32>* %vp
1622+
%res = shufflevector <2 x i32> %vec, <2 x i32> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
1623+
ret <8 x i32> %res
1624+
}
1625+
1626+
define <16 x i32> @test_2xi32_to_16xi32_mem(<2 x i32>* %vp) {
1627+
; X32-AVX1-LABEL: test_2xi32_to_16xi32_mem:
1628+
; X32-AVX1: # %bb.0:
1629+
; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
1630+
; X32-AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1631+
; X32-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1632+
; X32-AVX1-NEXT: vmovaps %ymm0, %ymm1
1633+
; X32-AVX1-NEXT: retl
1634+
;
1635+
; X32-AVX2-LABEL: test_2xi32_to_16xi32_mem:
1636+
; X32-AVX2: # %bb.0:
1637+
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
1638+
; X32-AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
1639+
; X32-AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
1640+
; X32-AVX2-NEXT: vmovaps %ymm0, %ymm1
1641+
; X32-AVX2-NEXT: retl
1642+
;
1643+
; X32-AVX512-LABEL: test_2xi32_to_16xi32_mem:
1644+
; X32-AVX512: # %bb.0:
1645+
; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
1646+
; X32-AVX512-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
1647+
; X32-AVX512-NEXT: vmovdqa64 {{.*#+}} zmm1 = [0,2,0,2,0,2,0,2,0,2,0,2,0,2,0,2]
1648+
; X32-AVX512-NEXT: vpermd %zmm0, %zmm1, %zmm0
1649+
; X32-AVX512-NEXT: retl
1650+
;
1651+
; X64-AVX1-LABEL: test_2xi32_to_16xi32_mem:
1652+
; X64-AVX1: # %bb.0:
1653+
; X64-AVX1-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1654+
; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1655+
; X64-AVX1-NEXT: vmovaps %ymm0, %ymm1
1656+
; X64-AVX1-NEXT: retq
1657+
;
1658+
; X64-AVX2-LABEL: test_2xi32_to_16xi32_mem:
1659+
; X64-AVX2: # %bb.0:
1660+
; X64-AVX2-NEXT: vbroadcastsd (%rdi), %ymm0
1661+
; X64-AVX2-NEXT: vmovaps %ymm0, %ymm1
1662+
; X64-AVX2-NEXT: retq
1663+
;
1664+
; X64-AVX512-LABEL: test_2xi32_to_16xi32_mem:
1665+
; X64-AVX512: # %bb.0:
1666+
; X64-AVX512-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
1667+
; X64-AVX512-NEXT: vmovdqa64 {{.*#+}} zmm1 = [0,2,0,2,0,2,0,2,0,2,0,2,0,2,0,2]
1668+
; X64-AVX512-NEXT: vpermd %zmm0, %zmm1, %zmm0
1669+
; X64-AVX512-NEXT: retq
1670+
%vec = load <2 x i32>, <2 x i32>* %vp
1671+
%res = shufflevector <2 x i32> %vec, <2 x i32> undef, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
1672+
ret <16 x i32> %res
1673+
}

0 commit comments

Comments
 (0)