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[LSR] Convert some tests to opaque pointers (NFC)
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-184
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5 files changed

+177
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‎llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll

+31-31
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,17 @@
11
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
22

3-
; RUN: opt -opaque-pointers=0 -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=65536 -o - | FileCheck %s
4-
; RUN: opt -opaque-pointers=0 -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=2147483647 -o - | FileCheck %s
3+
; RUN: opt -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=65536 -o - | FileCheck %s
4+
; RUN: opt -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=2147483647 -o - | FileCheck %s
55

66
; CHECK-LABEL: for.body12.us.us:
7-
; CHECK: [[LSR_IV6:%[^ ]+]] = phi i16* [ [[SCEVGEP7:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP5:%[^ ]+]], %for.cond9.preheader.us.us ]
7+
; CHECK: [[LSR_IV6:%[^ ]+]] = phi ptr [ [[SCEVGEP7:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP5:%[^ ]+]], %for.cond9.preheader.us.us ]
88
; CHECK: phi i32
9-
; CHECK: [[LSR_IV:%[^ ]+]] = phi i16* [ [[SCEVGEP1:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP:%[^ ]+]], %for.cond9.preheader.us.us ]
9+
; CHECK: [[LSR_IV:%[^ ]+]] = phi ptr [ [[SCEVGEP1:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP:%[^ ]+]], %for.cond9.preheader.us.us ]
1010
; CHECK: phi i32
11-
; CHECK: [[SCEVGEP1]] = getelementptr i16, i16* [[LSR_IV]], i32 4
12-
; CHECK: [[SCEVGEP7]] = getelementptr i16, i16* [[LSR_IV6]], i32 4
11+
; CHECK: [[SCEVGEP1]] = getelementptr i8, ptr [[LSR_IV]], i32 8
12+
; CHECK: [[SCEVGEP7]] = getelementptr i8, ptr [[LSR_IV6]], i32 8
1313

14-
define void @convolve(i16** nocapture readonly %input_image, i16** nocapture readonly %filter, i32 %filter_dim, i32 %out_width, i32 %out_height, i32** nocapture readonly %convolved) {
14+
define void @convolve(ptr nocapture readonly %input_image, ptr nocapture readonly %filter, i32 %filter_dim, i32 %out_width, i32 %out_height, ptr nocapture readonly %convolved) {
1515
entry:
1616
%cmp92 = icmp eq i32 %out_height, 0
1717
br i1 %cmp92, label %for.cond.cleanup, label %for.cond1.preheader.lr.ph
@@ -23,8 +23,8 @@ for.cond1.preheader.lr.ph: ; preds = %entry
2323

2424
for.cond1.preheader: ; preds = %for.cond.cleanup3, %for.cond1.preheader.lr.ph
2525
%res_y.093 = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %add28, %for.cond.cleanup3 ]
26-
%arrayidx22 = getelementptr inbounds i32*, i32** %convolved, i32 %res_y.093
27-
%tmp3 = load i32*, i32** %arrayidx22, align 4
26+
%arrayidx22 = getelementptr inbounds ptr, ptr %convolved, i32 %res_y.093
27+
%tmp3 = load ptr, ptr %arrayidx22, align 4
2828
br label %for.cond9.preheader.us.us.preheader
2929

3030
for.cond9.preheader.us.us.preheader: ; preds = %for.cond5.for.cond.cleanup7_crit_edge.us, %for.cond5.preheader.lr.ph
@@ -35,52 +35,52 @@ for.cond9.preheader.us.us: ; preds = %for.cond9.for.cond.
3535
%filter_y.056.us.us = phi i32 [ %inc20.us.us, %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa ], [ 0, %for.cond9.preheader.us.us.preheader ]
3636
%result_element.055.us.us = phi i32 [ %add18.us.us.3, %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa ], [ 0, %for.cond9.preheader.us.us.preheader ]
3737
%add.us.us = add i32 %filter_y.056.us.us, %res_y.093
38-
%arrayidx.us.us = getelementptr inbounds i16*, i16** %filter, i32 %filter_y.056.us.us
39-
%tmp5 = load i16*, i16** %arrayidx.us.us, align 4
40-
%arrayidx15.us.us = getelementptr inbounds i16*, i16** %input_image, i32 %add.us.us
41-
%tmp6 = load i16*, i16** %arrayidx15.us.us, align 4
38+
%arrayidx.us.us = getelementptr inbounds ptr, ptr %filter, i32 %filter_y.056.us.us
39+
%tmp5 = load ptr, ptr %arrayidx.us.us, align 4
40+
%arrayidx15.us.us = getelementptr inbounds ptr, ptr %input_image, i32 %add.us.us
41+
%tmp6 = load ptr, ptr %arrayidx15.us.us, align 4
4242
br label %for.body12.us.us
4343

4444
for.body12.us.us: ; preds = %for.body12.us.us, %for.cond9.preheader.us.us
4545
%filter_x.053.us.us = phi i32 [ %inc.us.us.3, %for.body12.us.us ], [ 0, %for.cond9.preheader.us.us ]
4646
%result_element.152.us.us = phi i32 [ %add18.us.us.3, %for.body12.us.us ], [ %result_element.055.us.us, %for.cond9.preheader.us.us ]
4747
%niter = phi i32 [ %niter.nsub.3, %for.body12.us.us ], [ %unroll_iter, %for.cond9.preheader.us.us ]
4848
%add13.us.us = add i32 %filter_x.053.us.us, %res_x.060.us
49-
%arrayidx14.us.us = getelementptr inbounds i16, i16* %tmp5, i32 %filter_x.053.us.us
50-
%tmp9 = load i16, i16* %arrayidx14.us.us, align 2
49+
%arrayidx14.us.us = getelementptr inbounds i16, ptr %tmp5, i32 %filter_x.053.us.us
50+
%tmp9 = load i16, ptr %arrayidx14.us.us, align 2
5151
%conv.us.us = sext i16 %tmp9 to i32
52-
%arrayidx16.us.us = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us
53-
%tmp10 = load i16, i16* %arrayidx16.us.us, align 2
52+
%arrayidx16.us.us = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us
53+
%tmp10 = load i16, ptr %arrayidx16.us.us, align 2
5454
%conv17.us.us = sext i16 %tmp10 to i32
5555
%mul.us.us = mul nsw i32 %conv17.us.us, %conv.us.us
5656
%add18.us.us = add nsw i32 %mul.us.us, %result_element.152.us.us
5757
%inc.us.us = or i32 %filter_x.053.us.us, 1
5858
%add13.us.us.1 = add i32 %inc.us.us, %res_x.060.us
59-
%arrayidx14.us.us.1 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us
60-
%tmp11 = load i16, i16* %arrayidx14.us.us.1, align 2
59+
%arrayidx14.us.us.1 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us
60+
%tmp11 = load i16, ptr %arrayidx14.us.us.1, align 2
6161
%conv.us.us.1 = sext i16 %tmp11 to i32
62-
%arrayidx16.us.us.1 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.1
63-
%tmp12 = load i16, i16* %arrayidx16.us.us.1, align 2
62+
%arrayidx16.us.us.1 = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us.1
63+
%tmp12 = load i16, ptr %arrayidx16.us.us.1, align 2
6464
%conv17.us.us.1 = sext i16 %tmp12 to i32
6565
%mul.us.us.1 = mul nsw i32 %conv17.us.us.1, %conv.us.us.1
6666
%add18.us.us.1 = add nsw i32 %mul.us.us.1, %add18.us.us
6767
%inc.us.us.1 = or i32 %filter_x.053.us.us, 2
6868
%add13.us.us.2 = add i32 %inc.us.us.1, %res_x.060.us
69-
%arrayidx14.us.us.2 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us.1
70-
%tmp13 = load i16, i16* %arrayidx14.us.us.2, align 2
69+
%arrayidx14.us.us.2 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us.1
70+
%tmp13 = load i16, ptr %arrayidx14.us.us.2, align 2
7171
%conv.us.us.2 = sext i16 %tmp13 to i32
72-
%arrayidx16.us.us.2 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.2
73-
%tmp14 = load i16, i16* %arrayidx16.us.us.2, align 2
72+
%arrayidx16.us.us.2 = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us.2
73+
%tmp14 = load i16, ptr %arrayidx16.us.us.2, align 2
7474
%conv17.us.us.2 = sext i16 %tmp14 to i32
7575
%mul.us.us.2 = mul nsw i32 %conv17.us.us.2, %conv.us.us.2
7676
%add18.us.us.2 = add nsw i32 %mul.us.us.2, %add18.us.us.1
7777
%inc.us.us.2 = or i32 %filter_x.053.us.us, 3
7878
%add13.us.us.3 = add i32 %inc.us.us.2, %res_x.060.us
79-
%arrayidx14.us.us.3 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us.2
80-
%tmp15 = load i16, i16* %arrayidx14.us.us.3, align 2
79+
%arrayidx14.us.us.3 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us.2
80+
%tmp15 = load i16, ptr %arrayidx14.us.us.3, align 2
8181
%conv.us.us.3 = sext i16 %tmp15 to i32
82-
%arrayidx16.us.us.3 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.3
83-
%tmp16 = load i16, i16* %arrayidx16.us.us.3, align 2
82+
%arrayidx16.us.us.3 = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us.3
83+
%tmp16 = load i16, ptr %arrayidx16.us.us.3, align 2
8484
%conv17.us.us.3 = sext i16 %tmp16 to i32
8585
%mul.us.us.3 = mul nsw i32 %conv17.us.us.3, %conv.us.us.3
8686
%add18.us.us.3 = add nsw i32 %mul.us.us.3, %add18.us.us.2
@@ -95,8 +95,8 @@ for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa: ; preds = %for.body12.us
9595
br i1 %exitcond98, label %for.cond5.for.cond.cleanup7_crit_edge.us, label %for.cond9.preheader.us.us
9696

9797
for.cond5.for.cond.cleanup7_crit_edge.us: ; preds = %for.cond9.for.cond.cleanup11_crit_edge.us.us
98-
%arrayidx23.us = getelementptr inbounds i32, i32* %tmp3, i32 %res_x.060.us
99-
store i32 %add18.us.us.3, i32* %arrayidx23.us, align 4
98+
%arrayidx23.us = getelementptr inbounds i32, ptr %tmp3, i32 %res_x.060.us
99+
store i32 %add18.us.us.3, ptr %arrayidx23.us, align 4
100100
%add25.us = add nuw i32 %res_x.060.us, 1
101101
%exitcond99 = icmp eq i32 %add25.us, %out_width
102102
br i1 %exitcond99, label %for.cond.cleanup3, label %for.cond9.preheader.us.us.preheader

‎llvm/test/Transforms/LoopStrengthReduce/addrec-gep-address-space.ll

+19-21
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
2-
; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
2+
; RUN: opt < %s -loop-reduce -S | FileCheck %s
33

44
; This test tests several things. The load and store should use the
55
; same address instead of having it computed twice, and SCEVExpander should
@@ -10,24 +10,24 @@
1010

1111
target datalayout = "e-p:64:64:64-p1:16:16:16-n16:32:64"
1212

13-
define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double addrspace(1)* nocapture %p) nounwind {
13+
define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, ptr addrspace(1) nocapture %p) nounwind {
1414
; CHECK-LABEL: define void @foo
15-
; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], double addrspace(1)* nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
15+
; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], ptr addrspace(1) nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
1616
; CHECK-NEXT: entry:
1717
; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i64 [[N]], 0
1818
; CHECK-NEXT: br i1 [[TMP]], label [[BB_NPH3:%.*]], label [[RETURN:%.*]]
1919
; CHECK: bb.nph:
2020
; CHECK-NEXT: br label [[BB1:%.*]]
2121
; CHECK: bb1:
22-
; CHECK-NEXT: [[LSR_IV3:%.*]] = phi double addrspace(1)* [ [[SCEVGEP4:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
22+
; CHECK-NEXT: [[LSR_IV2:%.*]] = phi ptr addrspace(1) [ [[SCEVGEP3:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
2323
; CHECK-NEXT: [[J_01:%.*]] = phi i64 [ [[TMP9:%.*]], [[BB2]] ], [ 0, [[BB_NPH]] ]
24-
; CHECK-NEXT: [[TMP6:%.*]] = load double, double addrspace(1)* [[LSR_IV3]], align 8
24+
; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr addrspace(1) [[LSR_IV2]], align 8
2525
; CHECK-NEXT: [[TMP7:%.*]] = fdiv double [[TMP6]], 2.100000e+00
26-
; CHECK-NEXT: store double [[TMP7]], double addrspace(1)* [[LSR_IV3]], align 8
26+
; CHECK-NEXT: store double [[TMP7]], ptr addrspace(1) [[LSR_IV2]], align 8
2727
; CHECK-NEXT: [[TMP9]] = add i64 [[J_01]], 1
2828
; CHECK-NEXT: br label [[BB2]]
2929
; CHECK: bb2:
30-
; CHECK-NEXT: [[SCEVGEP4]] = getelementptr double, double addrspace(1)* [[LSR_IV3]], i16 1
30+
; CHECK-NEXT: [[SCEVGEP3]] = getelementptr i8, ptr addrspace(1) [[LSR_IV2]], i16 8
3131
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], [[M]]
3232
; CHECK-NEXT: br i1 [[TMP10]], label [[BB1]], label [[BB2_BB3_CRIT_EDGE:%.*]]
3333
; CHECK: bb2.bb3_crit_edge:
@@ -36,8 +36,7 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double addrspace(1)* nocapture
3636
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[I_02:%.*]], 1
3737
; CHECK-NEXT: br label [[BB4:%.*]]
3838
; CHECK: bb4:
39-
; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i1, i1 addrspace(1)* [[LSR_IV1:%.*]], i16 [[TMP5:%.*]]
40-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i1 addrspace(1)* [[SCEVGEP2]] to double addrspace(1)*
39+
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr addrspace(1) [[LSR_IV]], i16 [[TMP4:%.*]]
4140
; CHECK-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], [[N]]
4241
; CHECK-NEXT: br i1 [[TMP12]], label [[BB2_PREHEADER:%.*]], label [[BB4_RETURN_CRIT_EDGE:%.*]]
4342
; CHECK: bb4.return_crit_edge:
@@ -48,17 +47,16 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double addrspace(1)* nocapture
4847
; CHECK-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[M]], 0
4948
; CHECK-NEXT: br i1 [[TMP13]], label [[BB_NPH3_SPLIT:%.*]], label [[BB4_RETURN_CRIT_EDGE_SPLIT]]
5049
; CHECK: bb.nph3.split:
51-
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double addrspace(1)* [[P]], i16 -2989
52-
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[Q]], [[O]]
53-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], [[N]]
54-
; CHECK-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], 37
55-
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i16
56-
; CHECK-NEXT: [[TMP5]] = shl i16 [[TMP4]], 3
50+
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(1) [[P]], i16 -23912
51+
; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[Q]], [[O]]
52+
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], [[N]]
53+
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 37
54+
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i16
55+
; CHECK-NEXT: [[TMP4]] = shl i16 [[TMP3]], 3
5756
; CHECK-NEXT: br label [[BB2_PREHEADER]]
5857
; CHECK: bb2.preheader:
59-
; CHECK-NEXT: [[LSR_IV]] = phi double addrspace(1)* [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[TMP0]], [[BB4]] ]
58+
; CHECK-NEXT: [[LSR_IV]] = phi ptr addrspace(1) [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[SCEVGEP1]], [[BB4]] ]
6059
; CHECK-NEXT: [[I_02]] = phi i64 [ [[TMP11]], [[BB4]] ], [ 0, [[BB_NPH3_SPLIT]] ]
61-
; CHECK-NEXT: [[LSR_IV1]] = bitcast double addrspace(1)* [[LSR_IV]] to i1 addrspace(1)*
6260
; CHECK-NEXT: br i1 true, label [[BB_NPH]], label [[BB3]]
6361
; CHECK: return:
6462
; CHECK-NEXT: ret void
@@ -77,12 +75,12 @@ bb1: ; preds = %bb2, %bb.nph
7775
%tmp3 = add i64 %j.01, %tmp1 ; <i64> [#uses=1]
7876
%tmp4 = add i64 %j.01, %tmp2 ; <i64> [#uses=1]
7977
%z0 = add i64 %tmp3, 5203
80-
%tmp5 = getelementptr double, double addrspace(1)* %p, i64 %z0 ; <double addrspace(1)*> [#uses=1]
81-
%tmp6 = load double, double addrspace(1)* %tmp5, align 8 ; <double> [#uses=1]
78+
%tmp5 = getelementptr double, ptr addrspace(1) %p, i64 %z0 ; <ptr addrspace(1)> [#uses=1]
79+
%tmp6 = load double, ptr addrspace(1) %tmp5, align 8 ; <double> [#uses=1]
8280
%tmp7 = fdiv double %tmp6, 2.100000e+00 ; <double> [#uses=1]
8381
%z1 = add i64 %tmp4, 5203
84-
%tmp8 = getelementptr double, double addrspace(1)* %p, i64 %z1 ; <double addrspace(1)*> [#uses=1]
85-
store double %tmp7, double addrspace(1)* %tmp8, align 8
82+
%tmp8 = getelementptr double, ptr addrspace(1) %p, i64 %z1 ; <ptr addrspace(1)> [#uses=1]
83+
store double %tmp7, ptr addrspace(1) %tmp8, align 8
8684
%tmp9 = add i64 %j.01, 1 ; <i64> [#uses=2]
8785
br label %bb2
8886

‎llvm/test/Transforms/LoopStrengthReduce/addrec-gep.ll

+17-19
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
2-
; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
2+
; RUN: opt < %s -loop-reduce -S | FileCheck %s
33

44
; This test tests several things. The load and store should use the
55
; same address instead of having it computed twice, and SCEVExpander should
@@ -10,24 +10,24 @@
1010

1111
target datalayout = "e-p:64:64:64-n32:64"
1212

13-
define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind {
13+
define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, ptr nocapture %p) nounwind {
1414
; CHECK-LABEL: define void @foo
15-
; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], double* nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
15+
; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], ptr nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
1616
; CHECK-NEXT: entry:
1717
; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i64 [[N]], 0
1818
; CHECK-NEXT: br i1 [[TMP]], label [[BB_NPH3:%.*]], label [[RETURN:%.*]]
1919
; CHECK: bb.nph:
2020
; CHECK-NEXT: br label [[BB1:%.*]]
2121
; CHECK: bb1:
22-
; CHECK-NEXT: [[LSR_IV3:%.*]] = phi double* [ [[SCEVGEP4:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
22+
; CHECK-NEXT: [[LSR_IV2:%.*]] = phi ptr [ [[SCEVGEP3:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
2323
; CHECK-NEXT: [[J_01:%.*]] = phi i64 [ [[TMP9:%.*]], [[BB2]] ], [ 0, [[BB_NPH]] ]
24-
; CHECK-NEXT: [[TMP6:%.*]] = load double, double* [[LSR_IV3]], align 8
24+
; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr [[LSR_IV2]], align 8
2525
; CHECK-NEXT: [[TMP7:%.*]] = fdiv double [[TMP6]], 2.100000e+00
26-
; CHECK-NEXT: store double [[TMP7]], double* [[LSR_IV3]], align 8
26+
; CHECK-NEXT: store double [[TMP7]], ptr [[LSR_IV2]], align 8
2727
; CHECK-NEXT: [[TMP9]] = add i64 [[J_01]], 1
2828
; CHECK-NEXT: br label [[BB2]]
2929
; CHECK: bb2:
30-
; CHECK-NEXT: [[SCEVGEP4]] = getelementptr double, double* [[LSR_IV3]], i64 1
30+
; CHECK-NEXT: [[SCEVGEP3]] = getelementptr i8, ptr [[LSR_IV2]], i64 8
3131
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], [[M]]
3232
; CHECK-NEXT: br i1 [[TMP10]], label [[BB1]], label [[BB2_BB3_CRIT_EDGE:%.*]]
3333
; CHECK: bb2.bb3_crit_edge:
@@ -36,8 +36,7 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind
3636
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[I_02:%.*]], 1
3737
; CHECK-NEXT: br label [[BB4:%.*]]
3838
; CHECK: bb4:
39-
; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i1, i1* [[LSR_IV1:%.*]], i64 [[TMP3:%.*]]
40-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i1* [[SCEVGEP2]] to double*
39+
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[LSR_IV]], i64 [[TMP2:%.*]]
4140
; CHECK-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], [[N]]
4241
; CHECK-NEXT: br i1 [[TMP12]], label [[BB2_PREHEADER:%.*]], label [[BB4_RETURN_CRIT_EDGE:%.*]]
4342
; CHECK: bb4.return_crit_edge:
@@ -48,15 +47,14 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind
4847
; CHECK-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[M]], 0
4948
; CHECK-NEXT: br i1 [[TMP13]], label [[BB_NPH3_SPLIT:%.*]], label [[BB4_RETURN_CRIT_EDGE_SPLIT]]
5049
; CHECK: bb.nph3.split:
51-
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[P]], i64 5203
52-
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[Q]], [[O]]
53-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], [[N]]
54-
; CHECK-NEXT: [[TMP3]] = mul i64 [[TMP2]], 296
50+
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[P]], i64 41624
51+
; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[Q]], [[O]]
52+
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], [[N]]
53+
; CHECK-NEXT: [[TMP2]] = mul i64 [[TMP1]], 296
5554
; CHECK-NEXT: br label [[BB2_PREHEADER]]
5655
; CHECK: bb2.preheader:
57-
; CHECK-NEXT: [[LSR_IV]] = phi double* [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[TMP0]], [[BB4]] ]
56+
; CHECK-NEXT: [[LSR_IV]] = phi ptr [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[SCEVGEP1]], [[BB4]] ]
5857
; CHECK-NEXT: [[I_02]] = phi i64 [ [[TMP11]], [[BB4]] ], [ 0, [[BB_NPH3_SPLIT]] ]
59-
; CHECK-NEXT: [[LSR_IV1]] = bitcast double* [[LSR_IV]] to i1*
6058
; CHECK-NEXT: br i1 true, label [[BB_NPH]], label [[BB3]]
6159
; CHECK: return:
6260
; CHECK-NEXT: ret void
@@ -75,12 +73,12 @@ bb1: ; preds = %bb2, %bb.nph
7573
%tmp3 = add i64 %j.01, %tmp1 ; <i64> [#uses=1]
7674
%tmp4 = add i64 %j.01, %tmp2 ; <i64> [#uses=1]
7775
%z0 = add i64 %tmp3, 5203
78-
%tmp5 = getelementptr double, double* %p, i64 %z0 ; <double*> [#uses=1]
79-
%tmp6 = load double, double* %tmp5, align 8 ; <double> [#uses=1]
76+
%tmp5 = getelementptr double, ptr %p, i64 %z0 ; <ptr> [#uses=1]
77+
%tmp6 = load double, ptr %tmp5, align 8 ; <double> [#uses=1]
8078
%tmp7 = fdiv double %tmp6, 2.100000e+00 ; <double> [#uses=1]
8179
%z1 = add i64 %tmp4, 5203
82-
%tmp8 = getelementptr double, double* %p, i64 %z1 ; <double*> [#uses=1]
83-
store double %tmp7, double* %tmp8, align 8
80+
%tmp8 = getelementptr double, ptr %p, i64 %z1 ; <ptr> [#uses=1]
81+
store double %tmp7, ptr %tmp8, align 8
8482
%tmp9 = add i64 %j.01, 1 ; <i64> [#uses=2]
8583
br label %bb2
8684

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