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[SYCL][SCLA] Add sycl::aspect::ext_oneapi_private_alloca (#13181)
Add aspect to check for `sycl_ext_oneapi_private_alloca` extension support. Only SPIR-V (OpenCL and Level Zero) devices have this aspect. In CodeGen, propagate this aspect when creating the `llvm.sycl.alloca.*` intrinsic. In `sycl-post-link`, do not assert on unsupported targets. Instead, assume the default value for the size specialization constant is used and handle the error at runtime. SPIR-V AOT compilation should fail in the frontend, so no need to fail here. --------- Signed-off-by: Victor Perez <[email protected]>
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-28
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26 files changed

+251
-28
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clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23838,9 +23838,25 @@ CodeGenFunction::EmitIntelSYCLAllocaBuiltin(const CallExpr *E,
2383823838
// an `alloca` or an equivalent construct in later compilation stages.
2383923839
IRBuilderBase::InsertPointGuard IPG(Builder);
2384023840
Builder.SetInsertPoint(AllocaInsertPt);
23841-
return Builder.CreateIntrinsic(
23841+
llvm::CallInst *CI = Builder.CreateIntrinsic(
2384223842
AllocaTy, Intrinsic::sycl_alloca,
2384323843
{UID, SpecConstPtr, RTBufferPtr, EltTyConst, Align}, nullptr, "alloca");
23844+
23845+
// Propagate function used aspects.
23846+
llvm::Function *F = CI->getCalledFunction();
23847+
constexpr llvm::StringLiteral MDName = "sycl_used_aspects";
23848+
if (!F->getMetadata(MDName)) {
23849+
auto *AspectAttr = FD->getAttr<SYCLUsesAspectsAttr>();
23850+
assert(AspectAttr && AspectAttr->aspects_size() == 1 &&
23851+
"Expecting a single aspect");
23852+
llvm::APSInt AspectInt =
23853+
(*AspectAttr->aspects_begin())->EvaluateKnownConstInt(getContext());
23854+
llvm::Type *I32Ty = Builder.getInt32Ty();
23855+
llvm::Constant *C = llvm::Constant::getIntegerValue(I32Ty, AspectInt);
23856+
llvm::Metadata *AspectMD = llvm::ConstantAsMetadata::get(C);
23857+
F->setMetadata(MDName, llvm::MDNode::get(Builder.getContext(), AspectMD));
23858+
}
23859+
return CI;
2384423860
}();
2384523861

2384623862
// Perform AS cast if needed.

clang/test/CodeGenSYCL/Inputs/private_alloca.hpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ namespace experimental {
1010

1111
template <typename ElementType, auto &Size, access::decorated DecorateAddress>
1212
__SYCL_BUILTIN_ALIAS(__builtin_intel_sycl_alloca)
13+
[[__sycl_detail__::__uses_aspects__(sycl::aspect::ext_oneapi_private_alloca)]]
1314
multi_ptr<ElementType, access::address_space::private_space,
1415
DecorateAddress> private_alloca(kernel_handler &h);
1516

clang/test/CodeGenSYCL/Inputs/sycl.hpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,7 @@ enum class __SYCL_TYPE(aspect) aspect { // #AspectEnum
101101
custom = 4,
102102
fp16 = 5,
103103
fp64 = 6,
104+
ext_oneapi_private_alloca = 7,
104105
};
105106

106107
using access::target;

clang/test/CodeGenSYCL/aspect_enum.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,12 @@
33
// Tests for IR of [[__sycl_detail__::sycl_type(aspect)]] enum.
44
#include "sycl.hpp"
55

6-
// CHECK: !sycl_aspects = !{![[HOST:[0-9]+]], ![[CPU:[0-9]+]], ![[GPU:[0-9]+]], ![[ACC:[0-9]+]], ![[CUSTOM:[0-9]+]], ![[FP16:[0-9]+]], ![[FP64:[0-9]+]]}
6+
// CHECK: !sycl_aspects = !{![[HOST:[0-9]+]], ![[CPU:[0-9]+]], ![[GPU:[0-9]+]], ![[ACC:[0-9]+]], ![[CUSTOM:[0-9]+]], ![[FP16:[0-9]+]], ![[FP64:[0-9]+]], ![[PRIVATE_ALLOCA:[0-9]+]]}
77
// CHECK: ![[HOST]] = !{!"host", i32 0}
88
// CHECK: ![[CPU]] = !{!"cpu", i32 1}
99
// CHECK: ![[GPU]] = !{!"gpu", i32 2}
1010
// CHECK: ![[ACC]] = !{!"accelerator", i32 3}
1111
// CHECK: ![[CUSTOM]] = !{!"custom", i32 4}
1212
// CHECK: ![[FP16]] = !{!"fp16", i32 5}
1313
// CHECK: ![[FP64]] = !{!"fp64", i32 6}
14+
// CHECK: ![[PRIVATE_ALLOCA]] = !{!"ext_oneapi_private_alloca", i32 7}

clang/test/CodeGenSYCL/builtin-alloca.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,3 +46,12 @@ SYCL_EXTERNAL void test(sycl::kernel_handler &kh) {
4646
auto ptr1 = sycl::ext::oneapi::experimental::private_alloca<int, intSize, sycl::access::decorated::legacy>(kh);
4747
auto ptr2 = sycl::ext::oneapi::experimental::private_alloca<myStruct, intSize, sycl::access::decorated::no>(kh);
4848
}
49+
50+
// CHECK: declare !sycl_used_aspects ![[#USED_ASPECTS:]] ptr @llvm.sycl.alloca.p0.p4.p4.p4.f64
51+
52+
// CHECK: declare !sycl_used_aspects ![[#USED_ASPECTS]] ptr @llvm.sycl.alloca.p0.p4.p4.p4.i32
53+
54+
// CHECK: declare !sycl_used_aspects ![[#USED_ASPECTS]] ptr @llvm.sycl.alloca.p0.p4.p4.p4.s_struct.myStructs
55+
56+
// CHECK-DAG: ![[#USED_ASPECTS]] = !{i32 [[#PRIVATE_ALLOCA_ASPECT:]]}
57+
// CHECK-DAG: !{!"ext_oneapi_private_alloca", i32 [[#PRIVATE_ALLOCA_ASPECT]]}

llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,7 @@ def AspectExt_oneapi_is_component : Aspect<"ext_oneapi_is_component">;
7272
def AspectExt_oneapi_graph : Aspect<"ext_oneapi_graph">;
7373
def AspectExt_intel_fpga_task_sequence : Aspect<"ext_intel_fpga_task_sequence">;
7474
def AspectExt_oneapi_limited_graph : Aspect<"ext_oneapi_limited_graph">;
75+
def AspectExt_oneapi_private_alloca : Aspect<"ext_oneapi_private_alloca">;
7576
// Deprecated aspects
7677
def AspectInt64_base_atomics : Aspect<"int64_base_atomics">;
7778
def AspectInt64_extended_atomics : Aspect<"int64_extended_atomics">;
@@ -123,7 +124,8 @@ def : TargetInfo<"__TestAspectList",
123124
AspectExt_oneapi_mipmap, AspectExt_oneapi_mipmap_anisotropy, AspectExt_oneapi_mipmap_level_reference, AspectExt_intel_esimd,
124125
AspectExt_oneapi_ballot_group, AspectExt_oneapi_fixed_size_group, AspectExt_oneapi_opportunistic_group,
125126
AspectExt_oneapi_tangle_group, AspectExt_intel_matrix, AspectExt_oneapi_is_composite, AspectExt_oneapi_is_component,
126-
AspectExt_oneapi_graph, AspectExt_intel_fpga_task_sequence, AspectExt_oneapi_limited_graph],
127+
AspectExt_oneapi_graph, AspectExt_intel_fpga_task_sequence, AspectExt_oneapi_limited_graph,
128+
AspectExt_oneapi_private_alloca],
127129
[]>;
128130
// This definition serves the only purpose of testing whether the deprecated aspect list defined in here and in SYCL RT
129131
// match.
Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
; RUN: sycl-post-link -spec-const=emulation %s 2>&1 | FileCheck %s
2+
3+
; This test checks the `-spec-const` pass on SPIR-V targets and emulation mode,
4+
; i.e., on AOT SPIR-V targets. In this scenario, 'llvm.sycl.alloca' intrinsics
5+
; must be left unmodified.
6+
7+
; Note that coming from clang this case should never be reached.
8+
9+
; CHECK: sycl-post-link NOTE: no modifications to the input LLVM IR have been made
10+
11+
target triple = "spir64_x86_64"
12+
13+
%"class.sycl::_V1::specialization_id" = type { i64 }
14+
15+
@size_i64 = addrspace(1) constant %"class.sycl::_V1::specialization_id" { i64 10 }, align 8
16+
17+
@size_i64_stable_name = private unnamed_addr constant [36 x i8] c"_ZTS14name_generatorIL_Z8size_i64EE\00", align 1
18+
19+
define dso_local void @private_alloca() {
20+
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.f64(ptr addrspace(4) addrspacecast (ptr @size_i64_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i64 to ptr addrspace(4)), ptr addrspace(4) null, double 0.000000e+00, i64 8)
21+
ret void
22+
}
23+
24+
declare ptr @llvm.sycl.alloca.p0.p4.p4.p4.f32(ptr addrspace(4), ptr addrspace(4), ptr addrspace(4), float, i64)

llvm/test/tools/sycl-post-link/spec-constants/SYCL-alloca.ll

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,10 @@
11
; RUN: sycl-post-link -spec-const=native < %s -S -o %t.table
2-
; RUN: FileCheck %s -check-prefixes=CHECK-RT < %t_0.ll
2+
; RUN: FileCheck %s -check-prefixes=CHECK,CHECK-RT < %t_0.ll
33
; RUN: FileCheck %s --check-prefixes=CHECK-PROPS < %t_0.prop
44

5+
; RUN: sycl-post-link -spec-const=emulation < %s -S -o %t.table
6+
; RUN: FileCheck %s -check-prefixes=CHECK,CHECK-EMULATION < %t_0.ll
7+
58
; This test checks that the post link tool is able to correctly transform
69
; SYCL alloca intrinsics in SPIR-V devices.
710

@@ -10,9 +13,9 @@
1013
%"class.sycl::_V1::specialization_id.1" = type { i16 }
1114
%my_range = type { ptr addrspace(4), ptr addrspace(4) }
1215

13-
@size_i64 = internal addrspace(1) constant %"class.sycl::_V1::specialization_id" { i64 10 }, align 8
14-
@size_i32 = internal addrspace(1) constant %"class.sycl::_V1::specialization_id.0" { i32 120 }, align 4
15-
@size_i16 = internal addrspace(1) constant %"class.sycl::_V1::specialization_id.1" { i16 1 }, align 2
16+
@size_i64 = addrspace(1) constant %"class.sycl::_V1::specialization_id" { i64 10 }, align 8
17+
@size_i32 = addrspace(1) constant %"class.sycl::_V1::specialization_id.0" { i32 120 }, align 4
18+
@size_i16 = addrspace(1) constant %"class.sycl::_V1::specialization_id.1" { i16 1 }, align 2
1619

1720
; Check that the following globals are preserved: even though they are not used
1821
; in the module anymore, they could still be referenced by debug info metadata
@@ -30,10 +33,19 @@
3033
define dso_local void @private_alloca() {
3134
; CHECK-RT: [[LENGTH:%.*]] = call i32 @_Z20__spirv_SpecConstantii(i32 1, i32 120)
3235
; CHECK-RT: {{.*}} = alloca double, i32 [[LENGTH]], align 8
36+
37+
; CHECK-EMULATION: alloca double, i32 120, align 8
3338
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.f64(ptr addrspace(4) addrspacecast (ptr @size_i32_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i32 to ptr addrspace(4)), ptr addrspace(4) null, double 0.000000e+00, i64 8)
3439
; CHECK-RT: [[LENGTH:%.*]] = call i64 @_Z20__spirv_SpecConstantix(i32 0, i64 10)
3540
; CHECK-RT: {{.*}} = alloca float, i64 [[LENGTH]], align 8
41+
42+
; CHECK-EMULATION: alloca float, i64 10, align 8
3643
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.f32(ptr addrspace(4) addrspacecast (ptr @size_i64_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i64 to ptr addrspace(4)), ptr addrspace(4) null, float 0.000000e+00, i64 8)
44+
45+
; CHECK-RT: %[[LENGTH:.*]] = call i16 @_Z20__spirv_SpecConstantis(i32 2, i16 1)
46+
; CHECK-RT: {{.*}} = alloca %my_range, i16 %[[LENGTH]], align 64
47+
48+
; CHECK-EMULATION: alloca %my_range, i16 1, align 64
3749
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.s_my_range(ptr addrspace(4) addrspacecast (ptr @size_i16_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i16 to ptr addrspace(4)), ptr addrspace(4) null, %my_range zeroinitializer, i64 64)
3850
ret void
3951
}
Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
; RUN: sycl-post-link -split=auto -spec-const=native -S -o %t.table %s -generate-device-image-default-spec-consts
2+
; RUN: FileCheck %s -input-file %t_1.ll --implicit-check-not="SpecConst"
3+
4+
; This test checks that the post link tool is able to correctly transform
5+
; SYCL alloca intrinsics in SPIR-V devices when using default values.
6+
7+
%"class.sycl::_V1::specialization_id" = type { i64 }
8+
%"class.sycl::_V1::specialization_id.0" = type { i32 }
9+
%"class.sycl::_V1::specialization_id.1" = type { i16 }
10+
%my_range = type { ptr addrspace(4), ptr addrspace(4) }
11+
12+
@size_i64 = internal addrspace(1) constant %"class.sycl::_V1::specialization_id" { i64 10 }, align 8
13+
@size_i32 = internal addrspace(1) constant %"class.sycl::_V1::specialization_id.0" { i32 120 }, align 4
14+
@size_i16 = internal addrspace(1) constant %"class.sycl::_V1::specialization_id.1" { i16 1 }, align 2
15+
16+
@size_i64_stable_name = private unnamed_addr constant [36 x i8] c"_ZTS14name_generatorIL_Z8size_i64EE\00", align 1
17+
@size_i32_stable_name = private unnamed_addr constant [36 x i8] c"_ZTS14name_generatorIL_Z8size_i32EE\00", align 1
18+
@size_i16_stable_name = private unnamed_addr constant [36 x i8] c"_ZTS14name_generatorIL_Z8size_i16EE\00", align 1
19+
20+
define dso_local void @private_alloca() {
21+
; CHECK: alloca double, i32 120, align 8
22+
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.f64(ptr addrspace(4) addrspacecast (ptr @size_i32_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i32 to ptr addrspace(4)), ptr addrspace(4) null, double 0.000000e+00, i64 8)
23+
; CHECK: alloca float, i64 10, align 8
24+
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.f32(ptr addrspace(4) addrspacecast (ptr @size_i64_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i64 to ptr addrspace(4)), ptr addrspace(4) null, float 0.000000e+00, i64 8)
25+
; CHECK: alloca %my_range, i16 1, align 64
26+
call ptr @llvm.sycl.alloca.p0.p4.p4.p4.s_my_range(ptr addrspace(4) addrspacecast (ptr @size_i16_stable_name to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @size_i16 to ptr addrspace(4)), ptr addrspace(4) null, %my_range zeroinitializer, i64 64)
27+
ret void
28+
}
29+
30+
declare ptr @llvm.sycl.alloca.p0.p4.p4.p4.f32(ptr addrspace(4), ptr addrspace(4), ptr addrspace(4), float, i64)
31+
declare ptr @llvm.sycl.alloca.p0.p4.p4.p4.f64(ptr addrspace(4), ptr addrspace(4), ptr addrspace(4), double, i64)
32+
declare ptr @llvm.sycl.alloca.p0.p4.p4.p4.s_my_range(ptr addrspace(4), ptr addrspace(4), ptr addrspace(4), %my_range, i64)

llvm/tools/sycl-post-link/SpecConstants.cpp

Lines changed: 22 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#include "llvm/IR/Instructions.h"
2121
#include "llvm/IR/IntrinsicInst.h"
2222
#include "llvm/IR/Operator.h"
23+
#include "llvm/TargetParser/Triple.h"
2324

2425
#include <vector>
2526

@@ -815,12 +816,18 @@ PreservedAnalyses SpecConstantsPass::run(Module &M,
815816
// intrinsic to find its calls and lower them depending on the HandlingMode.
816817
bool IRModified = false;
817818
LLVMContext &Ctx = M.getContext();
819+
bool IsSPIREmulated =
820+
Triple(M.getTargetTriple()).isSPIR() && Mode == HandlingMode::emulation;
818821
for (Function &F : M) {
819822
if (!F.isDeclaration())
820823
continue;
821824

822825
const bool IsSYCLAlloca = F.getIntrinsicID() == Intrinsic::sycl_alloca;
823826

827+
// 'llvm.sycl.alloca' is not supported in emulation mode on SPIR-V targets.
828+
if (IsSPIREmulated && IsSYCLAlloca)
829+
continue;
830+
824831
if (!F.getName().starts_with(SYCL_GET_SCALAR_2020_SPEC_CONST_VAL) &&
825832
!F.getName().starts_with(SYCL_GET_COMPOSITE_2020_SPEC_CONST_VAL) &&
826833
!IsSYCLAlloca)
@@ -894,17 +901,6 @@ PreservedAnalyses SpecConstantsPass::run(Module &M,
894901
// 3. Transform to spirv intrinsic _Z*__spirv_SpecConstant* or
895902
// _Z*__spirv_SpecConstantComposite
896903
Replacement = emitSpecConstantRecursive(SCTy, CI, IDs, DefaultValue);
897-
if (IsSYCLAlloca) {
898-
// In case this is a 'sycl.llvm.alloca' intrinsic, use the emitted
899-
// specialization constant as the allocation size.
900-
auto *Intr = cast<SYCLAllocaInst>(CI);
901-
Value *ArraySize = Replacement;
902-
assert(ArraySize->getType()->isIntegerTy() &&
903-
"Expecting integer type");
904-
Replacement =
905-
new AllocaInst(Intr->getAllocatedType(), Intr->getAddressSpace(),
906-
ArraySize, Intr->getAlign(), "alloca", CI);
907-
}
908904
if (IsNewSpecConstant) {
909905
// emitSpecConstantRecursive might emit more than one spec constant
910906
// (because of composite types) and therefore, we need to adjust
@@ -917,8 +913,6 @@ PreservedAnalyses SpecConstantsPass::run(Module &M,
917913
M, SymID, SCTy, IDs, /* is native spec constant */ true);
918914
}
919915
} else if (Mode == HandlingMode::emulation) {
920-
assert(!IsSYCLAlloca && "sycl_ext_oneapi_private_alloca not yet "
921-
"supported in emulation mode");
922916
// 2a. Spec constant will be passed as kernel argument;
923917

924918
// Replace it with a load from the pointer to the specialization
@@ -982,6 +976,21 @@ PreservedAnalyses SpecConstantsPass::run(Module &M,
982976
generateSpecConstDefaultValueMetadata(DefaultValue));
983977
}
984978

979+
if (IsSYCLAlloca) {
980+
// In case this is a 'sycl.llvm.alloca' intrinsic, use the emitted
981+
// specialization constant as the allocation size.
982+
auto *Intr = cast<SYCLAllocaInst>(CI);
983+
// For emulation mode, use the default value for now. This code should
984+
// never be run, as the runtime should throw a 'kernel_not_supported'
985+
// exception.
986+
Value *ArraySize =
987+
Mode == HandlingMode::emulation ? DefaultValue : Replacement;
988+
assert(ArraySize->getType()->isIntegerTy() && "Expecting integer type");
989+
Replacement =
990+
new AllocaInst(Intr->getAllocatedType(), Intr->getAddressSpace(),
991+
ArraySize, Intr->getAlign(), "alloca", CI);
992+
}
993+
985994
if (HasSretParameter)
986995
createStoreInstructionIntoSpecConstValue(CI->getArgOperand(0),
987996
Replacement, CI);

sycl/include/sycl/device_aspect_macros.hpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,6 +328,11 @@
328328
#define __SYCL_ALL_DEVICES_HAVE_ext_oneapi_limited_graph__ 0
329329
#endif
330330

331+
#ifndef __SYCL_ALL_DEVICES_HAVE_ext_oneapi_private_alloca__
332+
// __SYCL_ASPECT(ext_oneapi_private_alloca, 64)
333+
#define __SYCL_ALL_DEVICES_HAVE_ext_oneapi_private_alloca__ 0
334+
#endif
335+
331336
#ifndef __SYCL_ANY_DEVICE_HAS_host__
332337
// __SYCL_ASPECT(host, 0)
333338
#define __SYCL_ANY_DEVICE_HAS_host__ 0
@@ -647,3 +652,8 @@
647652
// __SYCL_ASPECT(ext_oneapi_limited_graph, 63)
648653
#define __SYCL_ANY_DEVICE_HAS_ext_oneapi_limited_graph__ 0
649654
#endif
655+
656+
#ifndef __SYCL_ANY_DEVICE_HAS_ext_oneapi_private_alloca__
657+
// __SYCL_ASPECT(ext_oneapi_private_alloca, 64)
658+
#define __SYCL_ANY_DEVICE_HAS_ext_oneapi_private_alloca__ 1
659+
#endif

sycl/include/sycl/ext/oneapi/experimental/alloca.hpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,10 @@
1212
#include "sycl/kernel_handler.hpp"
1313
#include "sycl/multi_ptr.hpp"
1414

15+
#ifdef __SYCL_DEVICE_ONLY__
16+
#include "sycl/aspects.hpp"
17+
#endif
18+
1519
namespace sycl {
1620
inline namespace _V1 {
1721
namespace ext::oneapi::experimental {
@@ -31,7 +35,8 @@ namespace ext::oneapi::experimental {
3135
template <typename ElementType, auto &SizeSpecName,
3236
access::decorated DecorateAddress>
3337
__SYCL_BUILTIN_ALIAS(__builtin_intel_sycl_alloca)
34-
private_ptr<ElementType, DecorateAddress> private_alloca(kernel_handler &kh);
38+
[[__sycl_detail__::__uses_aspects__(aspect::ext_oneapi_private_alloca)]] private_ptr<
39+
ElementType, DecorateAddress> private_alloca(kernel_handler &kh);
3540

3641
#else
3742

sycl/include/sycl/info/aspects.def

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,3 +58,4 @@ __SYCL_ASPECT(ext_oneapi_is_component, 60)
5858
__SYCL_ASPECT(ext_oneapi_graph, 61)
5959
__SYCL_ASPECT(ext_intel_fpga_task_sequence, 62)
6060
__SYCL_ASPECT(ext_oneapi_limited_graph, 63)
61+
__SYCL_ASPECT(ext_oneapi_private_alloca, 64)

sycl/source/detail/device_impl.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -667,6 +667,12 @@ bool device_impl::has(aspect Aspect) const {
667667
case aspect::ext_intel_fpga_task_sequence: {
668668
return is_accelerator();
669669
}
670+
case aspect::ext_oneapi_private_alloca: {
671+
// Extension only supported on SPIR-V targets.
672+
backend be = getBackend();
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return be == sycl::backend::ext_oneapi_level_zero ||
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be == sycl::backend::opencl;
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}
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}
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throw runtime_error("This device aspect has not been implemented yet.",
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PI_ERROR_INVALID_DEVICE);
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// RUN: %{build} -o %t.out
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// RUN: %{run} %t.out
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// Check that an exception with an exception with the `errc::invalid` error code
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// thrown when trying to use `sycl_ext_oneapi_private_alloca` and no device
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// supports the aspect.
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#include <sycl/detail/core.hpp>
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#include <sycl/ext/oneapi/experimental/alloca.hpp>
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#include <sycl/specialization_id.hpp>
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#include <sycl/usm.hpp>
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class Kernel;
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constexpr sycl::specialization_id<int> Size(10);
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static std::error_code test() {
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sycl::queue Queue;
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sycl::buffer<int> B(10);
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try {
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Queue.submit([&](sycl::handler &Cgh) {
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sycl::accessor Acc(B, Cgh, sycl::write_only, sycl::no_init);
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Cgh.parallel_for<Kernel>(10, [=](sycl::id<1>, sycl::kernel_handler Kh) {
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sycl::ext::oneapi::experimental::private_alloca<
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int, Size, sycl::access::decorated::no>(Kh);
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});
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});
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} catch (sycl::exception &Exception) {
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return Exception.code();
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}
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assert(false && "Exception not thrown");
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}
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int main() {
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assert(test() == sycl::errc::invalid && "Unexpected error code");
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return 0;
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}
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config.required_features += ['!aspect-ext_oneapi_private_alloca']

sycl/test-e2e/PrivateAlloca/Inputs/private_alloca_test.hpp renamed to sycl/test-e2e/PrivateAlloca/ValidUsage/Inputs/private_alloca_test.hpp

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22

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// Template for private alloca tests.
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5-
#include <sycl/sycl.hpp>
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#include <sycl/detail/core.hpp>
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#include <sycl/ext/oneapi/experimental/alloca.hpp>
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#include <sycl/specialization_id.hpp>
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template <typename ElementType, typename SizeType,
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sycl::access::decorated DecorateAddress>
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config.required_features += ['aspect-ext_oneapi_private_alloca']

sycl/test-e2e/PrivateAlloca/private_alloca_bool_size.cpp renamed to sycl/test-e2e/PrivateAlloca/ValidUsage/private_alloca_bool_size.cpp

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// RUN: %{build} -w -o %t.out
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// RUN: echo 1 | %{run} %t.out
3-
// UNSUPPORTED: cuda || hip
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// Test checking size of 'bool' type. This is not expected to be ever used, but,
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// as 'bool' is an integral type, it is a possible scenario.

sycl/test-e2e/PrivateAlloca/private_alloca_decorated.cpp renamed to sycl/test-e2e/PrivateAlloca/ValidUsage/private_alloca_decorated.cpp

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// RUN: echo 10 | %{run} %t.out
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// RUN: echo 20 | %{run} %t.out
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// RUN: echo 30 | %{run} %t.out
6-
// UNSUPPORTED: cuda || hip
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// Simple test filling a SYCL private alloca and copying it back to an output
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// accessor using a decorated multi_ptr.

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