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The first variant of the barrier takes no parameters, and waits for all previously submitted commands to the queue to enter the `info::event_command_status::complete` state before any command later submitted to the same queue is allowed to execute. A second variant of the barrier accepts a list of events, with the behavior that no commands submitted to the same queue after barrier submission may execute until all events in the `waitList` have entered the `info::event_command_status::complete` state. Both variants are non-blocking from the host program perspective, in that they do not wait for the barrier conditions to have been met before returning.
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CG4 doesn't execute until all previous command groups submitted to the same queue (CG1, CG2, CG3) have entered the completed state.
|`event ext_oneapi_submit_barrier()` | Same effect as submitting a `handler::ext_intel_barrier()` within a command group to this `queue`. The returned event enters the `info::event_command_status::complete` state when all events that the barrier is dependent on (implicitly from all previously submitted commands to the same queue) have entered the `info::event_command_status::complete` state.
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|`event ext_oneapi_submit_barrier( const vector_class<event> &waitList )` | Same effect as submitting a `handler:ext_intel_barrier( const vector_class<event> &waitList )` within a command group to this `queue`. The returned event enters the `info::event_command_status::complete` state when all events that the barrier is dependent on (explicitly from `waitList`) have entered the `info::event_command_status::complete` state.
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|`event ext_oneapi_submit_barrier()` | Same effect as submitting a `handler::ext_oneapi_barrier()` within a command group to this `queue`. The returned event enters the `info::event_command_status::complete` state when all events that the barrier is dependent on (implicitly from all previously submitted commands to the same queue) have entered the `info::event_command_status::complete` state.
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|`event ext_oneapi_submit_barrier( const vector_class<event> &waitList )` | Same effect as submitting a `handler:ext_oneapi_barrier( const vector_class<event> &waitList )` within a command group to this `queue`. The returned event enters the `info::event_command_status::complete` state when all events that the barrier is dependent on (explicitly from `waitList`) have entered the `info::event_command_status::complete` state.
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[options="header"]
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|========================================
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|*Member functions*|*Description*
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|`void ext_intel_barrier()` | Prevents any commands submitted afterward to this queue from executing until all commands previously submitted to this queue have entered the `info::event_command_status::complete` state.
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|`void ext_intel_barrier( const vector_class<event> &waitList` ) | Prevents any commands submitted afterward to this queue from executing until all events in `waitList` have entered the `info::event_command_status::complete` state. If `waitList` is empty, then the barrier has no effect.
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|`void ext_oneapi_barrier()` | Prevents any commands submitted afterward to this queue from executing until all commands previously submitted to this queue have entered the `info::event_command_status::complete` state.
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|`void ext_oneapi_barrier( const vector_class<event> &waitList` ) | Prevents any commands submitted afterward to this queue from executing until all events in `waitList` have entered the `info::event_command_status::complete` state. If `waitList` is empty, then the barrier has no effect.
Copy file name to clipboardExpand all lines: sycl/doc/extensions/MemChannel/MemChannel.asciidoc
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= SYCL_EXT_INTEL_MEM_CHANNEL_PROPERTY
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= SYCL_INTEL_mem_channel_property
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== Introduction
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NOTE: Khronos(R) is a registered trademark and SYCL(TM) and SPIR(TM) are trademarks of The Khronos Group Inc. OpenCL(TM) is a trademark of Apple Inc. used by permission by Khronos.
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== Version
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Built On: {docdate} +
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Revision: 2
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Revision: 1
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== Dependencies
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This extension is written against the SYCL 2020 specification, Revision 3.
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This extension is written against the SYCL 2020 provisional specification, Revision 1.
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The use of this extension requires a target that supports cl_intel_mem_channel_property or equivalent if OpenCL is used as the underlying device runtime.
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== Feature Test Macro
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This extension provides a feature-test macro as described in the core SYCL
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specification section 6.3.3 "Feature test macros". Therefore, an
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implementation supporting this extension must predefine the macro
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`SYCL_EXT_INTEL_MEM_CHANNEL_PROPERTY` to one of the values defined in the table below.
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Applications can test for the existence of this macro to determine if the
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implementation supports this feature, or applications can test the macro's
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value to determine which of the extension's APIs the implementation supports.
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[%header,cols="1,5"]
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|===
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|Value |Description
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|1 |Initial extension version. Base features are supported.
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|===
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== Overview
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On some targets manual assignment of buffers to memory regions can improve memory bandwidth. This extension adds a buffer property to indicate in which memory channel a particular buffer should be allocated. This information is an optimization hint to the runtime and thus it is legal to ignore.
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[options="header"]
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|===
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| Property | Description
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| property::buffer::ext_intel_mem_channel | The `ext_intel_mem_channel` property is a hint to the SYCL runtime that the buffer should be stored in a particular memory channel provided to the property.
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| property::buffer::mem_channel | The `mem_channel` property is a hint to the SYCL runtime that the buffer should be stored in a particular memory channel provided to the property.
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|===
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--
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Add a new constructor to Table 41: Constructors of the buffer property classes as follows:
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Add a new constructor to Table 4.34: Constructors of the buffer property classes as follows:
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--
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[options="header"]
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|===
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| Constructor | Description
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| property::buffer::ext_intel_mem_channel::ext_intel_mem_channel(cl_uint channel) | Constructs a SYCL `ext_intel_mem_channel` property instance with the specified channel ID. The range of valid values depends on the target and is implementation defined. Invalid values do not need to result in an error as the property is only a hint.
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| property::buffer::mem_channel::mem_channel(cl_uint channel) | Constructs a SYCL `mem_channel` property instance with the specified channel ID. The range of valid values depends on the target and is implementation defined. Invalid values do not need to result in an error as the property is only a hint.
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|===
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--
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Add a new member function to Table 42: Member functions of the buffer property classes as follows:
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Add a new member function to Table 4.35: Member functions of the buffer property classes as follows:
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[options="header"]
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|===
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| Member function | Description
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| cl_uint property::buffer::ext_intel_mem_channel::get_channel() const | Returns the cl_uint which was specified when constructing this SYCL `ext_intel_mem_channel` property.
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| cl_uint property::buffer::mem_channel::get_channel() const | Returns the cl_uint which was specified when constructing this SYCL `mem_channel` property.
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|===
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--
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} // namespace sycl
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```
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Add an entry for the new aspect to Table 26: Device aspects defined by the core SYCL specification:
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Add an entry for the new aspect to Table 4.20: Device aspects defined by the core SYCL specification:
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[options="header"]
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|========================================
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|Rev|Date|Author|Changes
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|1|2020-10-26|Joe Garvey|*Initial public draft*
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|2|2021-08-30|Dmitry Vodopyanov|*Updated according to SYCL 2020 reqs for extensions*
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