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Fix paths in tests for windows builds (#7185)
* Fix paths in tests for windows builds * Fix patterns that check mlir: backslashes are rendered as double backslashes * Fix fir emitter for output dirs with backslashes * Try fixing patterns, again * FIRLexer: parse escaped backslashes in strings * Fix more patterns with backslashes * This time, for an absolute path
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8 files changed

+30
-26
lines changed

8 files changed

+30
-26
lines changed

‎lib/Dialect/FIRRTL/Export/FIREmitter.cpp

+6-2
Original file line numberDiff line numberDiff line change
@@ -588,8 +588,12 @@ void Emitter::emitDeclaration(LayerOp op) {
588588
startStatement();
589589
ps << "layer " << PPExtString(op.getSymName()) << ", "
590590
<< PPExtString(stringifyLayerConvention(op.getConvention()));
591-
if (auto outputFile = op->getAttrOfType<hw::OutputFileAttr>("output_file"))
592-
ps << ", \"" << PPExtString(outputFile.getFilename().getValue()) << "\"";
591+
592+
if (auto outputFile = op->getAttrOfType<hw::OutputFileAttr>("output_file")) {
593+
ps << ", ";
594+
ps.writeQuotedEscaped(outputFile.getFilename().getValue());
595+
}
596+
593597
ps << " : ";
594598
emitLocationAndNewLine(op);
595599
ps.scopedBox(PP::bbox2, [&]() {

‎lib/Dialect/FIRRTL/Import/FIRLexer.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -474,7 +474,7 @@ FIRToken FIRLexer::lexString(const char *tokStart, bool isVerbatim) {
474474
return formToken(FIRToken::verbatim_string, tokStart);
475475
case '\\':
476476
// Ignore escaped '\'' or '"'
477-
if (*curPtr == '\'' || *curPtr == '"')
477+
if (*curPtr == '\'' || *curPtr == '"' || *curPtr == '\\')
478478
++curPtr;
479479
else if (*curPtr == 'u' || *curPtr == 'U')
480480
return emitError(tokStart, "unicode escape not supported in string");

‎test/Dialect/FIRRTL/annotations.mlir

+3-3
Original file line numberDiff line numberDiff line change
@@ -1918,7 +1918,7 @@ firrtl.circuit "Top" attributes {
19181918
}]
19191919
} {
19201920
// CHECK-LABEL: firrtl.module @Top
1921-
// CHECK-SAME: attributes {output_file = #hw.output_file<"foobarbaz/">}
1921+
// CHECK-SAME: attributes {output_file = #hw.output_file<"foobarbaz{{/|\\\\}}">}
19221922
firrtl.module @Top() {}
19231923
}
19241924

@@ -1934,7 +1934,7 @@ firrtl.circuit "Top" attributes {
19341934
}]
19351935
} {
19361936
// CHECK-LABEL: firrtl.module @Top
1937-
// CHECK-SAME: attributes {output_file = #hw.output_file<"foobarbaz/">}
1937+
// CHECK-SAME: attributes {output_file = #hw.output_file<"foobarbaz{{/|\\\\}}">}
19381938
firrtl.module @Top() {}
19391939
}
19401940

@@ -1950,6 +1950,6 @@ firrtl.circuit "Top" attributes {
19501950
}]
19511951
} {
19521952
// CHECK-LABEL: firrtl.module @Top
1953-
// CHECK-SAME: attributes {output_file = #hw.output_file<"foobarbaz/qux/">}
1953+
// CHECK-SAME: attributes {output_file = #hw.output_file<"foobarbaz{{/|\\\\}}qux{{/|\\\\}}">}
19541954
firrtl.module @Top() {}
19551955
}

‎test/Dialect/FIRRTL/assign-output-dirs.mlir

+6-6
Original file line numberDiff line numberDiff line change
@@ -21,19 +21,19 @@ firrtl.circuit "AssignOutputDirs" {
2121
firrtl.module private @ByRC() {}
2222

2323
// A -> A
24-
// CHECK: firrtl.module private @ByA() attributes {output_file = #hw.output_file<"A/">} {
24+
// CHECK: firrtl.module private @ByA() attributes {output_file = #hw.output_file<"A{{/|\\\\}}">} {
2525
firrtl.module private @ByA() {}
2626

2727
// A & B -> R
2828
// firrtl.module private @ByAB() {
2929
firrtl.module private @ByAB() {}
3030

3131
// C & D -> A
32-
// CHECK: firrtl.module private @ByCD() attributes {output_file = #hw.output_file<"A/">} {
32+
// CHECK: firrtl.module private @ByCD() attributes {output_file = #hw.output_file<"A{{/|\\\\}}">} {
3333
firrtl.module private @ByCD() {}
3434

3535
// A & C -> A
36-
// CHECK: firrtl.module private @ByAC() attributes {output_file = #hw.output_file<"A/">} {
36+
// CHECK: firrtl.module private @ByAC() attributes {output_file = #hw.output_file<"A{{/|\\\\}}">} {
3737
firrtl.module private @ByAC() {}
3838

3939
// B & C -> R
@@ -67,7 +67,7 @@ firrtl.circuit "AssignOutputDirs" {
6767
firrtl.instance byCD @ByCD()
6868
}
6969

70-
// CHECK: firrtl.module private @ByDotDot() attributes {output_file = #hw.output_file<"/path/to/">} {
70+
// CHECK: firrtl.module private @ByDotDot() attributes {output_file = #hw.output_file<"{{.*(/|\\\\)}}path{{/|\\\\}}to{{/|\\\\}}">} {
7171
firrtl.module private @ByDotDot() {}
7272

7373
firrtl.module @InDotDot() attributes {output_file = #hw.output_file<"../">} {
@@ -76,14 +76,14 @@ firrtl.circuit "AssignOutputDirs" {
7676

7777
// Absolute output directory tests
7878

79-
// CHECK firrtl.module private @ByOutputA() {output_file = #hw.output_file<"A/">} {}
79+
// CHECK firrtl.module private @ByOutputA() {output_file = #hw.output_file<"A{{/|\\\\}}">} {}
8080
firrtl.module private @ByOutputA() {}
8181

8282
firrtl.module @InOutputA() attributes {output_file = #hw.output_file<"/path/to/output/A/foo">} {
8383
firrtl.instance byOutputA @ByOutputA()
8484
}
8585

86-
// CHECK: firrtl.module private @ByYZ() attributes {output_file = #hw.output_file<"/X/">} {
86+
// CHECK: firrtl.module private @ByYZ() attributes {output_file = #hw.output_file<"{{.*(/|\\\\)}}X{{/|\\\\}}">} {
8787
firrtl.module private @ByYZ() {}
8888

8989
firrtl.module @InY() attributes {output_file = #hw.output_file<"/X/Y/">} {

‎test/Dialect/FIRRTL/emit-basic.mlir

+1-1
Original file line numberDiff line numberDiff line change
@@ -676,7 +676,7 @@ firrtl.circuit "Foo" {
676676
// CHECK-NEXT: layer GroupD, bind :
677677
// CHECK-NEXT: layer GroupE, inline :
678678
// CHECK-NEXT: layer GroupF, bind :
679-
// CHECK-NEXT: layer GroupWithOutputDir, bind, "foo/" :
679+
// CHECK-NEXT: layer GroupWithOutputDir, bind, "foo{{/|\\\\}}" :
680680
firrtl.layer @GroupA bind {
681681
firrtl.layer @GroupB bind {
682682
firrtl.layer @GroupC bind {

‎test/Dialect/FIRRTL/parse-basic.fir

+2-2
Original file line numberDiff line numberDiff line change
@@ -1508,9 +1508,9 @@ circuit Layers:
15081508
; CHECK-NEXT: }
15091509
; CHECK-NEXT: }
15101510

1511-
; CHECK: firrtl.layer @WithDirectory1 bind attributes {output_file = #hw.output_file<"foo/">}
1511+
; CHECK: firrtl.layer @WithDirectory1 bind attributes {output_file = #hw.output_file<"foo{{/|\\\\}}">}
15121512
layer WithDirectory1, bind, "foo":
1513-
; CHECK: firrtl.layer @WithDirectory2 bind attributes {output_file = #hw.output_file<"foo/">}
1513+
; CHECK: firrtl.layer @WithDirectory2 bind attributes {output_file = #hw.output_file<"foo{{/|\\\\}}">}
15141514
layer WithDirectory2, bind, "foo/":
15151515

15161516
;// -----

‎test/firtool/dedup-modules-with-output-dirs.fir

+7-7
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,13 @@ circuit Top: %[[
1515
{"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|A>w"},
1616
{"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|B>w"}
1717
]]
18-
; CHECK: FILE "XXX/A.sv"
18+
; CHECK: FILE "XXX{{/|\\}}A.sv"
1919
; CHECK: module A
2020
public module A:
2121
wire w : UInt<1>
2222
w is invalid
2323

24-
; CHECK: FILE "YYY/B.sv"
24+
; CHECK: FILE "YYY{{/|\\}}B.sv"
2525
; CHECK: module B
2626
public module B:
2727
wire w : UInt<1>
@@ -45,13 +45,13 @@ circuit Top: %[[
4545
{"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|A>w"},
4646
{"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|B>w"}
4747
]]
48-
; CHECK-NOT: FILE "YYY/B.sv"
48+
; CHECK-NOT: FILE "YYY{{/|\\}}B.sv"
4949
; CHECK: module A
5050
public module A:
5151
wire w : UInt<1>
5252
w is invalid
5353

54-
; CHECK: FILE "YYY/B.sv"
54+
; CHECK: FILE "YYY{{/|\\}}B.sv"
5555
; CHECK: module B
5656
public module B:
5757
wire w : UInt<1>
@@ -81,7 +81,7 @@ circuit Top: %[[
8181
{"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|CB>w"}
8282

8383
]]
84-
; CHECK: FILE "ZZZ/CA.sv"
84+
; CHECK: FILE "ZZZ{{/|\\}}CA.sv"
8585
; CHECK: module CA
8686
module CA:
8787
wire w : UInt<1>
@@ -92,13 +92,13 @@ circuit Top: %[[
9292
wire w : UInt<1>
9393
w is invalid
9494

95-
; CHECK: FILE "ZZZ/XXX/A.sv"
95+
; CHECK: FILE "ZZZ{{/|\\}}XXX{{/|\\}}A.sv"
9696
; CHECK: module A
9797
public module A:
9898
; CHECK: CA c
9999
inst c of CA
100100

101-
; CHECK: FILE "ZZZ/YYY/B.sv"
101+
; CHECK: FILE "ZZZ{{/|\\}}YYY{{/|\\}}B.sv"
102102
; CHECK: module B
103103
public module B:
104104
; CHECK: CA c

‎test/firtool/lower-layers.fir

+4-4
Original file line numberDiff line numberDiff line change
@@ -46,24 +46,24 @@ circuit Foo: %[[
4646
; CHECK: );
4747
; CHECK: endmodule
4848

49-
; CHECK: FILE "testbench/layers_Foo_Verification.sv"
49+
; CHECK: FILE "testbench{{[/\]}}layers_Foo_Verification.sv"
5050
; CHECK: `ifndef layers_Foo_Verification
5151
; CHECK: `define layers_Foo_Verification
5252
; CHECK: bind Bar Bar_Verification verification ();
5353
; CHECK: `endif // layers_Foo_Verification
5454

55-
; CHECK: FILE "testbench/VerificationHelper.sv"
55+
; CHECK: FILE "testbench{{[/\]}}VerificationHelper.sv"
5656
; CHECK: module VerificationHelper();
5757
; CHECK: wire w = 1'h0;
5858
; CHECK: endmodule
5959

60-
; CHECK: FILE "testbench/Bar_Verification.sv"
60+
; CHECK: FILE "testbench{{[/\]}}Bar_Verification.sv"
6161
; CHECK: module Bar_Verification();
6262
; CHECK: wire c = 1'h0;
6363
; CHECK: wire c_probe = c;
6464
; CHECK: endmodule
6565

66-
; CHECK: FILE "testbench/Foo.sv"
66+
; CHECK: FILE "testbench{{[/\]}}Foo.sv"
6767
; CHECK: module Foo();
6868
; CHECK: wire d = Foo.bar.verification.c_probe;
6969
; CHECK: Bar bar (

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