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[DAGCombiner] Simplifying {si|ui}tofp when only signbit is needed
If we only need the signbit `uitofp` simplified to 0, and `sitofp` simplifies to `bitcast`. Closes #85138
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3 files changed

+38
-16
lines changed

3 files changed

+38
-16
lines changed

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -611,6 +611,25 @@ bool TargetLowering::ShrinkDemandedOp(SDValue Op, unsigned BitWidth,
611611
return false;
612612
}
613613

614+
static SDValue simplifyUseOfIntToFP(SDValue Op, const APInt &DemandedBits,
615+
SelectionDAG &DAG) {
616+
unsigned Opc = Op.getOpcode();
617+
assert((Opc == ISD::SINT_TO_FP || Opc == ISD::UINT_TO_FP) &&
618+
"Invalid Int -> FP Opcode");
619+
if (!DemandedBits.isSignMask())
620+
return SDValue();
621+
622+
EVT VT = Op.getValueType();
623+
if (Opc == ISD::UINT_TO_FP)
624+
return DAG.getConstant(0, SDLoc(Op), VT);
625+
626+
EVT InnerVT = Op.getOperand(0).getValueType();
627+
if (VT.getScalarSizeInBits() == InnerVT.getScalarSizeInBits())
628+
return DAG.getBitcast(VT, Op.getOperand(0));
629+
630+
return SDValue();
631+
}
632+
614633
bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
615634
DAGCombinerInfo &DCI) const {
616635
SelectionDAG &DAG = DCI.DAG;
@@ -816,6 +835,11 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
816835
}
817836
break;
818837
}
838+
case ISD::UINT_TO_FP:
839+
case ISD::SINT_TO_FP:
840+
if (SDValue R = simplifyUseOfIntToFP(Op, DemandedBits, DAG))
841+
return R;
842+
break;
819843
case ISD::SIGN_EXTEND_INREG: {
820844
// If none of the extended bits are demanded, eliminate the sextinreg.
821845
SDValue Op0 = Op.getOperand(0);
@@ -2313,6 +2337,12 @@ bool TargetLowering::SimplifyDemandedBits(
23132337
Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth);
23142338
break;
23152339
}
2340+
case ISD::UINT_TO_FP:
2341+
case ISD::SINT_TO_FP:
2342+
if (SDValue R = simplifyUseOfIntToFP(Op, DemandedBits, TLO.DAG))
2343+
return TLO.CombineTo(Op, R);
2344+
Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth);
2345+
break;
23162346
case ISD::SIGN_EXTEND_INREG: {
23172347
SDValue Op0 = Op.getOperand(0);
23182348
EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();

llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -164,14 +164,13 @@ define <4 x float> @demandedbits_sitofp_blendvps(<4 x float> %a0, <4 x float> %a
164164
; SSE-LABEL: demandedbits_sitofp_blendvps:
165165
; SSE: # %bb.0:
166166
; SSE-NEXT: movaps %xmm0, %xmm3
167-
; SSE-NEXT: cvtdq2ps %xmm2, %xmm0
167+
; SSE-NEXT: movaps %xmm2, %xmm0
168168
; SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3
169169
; SSE-NEXT: movaps %xmm3, %xmm0
170170
; SSE-NEXT: retq
171171
;
172172
; AVX-LABEL: demandedbits_sitofp_blendvps:
173173
; AVX: # %bb.0:
174-
; AVX-NEXT: vcvtdq2ps %xmm2, %xmm2
175174
; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0
176175
; AVX-NEXT: retq
177176
%cvt = sitofp <4 x i32> %a2 to <4 x float>

llvm/test/CodeGen/X86/int-to-fp-demanded.ll

Lines changed: 7 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -7,19 +7,13 @@ declare void @use.i32(i32)
77
define i32 @sitofp_signbit_only(i32 %i_in) nounwind {
88
; X86-LABEL: sitofp_signbit_only:
99
; X86: # %bb.0:
10-
; X86-NEXT: subl $8, %esp
11-
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
12-
; X86-NEXT: movl %eax, (%esp)
13-
; X86-NEXT: fildl (%esp)
14-
; X86-NEXT: fstps {{[0-9]+}}(%esp)
1510
; X86-NEXT: movl $-2147483648, %eax # imm = 0x80000000
1611
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
17-
; X86-NEXT: addl $8, %esp
1812
; X86-NEXT: retl
1913
;
2014
; X64-LABEL: sitofp_signbit_only:
2115
; X64: # %bb.0:
22-
; X64-NEXT: cvtsi2ss %edi, %xmm0
16+
; X64-NEXT: movd %edi, %xmm0
2317
; X64-NEXT: movmskps %xmm0, %eax
2418
; X64-NEXT: shll $31, %eax
2519
; X64-NEXT: retq
@@ -44,8 +38,8 @@ define i32 @sitofp_signbit_only_okay_width(i16 %i_in) nounwind {
4438
;
4539
; X64-LABEL: sitofp_signbit_only_okay_width:
4640
; X64: # %bb.0:
47-
; X64-NEXT: movswl %di, %eax
48-
; X64-NEXT: cvtsi2ss %eax, %xmm0
41+
; X64-NEXT: shll $16, %edi
42+
; X64-NEXT: movd %edi, %xmm0
4943
; X64-NEXT: movmskps %xmm0, %eax
5044
; X64-NEXT: shll $31, %eax
5145
; X64-NEXT: retq
@@ -82,15 +76,14 @@ define <2 x i16> @sitofp_signbit_only_fail_bad_width2(i32 %i_in) nounwind {
8276
; X86-LABEL: sitofp_signbit_only_fail_bad_width2:
8377
; X86: # %bb.0:
8478
; X86-NEXT: subl $8, %esp
85-
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
86-
; X86-NEXT: movl %eax, (%esp)
79+
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
80+
; X86-NEXT: movl %edx, (%esp)
8781
; X86-NEXT: fildl (%esp)
8882
; X86-NEXT: fstps {{[0-9]+}}(%esp)
89-
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
90-
; X86-NEXT: movl %eax, %edx
9183
; X86-NEXT: shrl $16, %edx
92-
; X86-NEXT: andl $32768, %eax # imm = 0x8000
9384
; X86-NEXT: andl $32768, %edx # imm = 0x8000
85+
; X86-NEXT: movl $32768, %eax # imm = 0x8000
86+
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
9487
; X86-NEXT: # kill: def $ax killed $ax killed $eax
9588
; X86-NEXT: # kill: def $dx killed $dx killed $edx
9689
; X86-NEXT: addl $8, %esp

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