Skip to content

Commit 9f48562

Browse files
committed
[Test] Add test on freezing of widenable condition
1 parent 658595d commit 9f48562

File tree

1 file changed

+12
-0
lines changed

1 file changed

+12
-0
lines changed

llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -416,6 +416,17 @@ define <vscale x 2 x i32> @sshl_sat_v2i32_scalable_zeroinitializer(<vscale x 2 x
416416
ret <vscale x 2 x i32> %freeze
417417
}
418418

419+
define i1 @widenable_condition() {
420+
; CHECK-LABEL: @widenable_condition(
421+
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
422+
; CHECK-NEXT: [[FREEZE:%.*]] = freeze i1 [[WC]]
423+
; CHECK-NEXT: ret i1 [[FREEZE]]
424+
;
425+
%wc = call i1 @llvm.experimental.widenable.condition()
426+
%freeze = freeze i1 %wc
427+
ret i1 %freeze
428+
}
429+
419430
declare i32 @llvm.ctlz.i32(i32, i1 immarg)
420431
declare i32 @llvm.cttz.i32(i32, i1 immarg)
421432
declare i32 @llvm.abs.i32(i32, i1 immarg)
@@ -440,3 +451,4 @@ declare <2 x i32> @llvm.sshl.sat.v2i32(<2 x i32>, <2 x i32>)
440451
declare <2 x i32> @llvm.ushl.sat.v2i32(<2 x i32>, <2 x i32>)
441452
declare <vscale x 2 x i32> @llvm.sshl.sat.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>)
442453
declare <vscale x 2 x i32> @llvm.ushl.sat.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>)
454+
declare i1 @llvm.experimental.widenable.condition()

0 commit comments

Comments
 (0)