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add emitNeonCall back
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+89
-86
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+89
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‎clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

+89-86
Original file line numberDiff line numberDiff line change
@@ -2265,6 +2265,18 @@ static mlir::Value emitNeonCallToOp(
22652265
}
22662266
}
22672267

2268+
static mlir::Value emitNeonCall(CIRGenBuilderTy &builder,
2269+
llvm::SmallVector<mlir::Type> argTypes,
2270+
llvm::SmallVectorImpl<mlir::Value> &args,
2271+
llvm::StringRef intrinsicName,
2272+
mlir::Type funcResTy, mlir::Location loc,
2273+
bool isConstrainedFPIntrinsic = false,
2274+
unsigned shift = 0, bool rightshift = false) {
2275+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2276+
builder, std::move(argTypes), args, intrinsicName, funcResTy, loc,
2277+
isConstrainedFPIntrinsic, shift, rightshift);
2278+
}
2279+
22682280
/// This function `emitCommonNeonCallPattern0` implements a common way
22692281
/// to generate neon intrinsic call that has following pattern:
22702282
/// 1. There is a need to cast result of the intrinsic call back to
@@ -2283,9 +2295,9 @@ emitCommonNeonCallPattern0(CIRGenFunction &cgf, llvm::StringRef intrincsName,
22832295
// Thus empty argTypes really just means {funcResTy, funcResTy}.
22842296
argTypes = {funcResTy, funcResTy};
22852297
}
2286-
mlir::Value res = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2287-
builder, std::move(argTypes), ops, intrincsName, funcResTy,
2288-
cgf.getLoc(e->getExprLoc()));
2298+
mlir::Value res =
2299+
emitNeonCall(builder, std::move(argTypes), ops, intrincsName, funcResTy,
2300+
cgf.getLoc(e->getExprLoc()));
22892301
mlir::Type resultType = cgf.convertType(e->getType());
22902302
return builder.createBitcast(res, resultType);
22912303
}
@@ -2306,8 +2318,8 @@ static mlir::Value emitCommonNeonVecAcrossCall(CIRGenFunction &cgf,
23062318
cir::VectorType vTy =
23072319
cir::VectorType::get(&cgf.getMLIRContext(), eltTy, vecLen);
23082320
llvm::SmallVector<mlir::Value, 1> args{op};
2309-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2310-
builder, {vTy}, args, intrincsName, eltTy, cgf.getLoc(e->getExprLoc()));
2321+
return emitNeonCall(builder, {vTy}, args, intrincsName, eltTy,
2322+
cgf.getLoc(e->getExprLoc()));
23112323
}
23122324

23132325
mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
@@ -2389,26 +2401,25 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
23892401
case NEON::BI__builtin_neon_vpaddlq_v: {
23902402
// The source operand type has twice as many elements of half the size.
23912403
cir::VectorType narrowTy = getHalfEltSizeTwiceNumElemsVecType(builder, vTy);
2392-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2393-
builder, {narrowTy}, ops,
2394-
isUnsigned ? "aarch64.neon.uaddlp" : "aarch64.neon.saddlp", vTy,
2395-
getLoc(e->getExprLoc()));
2404+
return emitNeonCall(builder, {narrowTy}, ops,
2405+
isUnsigned ? "aarch64.neon.uaddlp"
2406+
: "aarch64.neon.saddlp",
2407+
vTy, getLoc(e->getExprLoc()));
23962408
}
23972409
case NEON::BI__builtin_neon_vqdmlal_v:
23982410
case NEON::BI__builtin_neon_vqdmlsl_v: {
23992411
llvm::SmallVector<mlir::Value, 2> mulOps(ops.begin() + 1, ops.end());
24002412
cir::VectorType srcVty = builder.getExtendedOrTruncatedElementVectorType(
24012413
vTy, false, /* truncate */
24022414
mlir::cast<cir::IntType>(vTy.getEltType()).isSigned());
2403-
ops[1] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2404-
builder, {srcVty, srcVty}, mulOps, "aarch64.neon.sqdmull", vTy,
2405-
getLoc(e->getExprLoc()));
2415+
ops[1] = emitNeonCall(builder, {srcVty, srcVty}, mulOps,
2416+
"aarch64.neon.sqdmull", vTy, getLoc(e->getExprLoc()));
24062417
ops.resize(2);
2407-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2408-
builder, {vTy, vTy}, ops,
2409-
builtinID == NEON::BI__builtin_neon_vqdmlal_v ? "aarch64.neon.sqadd"
2410-
: "aarch64.neon.sqsub",
2411-
vTy, getLoc(e->getExprLoc()));
2418+
return emitNeonCall(builder, {vTy, vTy}, ops,
2419+
builtinID == NEON::BI__builtin_neon_vqdmlal_v
2420+
? "aarch64.neon.sqadd"
2421+
: "aarch64.neon.sqsub",
2422+
vTy, getLoc(e->getExprLoc()));
24122423
}
24132424
case NEON::BI__builtin_neon_vcvt_f32_v:
24142425
case NEON::BI__builtin_neon_vcvtq_f32_v: {
@@ -2442,28 +2453,27 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
24422453
cir::VectorType mulVecT =
24432454
GetNeonType(this, NeonTypeFlags(neonType.getEltType(), false,
24442455
/*isQuad*/ false));
2445-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2446-
builder, {resTy, mulVecT, SInt32Ty}, ops,
2447-
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
2448-
builtinID == NEON::BI__builtin_neon_vqdmulh_lane_v)
2449-
? "aarch64.neon.sqdmulh.lane"
2450-
: "aarch64.neon.sqrdmulh.lane",
2451-
resTy, getLoc(e->getExprLoc()));
2456+
return emitNeonCall(builder, {resTy, mulVecT, SInt32Ty}, ops,
2457+
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
2458+
builtinID == NEON::BI__builtin_neon_vqdmulh_lane_v)
2459+
? "aarch64.neon.sqdmulh.lane"
2460+
: "aarch64.neon.sqrdmulh.lane",
2461+
resTy, getLoc(e->getExprLoc()));
24522462
}
24532463
case NEON::BI__builtin_neon_vqshlu_n_v:
24542464
case NEON::BI__builtin_neon_vqshluq_n_v: {
24552465
// These intrinsics expect signed vector type as input, but
24562466
// return unsigned vector type.
24572467
cir::VectorType srcTy = getSignChangedVectorType(builder, vTy);
2458-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2459-
builder, {srcTy, srcTy}, ops, "aarch64.neon.sqshlu", vTy,
2460-
getLoc(e->getExprLoc()), false, /* not fp constrained op */
2461-
1, /* second arg is shift amount */
2462-
false /* leftshift */);
2468+
return emitNeonCall(builder, {srcTy, srcTy}, ops, "aarch64.neon.sqshlu",
2469+
vTy, getLoc(e->getExprLoc()),
2470+
false, /* not fp constrained op */
2471+
1, /* second arg is shift amount */
2472+
false /* leftshift */);
24632473
}
24642474
case NEON::BI__builtin_neon_vrshr_n_v:
24652475
case NEON::BI__builtin_neon_vrshrq_n_v: {
2466-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2476+
return emitNeonCall(
24672477
builder,
24682478
{vTy, isUnsigned ? getSignChangedVectorType(builder, vTy) : vTy}, ops,
24692479
isUnsigned ? "aarch64.neon.urshl" : "aarch64.neon.srshl", vTy,
@@ -2669,26 +2679,26 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
26692679
case NEON::BI__builtin_neon_vaddlvq_s32:
26702680
llvm_unreachable(" neon_vaddlvq_s32 NYI ");
26712681
case NEON::BI__builtin_neon_vaddlvq_u32:
2672-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2673-
builder, {argTy}, ops, "aarch64.neon.uaddlv", resultTy, loc);
2682+
return emitNeonCall(builder, {argTy}, ops, "aarch64.neon.uaddlv", resultTy,
2683+
loc);
26742684
case NEON::BI__builtin_neon_vaddv_f32:
26752685
case NEON::BI__builtin_neon_vaddvq_f32:
26762686
case NEON::BI__builtin_neon_vaddvq_f64:
2677-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2678-
builder, {argTy}, ops, "aarch64.neon.faddv", resultTy, loc);
2687+
return emitNeonCall(builder, {argTy}, ops, "aarch64.neon.faddv", resultTy,
2688+
loc);
26792689
case NEON::BI__builtin_neon_vaddv_s32:
26802690
case NEON::BI__builtin_neon_vaddvq_s32:
26812691
case NEON::BI__builtin_neon_vaddvq_s64:
2682-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2683-
builder, {argTy}, ops, "aarch64.neon.saddv", resultTy, loc);
2692+
return emitNeonCall(builder, {argTy}, ops, "aarch64.neon.saddv", resultTy,
2693+
loc);
26842694
case NEON::BI__builtin_neon_vaddv_u32:
26852695
case NEON::BI__builtin_neon_vaddvq_u32:
26862696
case NEON::BI__builtin_neon_vaddvq_u64:
2687-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2688-
builder, {argTy}, ops, "aarch64.neon.uaddv", resultTy, loc);
2697+
return emitNeonCall(builder, {argTy}, ops, "aarch64.neon.uaddv", resultTy,
2698+
loc);
26892699
case NEON::BI__builtin_neon_vcaged_f64: {
2690-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2691-
builder, {argTy}, ops, "aarch64.neon.facge", resultTy, loc);
2700+
return emitNeonCall(builder, {argTy}, ops, "aarch64.neon.facge", resultTy,
2701+
loc);
26922702
}
26932703
case NEON::BI__builtin_neon_vcages_f32:
26942704
llvm_unreachable(" neon_vcages_f32 NYI ");
@@ -2877,8 +2887,8 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
28772887
cir::VectorType resVecTy =
28782888
cir::VectorType::get(&(cgf.getMLIRContext()), cgf.SInt16Ty, 4);
28792889
vecExtendIntValue(cgf, argVecTy, ops[0], loc);
2880-
mlir::Value result = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2881-
builder, {argVecTy}, ops, "aarch64.neon.sqxtn", resVecTy, loc);
2890+
mlir::Value result = emitNeonCall(builder, {argVecTy}, ops,
2891+
"aarch64.neon.sqxtn", resVecTy, loc);
28822892
return vecReduceIntValue(cgf, result, loc);
28832893
}
28842894
case NEON::BI__builtin_neon_vqmovns_u32:
@@ -2908,9 +2918,8 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
29082918
case NEON::BI__builtin_neon_vqrdmulhh_s16:
29092919
llvm_unreachable(" neon_vqrdmulhh_s16 NYI ");
29102920
case NEON::BI__builtin_neon_vqrdmulhs_s32:
2911-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2912-
builder, {resultTy, resultTy}, ops, "aarch64.neon.sqrdmulh", resultTy,
2913-
loc);
2921+
return emitNeonCall(builder, {resultTy, resultTy}, ops,
2922+
"aarch64.neon.sqrdmulh", resultTy, loc);
29142923
case NEON::BI__builtin_neon_vqrshlb_s8:
29152924
llvm_unreachable(" neon_vqrshlb_s8 NYI ");
29162925
case NEON::BI__builtin_neon_vqrshlb_u8:
@@ -3815,9 +3824,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38153824
assert(APSInt && "Expected argument to be a constant");
38163825
Ops[1] = builder.getSInt64(APSInt->getZExtValue(), getLoc(E->getExprLoc()));
38173826
const StringRef Intrinsic = "aarch64.neon.sqshlu";
3818-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3819-
builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3820-
getLoc(E->getExprLoc()));
3827+
return emitNeonCall(builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3828+
getLoc(E->getExprLoc()));
38213829
}
38223830
case NEON::BI__builtin_neon_vqshld_n_u64:
38233831
case NEON::BI__builtin_neon_vqshld_n_s64: {
@@ -3830,9 +3838,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38303838
: "aarch64.neon.sqshl";
38313839
Ops.push_back(emitScalarExpr(E->getArg(1)));
38323840
Ops[1] = builder.createIntCast(Ops[1], IntType);
3833-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3834-
builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3835-
getLoc(E->getExprLoc()));
3841+
return emitNeonCall(builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3842+
getLoc(E->getExprLoc()));
38363843
}
38373844
case NEON::BI__builtin_neon_vrshrd_n_u64:
38383845
case NEON::BI__builtin_neon_vrshrd_n_s64: {
@@ -3849,9 +3856,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38493856
assert(APSInt && "Expected argument to be a constant");
38503857
int64_t SV = -APSInt->getSExtValue();
38513858
Ops[1] = builder.getSInt64(SV, getLoc(E->getExprLoc()));
3852-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3853-
builder, {IntType, builder.getSInt64Ty()}, Ops, Intrinsic, IntType,
3854-
getLoc(E->getExprLoc()));
3859+
return emitNeonCall(builder, {IntType, builder.getSInt64Ty()}, Ops,
3860+
Intrinsic, IntType, getLoc(E->getExprLoc()));
38553861
}
38563862
case NEON::BI__builtin_neon_vrsrad_n_u64:
38573863
case NEON::BI__builtin_neon_vrsrad_n_s64: {
@@ -3867,9 +3873,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38673873

38683874
llvm::SmallVector<mlir::Value, 2> args = {
38693875
Ops[1], builder.createIntCast(Ops[2], IntType)};
3870-
Ops[1] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3871-
builder, {IntType, IntType}, args, Intrinsic, IntType,
3872-
getLoc(E->getExprLoc()));
3876+
Ops[1] = emitNeonCall(builder, {IntType, IntType}, args, Intrinsic, IntType,
3877+
getLoc(E->getExprLoc()));
38733878
return builder.createAdd(Ops[0], builder.createBitcast(Ops[1], IntType));
38743879
}
38753880
case NEON::BI__builtin_neon_vshld_n_s64:
@@ -4016,8 +4021,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40164021
name = "aarch64.neon.pmull";
40174022
cir::VectorType argTy = builder.getExtendedOrTruncatedElementVectorType(
40184023
ty, false /* truncated */, !usgn);
4019-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4020-
builder, {argTy, argTy}, Ops, name, ty, getLoc(E->getExprLoc()));
4024+
return emitNeonCall(builder, {argTy, argTy}, Ops, name, ty,
4025+
getLoc(E->getExprLoc()));
40214026
}
40224027
case NEON::BI__builtin_neon_vmax_v:
40234028
case NEON::BI__builtin_neon_vmaxq_v: {
@@ -4037,8 +4042,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40374042
llvm::StringRef name = usgn ? "aarch64.neon.umin" : "aarch64.neon.smin";
40384043
if (cir::isFPOrFPVectorTy(ty))
40394044
name = "aarch64.neon.fmin";
4040-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4041-
builder, {ty, ty}, Ops, name, ty, getLoc(E->getExprLoc()));
4045+
return emitNeonCall(builder, {ty, ty}, Ops, name, ty,
4046+
getLoc(E->getExprLoc()));
40424047
}
40434048
case NEON::BI__builtin_neon_vminh_f16: {
40444049
llvm_unreachable("NEON::BI__builtin_neon_vminh_f16 NYI");
@@ -4048,15 +4053,15 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40484053
llvm::StringRef name = usgn ? "aarch64.neon.uabd" : "aarch64.neon.sabd";
40494054
if (cir::isFPOrFPVectorTy(ty))
40504055
name = "aarch64.neon.fabd";
4051-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4052-
builder, {ty, ty}, Ops, name, ty, getLoc(E->getExprLoc()));
4056+
return emitNeonCall(builder, {ty, ty}, Ops, name, ty,
4057+
getLoc(E->getExprLoc()));
40534058
}
40544059
case NEON::BI__builtin_neon_vpadal_v:
40554060
case NEON::BI__builtin_neon_vpadalq_v: {
40564061
cir::VectorType argTy = getHalfEltSizeTwiceNumElemsVecType(builder, vTy);
40574062
mlir::Location loc = getLoc(E->getExprLoc());
40584063
llvm::SmallVector<mlir::Value, 1> args = {Ops[1]};
4059-
mlir::Value tmp = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4064+
mlir::Value tmp = emitNeonCall(
40604065
builder, {argTy}, args,
40614066
usgn ? "aarch64.neon.uaddlp" : "aarch64.neon.saddlp", vTy, loc);
40624067
mlir::Value addEnd = builder.createBitcast(Ops[0], vTy);
@@ -4090,13 +4095,13 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40904095
case NEON::BI__builtin_neon_vqrshrun_n_v:
40914096
// The prototype of builtin_neon_vqrshrun_n can be found at
40924097
// https://developer.arm.com/architectures/instruction-sets/intrinsics/
4093-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4098+
return emitNeonCall(
40944099
builder,
40954100
{builder.getExtendedOrTruncatedElementVectorType(ty, true, true),
40964101
SInt32Ty},
40974102
Ops, "aarch64.neon.sqrshrun", ty, getLoc(E->getExprLoc()));
40984103
case NEON::BI__builtin_neon_vqshrn_n_v:
4099-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4104+
return emitNeonCall(
41004105
builder,
41014106
{builder.getExtendedOrTruncatedElementVectorType(
41024107
vTy, true /* extend */,
@@ -4105,15 +4110,15 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
41054110
Ops, usgn ? "aarch64.neon.uqshrn" : "aarch64.neon.sqshrn", ty,
41064111
getLoc(E->getExprLoc()));
41074112
case NEON::BI__builtin_neon_vrshrn_n_v:
4108-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4113+
return emitNeonCall(
41094114
builder,
41104115
{builder.getExtendedOrTruncatedElementVectorType(
41114116
vTy, true /* extend */,
41124117
mlir::cast<cir::IntType>(vTy.getEltType()).isSigned()),
41134118
SInt32Ty},
41144119
Ops, "aarch64.neon.rshrn", ty, getLoc(E->getExprLoc()));
41154120
case NEON::BI__builtin_neon_vqrshrn_n_v:
4116-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4121+
return emitNeonCall(
41174122
builder,
41184123
{builder.getExtendedOrTruncatedElementVectorType(
41194124
vTy, true /* extend */,
@@ -4127,8 +4132,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
41274132
case NEON::BI__builtin_neon_vrnda_v:
41284133
case NEON::BI__builtin_neon_vrndaq_v: {
41294134
assert(!cir::MissingFeatures::emitConstrainedFPCall());
4130-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4131-
builder, {ty}, Ops, "round", ty, getLoc(E->getExprLoc()));
4135+
return emitNeonCall(builder, {ty}, Ops, "round", ty,
4136+
getLoc(E->getExprLoc()));
41324137
}
41334138
case NEON::BI__builtin_neon_vrndih_f16: {
41344139
llvm_unreachable("NEON::BI__builtin_neon_vrndih_f16 NYI");
@@ -4310,9 +4315,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
43104315
cir::VectorType vTy = cir::VectorType::get(builder.getContext(), eltTy, 4);
43114316
Ops.push_back(emitScalarExpr(E->getArg(0)));
43124317
// This is to add across the vector elements, so wider result type needed.
4313-
Ops[0] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4314-
builder, {vTy}, Ops, usgn ? "aarch64.neon.uaddv" : "aarch64.neon.saddv",
4315-
SInt32Ty, getLoc(E->getExprLoc()));
4318+
Ops[0] = emitNeonCall(builder, {vTy}, Ops,
4319+
usgn ? "aarch64.neon.uaddv" : "aarch64.neon.saddv",
4320+
SInt32Ty, getLoc(E->getExprLoc()));
43164321
return builder.createIntCast(Ops[0], eltTy);
43174322
}
43184323
case NEON::BI__builtin_neon_vaddvq_u8:
@@ -4419,10 +4424,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44194424
mlir::Type argTy = cir::VectorType::get(builder.getContext(),
44204425
usgn ? UInt16Ty : SInt16Ty, 8);
44214426
llvm::SmallVector<mlir::Value, 1> argOps = {emitScalarExpr(E->getArg(0))};
4422-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4423-
builder, {argTy}, argOps,
4424-
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4425-
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
4427+
return emitNeonCall(builder, {argTy}, argOps,
4428+
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4429+
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
44264430
}
44274431
case NEON::BI__builtin_neon_vaddlv_s8: {
44284432
llvm_unreachable("NEON::BI__builtin_neon_vaddlv_s8 NYI");
@@ -4434,10 +4438,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44344438
mlir::Type argTy = cir::VectorType::get(builder.getContext(),
44354439
usgn ? UInt16Ty : SInt16Ty, 4);
44364440
llvm::SmallVector<mlir::Value, 1> argOps = {emitScalarExpr(E->getArg(0))};
4437-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4438-
builder, {argTy}, argOps,
4439-
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4440-
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
4441+
return emitNeonCall(builder, {argTy}, argOps,
4442+
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4443+
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
44414444
}
44424445
case NEON::BI__builtin_neon_vaddlvq_s8: {
44434446
llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_s8 NYI");
@@ -4464,11 +4467,11 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44644467
// Thus we have to make shift amount vec type to be signed.
44654468
cir::VectorType shitAmtVecTy =
44664469
usgn ? getSignChangedVectorType(builder, vTy) : vTy;
4467-
mlir::Value tmp = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4468-
builder, {vTy, shitAmtVecTy}, tmpOps,
4469-
usgn ? "aarch64.neon.urshl" : "aarch64.neon.srshl", vTy,
4470-
getLoc(E->getExprLoc()), false, 1 /* shift amount is args[1]*/,
4471-
true /* right shift */);
4470+
mlir::Value tmp =
4471+
emitNeonCall(builder, {vTy, shitAmtVecTy}, tmpOps,
4472+
usgn ? "aarch64.neon.urshl" : "aarch64.neon.srshl", vTy,
4473+
getLoc(E->getExprLoc()), false,
4474+
1 /* shift amount is args[1]*/, true /* right shift */);
44724475
Ops[0] = builder.createBitcast(Ops[0], vTy);
44734476
return builder.createBinop(Ops[0], cir::BinOpKind::Add, tmp);
44744477
}

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