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‎clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

+83-74
Original file line numberDiff line numberDiff line change
@@ -2283,9 +2283,9 @@ emitCommonNeonCallPattern0(CIRGenFunction &cgf, llvm::StringRef intrincsName,
22832283
// Thus empty argTypes really just means {funcResTy, funcResTy}.
22842284
argTypes = {funcResTy, funcResTy};
22852285
}
2286-
mlir::Value res =
2287-
emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, std::move(argTypes), ops, intrincsName, funcResTy,
2288-
cgf.getLoc(e->getExprLoc()));
2286+
mlir::Value res = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2287+
builder, std::move(argTypes), ops, intrincsName, funcResTy,
2288+
cgf.getLoc(e->getExprLoc()));
22892289
mlir::Type resultType = cgf.convertType(e->getType());
22902290
return builder.createBitcast(res, resultType);
22912291
}
@@ -2306,8 +2306,8 @@ static mlir::Value emitCommonNeonVecAcrossCall(CIRGenFunction &cgf,
23062306
cir::VectorType vTy =
23072307
cir::VectorType::get(&cgf.getMLIRContext(), eltTy, vecLen);
23082308
llvm::SmallVector<mlir::Value, 1> args{op};
2309-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {vTy}, args, intrincsName, eltTy,
2310-
cgf.getLoc(e->getExprLoc()));
2309+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2310+
builder, {vTy}, args, intrincsName, eltTy, cgf.getLoc(e->getExprLoc()));
23112311
}
23122312

23132313
mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
@@ -2389,25 +2389,26 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
23892389
case NEON::BI__builtin_neon_vpaddlq_v: {
23902390
// The source operand type has twice as many elements of half the size.
23912391
cir::VectorType narrowTy = getHalfEltSizeTwiceNumElemsVecType(builder, vTy);
2392-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {narrowTy}, ops,
2393-
isUnsigned ? "aarch64.neon.uaddlp"
2394-
: "aarch64.neon.saddlp",
2395-
vTy, getLoc(e->getExprLoc()));
2392+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2393+
builder, {narrowTy}, ops,
2394+
isUnsigned ? "aarch64.neon.uaddlp" : "aarch64.neon.saddlp", vTy,
2395+
getLoc(e->getExprLoc()));
23962396
}
23972397
case NEON::BI__builtin_neon_vqdmlal_v:
23982398
case NEON::BI__builtin_neon_vqdmlsl_v: {
23992399
llvm::SmallVector<mlir::Value, 2> mulOps(ops.begin() + 1, ops.end());
24002400
cir::VectorType srcVty = builder.getExtendedOrTruncatedElementVectorType(
24012401
vTy, false, /* truncate */
24022402
mlir::cast<cir::IntType>(vTy.getEltType()).isSigned());
2403-
ops[1] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {srcVty, srcVty}, mulOps,
2404-
"aarch64.neon.sqdmull", vTy, getLoc(e->getExprLoc()));
2403+
ops[1] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2404+
builder, {srcVty, srcVty}, mulOps, "aarch64.neon.sqdmull", vTy,
2405+
getLoc(e->getExprLoc()));
24052406
ops.resize(2);
2406-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {vTy, vTy}, ops,
2407-
builtinID == NEON::BI__builtin_neon_vqdmlal_v
2408-
? "aarch64.neon.sqadd"
2409-
: "aarch64.neon.sqsub",
2410-
vTy, getLoc(e->getExprLoc()));
2407+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2408+
builder, {vTy, vTy}, ops,
2409+
builtinID == NEON::BI__builtin_neon_vqdmlal_v ? "aarch64.neon.sqadd"
2410+
: "aarch64.neon.sqsub",
2411+
vTy, getLoc(e->getExprLoc()));
24112412
}
24122413
case NEON::BI__builtin_neon_vcvt_f32_v:
24132414
case NEON::BI__builtin_neon_vcvtq_f32_v: {
@@ -2441,23 +2442,24 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
24412442
cir::VectorType mulVecT =
24422443
GetNeonType(this, NeonTypeFlags(neonType.getEltType(), false,
24432444
/*isQuad*/ false));
2444-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {resTy, mulVecT, SInt32Ty}, ops,
2445-
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
2446-
builtinID == NEON::BI__builtin_neon_vqdmulh_lane_v)
2447-
? "aarch64.neon.sqdmulh.lane"
2448-
: "aarch64.neon.sqrdmulh.lane",
2449-
resTy, getLoc(e->getExprLoc()));
2445+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2446+
builder, {resTy, mulVecT, SInt32Ty}, ops,
2447+
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
2448+
builtinID == NEON::BI__builtin_neon_vqdmulh_lane_v)
2449+
? "aarch64.neon.sqdmulh.lane"
2450+
: "aarch64.neon.sqrdmulh.lane",
2451+
resTy, getLoc(e->getExprLoc()));
24502452
}
24512453
case NEON::BI__builtin_neon_vqshlu_n_v:
24522454
case NEON::BI__builtin_neon_vqshluq_n_v: {
24532455
// These intrinsics expect signed vector type as input, but
24542456
// return unsigned vector type.
24552457
cir::VectorType srcTy = getSignChangedVectorType(builder, vTy);
2456-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {srcTy, srcTy}, ops, "aarch64.neon.sqshlu",
2457-
vTy, getLoc(e->getExprLoc()),
2458-
false, /* not fp constrained op */
2459-
1, /* second arg is shift amount */
2460-
false /* leftshift */);
2458+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2459+
builder, {srcTy, srcTy}, ops, "aarch64.neon.sqshlu", vTy,
2460+
getLoc(e->getExprLoc()), false, /* not fp constrained op */
2461+
1, /* second arg is shift amount */
2462+
false /* leftshift */);
24612463
}
24622464
case NEON::BI__builtin_neon_vrshr_n_v:
24632465
case NEON::BI__builtin_neon_vrshrq_n_v: {
@@ -2667,26 +2669,26 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
26672669
case NEON::BI__builtin_neon_vaddlvq_s32:
26682670
llvm_unreachable(" neon_vaddlvq_s32 NYI ");
26692671
case NEON::BI__builtin_neon_vaddlvq_u32:
2670-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, ops, "aarch64.neon.uaddlv", resultTy,
2671-
loc);
2672+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2673+
builder, {argTy}, ops, "aarch64.neon.uaddlv", resultTy, loc);
26722674
case NEON::BI__builtin_neon_vaddv_f32:
26732675
case NEON::BI__builtin_neon_vaddvq_f32:
26742676
case NEON::BI__builtin_neon_vaddvq_f64:
2675-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, ops, "aarch64.neon.faddv", resultTy,
2676-
loc);
2677+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2678+
builder, {argTy}, ops, "aarch64.neon.faddv", resultTy, loc);
26772679
case NEON::BI__builtin_neon_vaddv_s32:
26782680
case NEON::BI__builtin_neon_vaddvq_s32:
26792681
case NEON::BI__builtin_neon_vaddvq_s64:
2680-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, ops, "aarch64.neon.saddv", resultTy,
2681-
loc);
2682+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2683+
builder, {argTy}, ops, "aarch64.neon.saddv", resultTy, loc);
26822684
case NEON::BI__builtin_neon_vaddv_u32:
26832685
case NEON::BI__builtin_neon_vaddvq_u32:
26842686
case NEON::BI__builtin_neon_vaddvq_u64:
2685-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, ops, "aarch64.neon.uaddv", resultTy,
2686-
loc);
2687+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2688+
builder, {argTy}, ops, "aarch64.neon.uaddv", resultTy, loc);
26872689
case NEON::BI__builtin_neon_vcaged_f64: {
2688-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, ops, "aarch64.neon.facge", resultTy,
2689-
loc);
2690+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2691+
builder, {argTy}, ops, "aarch64.neon.facge", resultTy, loc);
26902692
}
26912693
case NEON::BI__builtin_neon_vcages_f32:
26922694
llvm_unreachable(" neon_vcages_f32 NYI ");
@@ -2875,8 +2877,8 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
28752877
cir::VectorType resVecTy =
28762878
cir::VectorType::get(&(cgf.getMLIRContext()), cgf.SInt16Ty, 4);
28772879
vecExtendIntValue(cgf, argVecTy, ops[0], loc);
2878-
mlir::Value result = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argVecTy}, ops,
2879-
"aarch64.neon.sqxtn", resVecTy, loc);
2880+
mlir::Value result = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2881+
builder, {argVecTy}, ops, "aarch64.neon.sqxtn", resVecTy, loc);
28802882
return vecReduceIntValue(cgf, result, loc);
28812883
}
28822884
case NEON::BI__builtin_neon_vqmovns_u32:
@@ -2906,8 +2908,9 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
29062908
case NEON::BI__builtin_neon_vqrdmulhh_s16:
29072909
llvm_unreachable(" neon_vqrdmulhh_s16 NYI ");
29082910
case NEON::BI__builtin_neon_vqrdmulhs_s32:
2909-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {resultTy, resultTy}, ops,
2910-
"aarch64.neon.sqrdmulh", resultTy, loc);
2911+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
2912+
builder, {resultTy, resultTy}, ops, "aarch64.neon.sqrdmulh", resultTy,
2913+
loc);
29112914
case NEON::BI__builtin_neon_vqrshlb_s8:
29122915
llvm_unreachable(" neon_vqrshlb_s8 NYI ");
29132916
case NEON::BI__builtin_neon_vqrshlb_u8:
@@ -3812,8 +3815,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38123815
assert(APSInt && "Expected argument to be a constant");
38133816
Ops[1] = builder.getSInt64(APSInt->getZExtValue(), getLoc(E->getExprLoc()));
38143817
const StringRef Intrinsic = "aarch64.neon.sqshlu";
3815-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3816-
getLoc(E->getExprLoc()));
3818+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3819+
builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3820+
getLoc(E->getExprLoc()));
38173821
}
38183822
case NEON::BI__builtin_neon_vqshld_n_u64:
38193823
case NEON::BI__builtin_neon_vqshld_n_s64: {
@@ -3826,8 +3830,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38263830
: "aarch64.neon.sqshl";
38273831
Ops.push_back(emitScalarExpr(E->getArg(1)));
38283832
Ops[1] = builder.createIntCast(Ops[1], IntType);
3829-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3830-
getLoc(E->getExprLoc()));
3833+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3834+
builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3835+
getLoc(E->getExprLoc()));
38313836
}
38323837
case NEON::BI__builtin_neon_vrshrd_n_u64:
38333838
case NEON::BI__builtin_neon_vrshrd_n_s64: {
@@ -3844,8 +3849,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38443849
assert(APSInt && "Expected argument to be a constant");
38453850
int64_t SV = -APSInt->getSExtValue();
38463851
Ops[1] = builder.getSInt64(SV, getLoc(E->getExprLoc()));
3847-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {IntType, builder.getSInt64Ty()}, Ops,
3848-
Intrinsic, IntType, getLoc(E->getExprLoc()));
3852+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3853+
builder, {IntType, builder.getSInt64Ty()}, Ops, Intrinsic, IntType,
3854+
getLoc(E->getExprLoc()));
38493855
}
38503856
case NEON::BI__builtin_neon_vrsrad_n_u64:
38513857
case NEON::BI__builtin_neon_vrsrad_n_s64: {
@@ -3861,8 +3867,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38613867

38623868
llvm::SmallVector<mlir::Value, 2> args = {
38633869
Ops[1], builder.createIntCast(Ops[2], IntType)};
3864-
Ops[1] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {IntType, IntType}, args, Intrinsic, IntType,
3865-
getLoc(E->getExprLoc()));
3870+
Ops[1] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
3871+
builder, {IntType, IntType}, args, Intrinsic, IntType,
3872+
getLoc(E->getExprLoc()));
38663873
return builder.createAdd(Ops[0], builder.createBitcast(Ops[1], IntType));
38673874
}
38683875
case NEON::BI__builtin_neon_vshld_n_s64:
@@ -4009,8 +4016,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40094016
name = "aarch64.neon.pmull";
40104017
cir::VectorType argTy = builder.getExtendedOrTruncatedElementVectorType(
40114018
ty, false /* truncated */, !usgn);
4012-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy, argTy}, Ops, name, ty,
4013-
getLoc(E->getExprLoc()));
4019+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4020+
builder, {argTy, argTy}, Ops, name, ty, getLoc(E->getExprLoc()));
40144021
}
40154022
case NEON::BI__builtin_neon_vmax_v:
40164023
case NEON::BI__builtin_neon_vmaxq_v: {
@@ -4030,8 +4037,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40304037
llvm::StringRef name = usgn ? "aarch64.neon.umin" : "aarch64.neon.smin";
40314038
if (cir::isFPOrFPVectorTy(ty))
40324039
name = "aarch64.neon.fmin";
4033-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {ty, ty}, Ops, name, ty,
4034-
getLoc(E->getExprLoc()));
4040+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4041+
builder, {ty, ty}, Ops, name, ty, getLoc(E->getExprLoc()));
40354042
}
40364043
case NEON::BI__builtin_neon_vminh_f16: {
40374044
llvm_unreachable("NEON::BI__builtin_neon_vminh_f16 NYI");
@@ -4041,8 +4048,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
40414048
llvm::StringRef name = usgn ? "aarch64.neon.uabd" : "aarch64.neon.sabd";
40424049
if (cir::isFPOrFPVectorTy(ty))
40434050
name = "aarch64.neon.fabd";
4044-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {ty, ty}, Ops, name, ty,
4045-
getLoc(E->getExprLoc()));
4051+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4052+
builder, {ty, ty}, Ops, name, ty, getLoc(E->getExprLoc()));
40464053
}
40474054
case NEON::BI__builtin_neon_vpadal_v:
40484055
case NEON::BI__builtin_neon_vpadalq_v: {
@@ -4120,8 +4127,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
41204127
case NEON::BI__builtin_neon_vrnda_v:
41214128
case NEON::BI__builtin_neon_vrndaq_v: {
41224129
assert(!cir::MissingFeatures::emitConstrainedFPCall());
4123-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {ty}, Ops, "round", ty,
4124-
getLoc(E->getExprLoc()));
4130+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4131+
builder, {ty}, Ops, "round", ty, getLoc(E->getExprLoc()));
41254132
}
41264133
case NEON::BI__builtin_neon_vrndih_f16: {
41274134
llvm_unreachable("NEON::BI__builtin_neon_vrndih_f16 NYI");
@@ -4143,9 +4150,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
41434150
case NEON::BI__builtin_neon_vrndns_f32: {
41444151
mlir::Value arg0 = emitScalarExpr(E->getArg(0));
41454152
args.push_back(arg0);
4146-
return emitNeonCallToOp<cir::RoundEvenOp>(builder, {arg0.getType()}, args, std::nullopt,
4147-
getCIRGenModule().FloatTy,
4148-
getLoc(E->getExprLoc()));
4153+
return emitNeonCallToOp<cir::RoundEvenOp>(
4154+
builder, {arg0.getType()}, args, std::nullopt,
4155+
getCIRGenModule().FloatTy, getLoc(E->getExprLoc()));
41494156
}
41504157
case NEON::BI__builtin_neon_vrndph_f16: {
41514158
llvm_unreachable("NEON::BI__builtin_neon_vrndph_f16 NYI");
@@ -4303,9 +4310,9 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
43034310
cir::VectorType vTy = cir::VectorType::get(builder.getContext(), eltTy, 4);
43044311
Ops.push_back(emitScalarExpr(E->getArg(0)));
43054312
// This is to add across the vector elements, so wider result type needed.
4306-
Ops[0] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {vTy}, Ops,
4307-
usgn ? "aarch64.neon.uaddv" : "aarch64.neon.saddv",
4308-
SInt32Ty, getLoc(E->getExprLoc()));
4313+
Ops[0] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4314+
builder, {vTy}, Ops, usgn ? "aarch64.neon.uaddv" : "aarch64.neon.saddv",
4315+
SInt32Ty, getLoc(E->getExprLoc()));
43094316
return builder.createIntCast(Ops[0], eltTy);
43104317
}
43114318
case NEON::BI__builtin_neon_vaddvq_u8:
@@ -4412,9 +4419,10 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44124419
mlir::Type argTy = cir::VectorType::get(builder.getContext(),
44134420
usgn ? UInt16Ty : SInt16Ty, 8);
44144421
llvm::SmallVector<mlir::Value, 1> argOps = {emitScalarExpr(E->getArg(0))};
4415-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, argOps,
4416-
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4417-
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
4422+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4423+
builder, {argTy}, argOps,
4424+
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4425+
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
44184426
}
44194427
case NEON::BI__builtin_neon_vaddlv_s8: {
44204428
llvm_unreachable("NEON::BI__builtin_neon_vaddlv_s8 NYI");
@@ -4426,9 +4434,10 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44264434
mlir::Type argTy = cir::VectorType::get(builder.getContext(),
44274435
usgn ? UInt16Ty : SInt16Ty, 4);
44284436
llvm::SmallVector<mlir::Value, 1> argOps = {emitScalarExpr(E->getArg(0))};
4429-
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {argTy}, argOps,
4430-
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4431-
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
4437+
return emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4438+
builder, {argTy}, argOps,
4439+
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
4440+
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
44324441
}
44334442
case NEON::BI__builtin_neon_vaddlvq_s8: {
44344443
llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_s8 NYI");
@@ -4455,11 +4464,11 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44554464
// Thus we have to make shift amount vec type to be signed.
44564465
cir::VectorType shitAmtVecTy =
44574466
usgn ? getSignChangedVectorType(builder, vTy) : vTy;
4458-
mlir::Value tmp =
4459-
emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(builder, {vTy, shitAmtVecTy}, tmpOps,
4460-
usgn ? "aarch64.neon.urshl" : "aarch64.neon.srshl", vTy,
4461-
getLoc(E->getExprLoc()), false,
4462-
1 /* shift amount is args[1]*/, true /* right shift */);
4467+
mlir::Value tmp = emitNeonCallToOp<cir::LLVMIntrinsicCallOp>(
4468+
builder, {vTy, shitAmtVecTy}, tmpOps,
4469+
usgn ? "aarch64.neon.urshl" : "aarch64.neon.srshl", vTy,
4470+
getLoc(E->getExprLoc()), false, 1 /* shift amount is args[1]*/,
4471+
true /* right shift */);
44634472
Ops[0] = builder.createBitcast(Ops[0], vTy);
44644473
return builder.createBinop(Ops[0], cir::BinOpKind::Add, tmp);
44654474
}

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