Lower vld1_dup and vld1q_dup

Author: ghehg

clang/include/clang/CIR/Dialect/IR/CIROps.td

@@ -2821,13 +2821,16 @@ def VecSplatOp : CIR_Op<"vec.splat", [Pure,
   let description = [{
     The `cir.vec.splat` operation creates a vector value from a scalar value.
     All elements of the vector have the same value, that of the given scalar.
+    If `poison` is specified, the start value of the result is poison values
+    instead of undef.
   }];
 
-  let arguments = (ins CIR_AnyType:$value);
+  let arguments = (ins CIR_AnyType:$value, UnitAttr:$poison);
   let results = (outs CIR_VectorType:$result);
 
   let assemblyFormat = [{
-    $value `:` type($value) `,` qualified(type($result)) attr-dict
+    $value `:` type($value) `,` qualified(type($result))
+    (`poison` $poison^)? attr-dict
   }];
   let hasVerifier = 0;
 }

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

@@ -1949,7 +1949,9 @@ static mlir::cir::VectorType GetNeonType(CIRGenFunction *CGF,
                                       CGF->getCIRGenModule().FloatTy,
                                       V1Ty ? 1 : (2 << IsQuad));
   case NeonTypeFlags::Float64:
-    llvm_unreachable("NYI");
+    return mlir::cir::VectorType::get(CGF->getBuilder().getContext(),
+                                      CGF->getCIRGenModule().DoubleTy,
+                                      V1Ty ? 1 : (1 << IsQuad));
   }
   llvm_unreachable("Unknown vector element type!");
 }
@@ -3411,7 +3413,12 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
   }
   case NEON::BI__builtin_neon_vld1_dup_v:
   case NEON::BI__builtin_neon_vld1q_dup_v: {
-    llvm_unreachable("NYI");
+    cir::Address ptrAddr = PtrOp0.withElementType(VTy.getEltType());
+    mlir::Value val = builder.createLoad(getLoc(E->getExprLoc()), ptrAddr);
+    mlir::cir::VecSplatOp vecSplat = builder.create<mlir::cir::VecSplatOp>(
+        getLoc(E->getExprLoc()), VTy, val);
+    vecSplat.setPoison(true);
+    return vecSplat;
   }
   case NEON::BI__builtin_neon_vst1_lane_v:
   case NEON::BI__builtin_neon_vst1q_lane_v:

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

@@ -1435,15 +1435,18 @@ class CIRVectorSplatLowering
     assert(vecTy && "result type of cir.vec.splat op is not VectorType");
     auto llvmTy = typeConverter->convertType(vecTy);
     auto loc = op.getLoc();
-    mlir::Value undef = rewriter.create<mlir::LLVM::UndefOp>(loc, llvmTy);
+    mlir::Value startVal =
+        op.getPoison()
+            ? rewriter.create<mlir::LLVM::PoisonOp>(loc, llvmTy).getRes()
+            : rewriter.create<mlir::LLVM::UndefOp>(loc, llvmTy);
     mlir::Value indexValue =
         rewriter.create<mlir::LLVM::ConstantOp>(loc, rewriter.getI64Type(), 0);
     mlir::Value elementValue = adaptor.getValue();
     mlir::Value oneElement = rewriter.create<mlir::LLVM::InsertElementOp>(
-        loc, undef, elementValue, indexValue);
+        loc, startVal, elementValue, indexValue);
     SmallVector<int32_t> zeroValues(vecTy.getSize(), 0);
     mlir::Value shuffled = rewriter.create<mlir::LLVM::ShuffleVectorOp>(
-        loc, oneElement, undef, zeroValues);
+        loc, oneElement, startVal, zeroValues);
     rewriter.replaceOp(op, shuffled);
     return mlir::success();
   }