|
| 1 | +//===- CombinerHelperCasts.cpp---------------------------------------------===// |
| 2 | +// |
| 3 | +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | +// See https://llvm.org/LICENSE.txt for license information. |
| 5 | +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | +// |
| 7 | +//===----------------------------------------------------------------------===// |
| 8 | +// |
| 9 | +// This file implements CombinerHelper for G_ANYEXT, G_SEXT, G_TRUNC, and |
| 10 | +// G_ZEXT |
| 11 | +// |
| 12 | +//===----------------------------------------------------------------------===// |
| 13 | +#include "llvm/CodeGen/GlobalISel/CombinerHelper.h" |
| 14 | +#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h" |
| 15 | +#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" |
| 16 | +#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" |
| 17 | +#include "llvm/CodeGen/GlobalISel/Utils.h" |
| 18 | +#include "llvm/CodeGen/LowLevelTypeUtils.h" |
| 19 | +#include "llvm/CodeGen/MachineOperand.h" |
| 20 | +#include "llvm/CodeGen/MachineRegisterInfo.h" |
| 21 | +#include "llvm/CodeGen/TargetOpcodes.h" |
| 22 | +#include "llvm/Support/Casting.h" |
| 23 | + |
| 24 | +#define DEBUG_TYPE "gi-combiner" |
| 25 | + |
| 26 | +using namespace llvm; |
| 27 | + |
| 28 | +bool CombinerHelper::matchSextOfTrunc(const MachineOperand &MO, |
| 29 | + BuildFnTy &MatchInfo) { |
| 30 | + GSext *Sext = cast<GSext>(getDefIgnoringCopies(MO.getReg(), MRI)); |
| 31 | + GTrunc *Trunc = cast<GTrunc>(getDefIgnoringCopies(Sext->getSrcReg(), MRI)); |
| 32 | + |
| 33 | + Register Dst = Sext->getReg(0); |
| 34 | + Register Src = Trunc->getSrcReg(); |
| 35 | + |
| 36 | + LLT DstTy = MRI.getType(Dst); |
| 37 | + LLT SrcTy = MRI.getType(Src); |
| 38 | + |
| 39 | + if (DstTy == SrcTy) { |
| 40 | + MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; |
| 41 | + return true; |
| 42 | + } |
| 43 | + |
| 44 | + if (DstTy.getScalarSizeInBits() < SrcTy.getScalarSizeInBits() && |
| 45 | + isLegalOrBeforeLegalizer({TargetOpcode::G_TRUNC, {DstTy, SrcTy}})) { |
| 46 | + MatchInfo = [=](MachineIRBuilder &B) { |
| 47 | + B.buildTrunc(Dst, Src, MachineInstr::MIFlag::NoSWrap); |
| 48 | + }; |
| 49 | + return true; |
| 50 | + } |
| 51 | + |
| 52 | + if (DstTy.getScalarSizeInBits() > SrcTy.getScalarSizeInBits() && |
| 53 | + isLegalOrBeforeLegalizer({TargetOpcode::G_SEXT, {DstTy, SrcTy}})) { |
| 54 | + MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; |
| 55 | + return true; |
| 56 | + } |
| 57 | + |
| 58 | + return false; |
| 59 | +} |
| 60 | + |
| 61 | +bool CombinerHelper::matchZextOfTrunc(const MachineOperand &MO, |
| 62 | + BuildFnTy &MatchInfo) { |
| 63 | + GZext *Zext = cast<GZext>(getDefIgnoringCopies(MO.getReg(), MRI)); |
| 64 | + GTrunc *Trunc = cast<GTrunc>(getDefIgnoringCopies(Zext->getSrcReg(), MRI)); |
| 65 | + |
| 66 | + Register Dst = Zext->getReg(0); |
| 67 | + Register Src = Trunc->getSrcReg(); |
| 68 | + |
| 69 | + LLT DstTy = MRI.getType(Dst); |
| 70 | + LLT SrcTy = MRI.getType(Src); |
| 71 | + |
| 72 | + if (DstTy == SrcTy) { |
| 73 | + MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; |
| 74 | + return true; |
| 75 | + } |
| 76 | + |
| 77 | + if (DstTy.getScalarSizeInBits() < SrcTy.getScalarSizeInBits() && |
| 78 | + isLegalOrBeforeLegalizer({TargetOpcode::G_TRUNC, {DstTy, SrcTy}})) { |
| 79 | + MatchInfo = [=](MachineIRBuilder &B) { |
| 80 | + B.buildTrunc(Dst, Src, MachineInstr::MIFlag::NoUWrap); |
| 81 | + }; |
| 82 | + return true; |
| 83 | + } |
| 84 | + |
| 85 | + if (DstTy.getScalarSizeInBits() > SrcTy.getScalarSizeInBits() && |
| 86 | + isLegalOrBeforeLegalizer({TargetOpcode::G_ZEXT, {DstTy, SrcTy}})) { |
| 87 | + MatchInfo = [=](MachineIRBuilder &B) { |
| 88 | + B.buildZExt(Dst, Src, MachineInstr::MIFlag::NonNeg); |
| 89 | + }; |
| 90 | + return true; |
| 91 | + } |
| 92 | + |
| 93 | + return false; |
| 94 | +} |
| 95 | + |
| 96 | +bool CombinerHelper::matchNonNegZext(const MachineOperand &MO, |
| 97 | + BuildFnTy &MatchInfo) { |
| 98 | + GZext *Zext = cast<GZext>(MRI.getVRegDef(MO.getReg())); |
| 99 | + |
| 100 | + Register Dst = Zext->getReg(0); |
| 101 | + Register Src = Zext->getSrcReg(); |
| 102 | + |
| 103 | + LLT DstTy = MRI.getType(Dst); |
| 104 | + LLT SrcTy = MRI.getType(Src); |
| 105 | + const auto &TLI = getTargetLowering(); |
| 106 | + |
| 107 | + // Convert zext nneg to sext if sext is the preferred form for the target. |
| 108 | + if (isLegalOrBeforeLegalizer({TargetOpcode::G_SEXT, {DstTy, SrcTy}}) && |
| 109 | + TLI.isSExtCheaperThanZExt(getMVTForLLT(SrcTy), getMVTForLLT(DstTy))) { |
| 110 | + MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; |
| 111 | + return true; |
| 112 | + } |
| 113 | + |
| 114 | + return false; |
| 115 | +} |
0 commit comments